| Commit message (Collapse) | Author | Age | Lines |
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add new configuration file da850_am18xxevm.h for AM18xx boards
which are based on da850 SOC. AM18xx has WINBOND spi flash which
is indicated in the config file. And make appropriate changes in
board.cfg for building.
Signed-off-by: Nagabhushana Netagunte <nagabhushana.netagunte@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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This is needed to support the latest kernel versions.
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Alexander Holler <holler@ahsoftware.de>
Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
Signed-off-by: Tom Rini <trini@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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The devkit8000 ships with either a 128MB or 256MB NAND chip. In
order for SPL to work with 256MB NAND CONFIG_SYS_NAND_5_ADDR_CYCLE
needs to be set. After talking with Scott Wood this should be
safe to set even for smaller NAND chips.
Cc: Scott Wood <scottwood@freescale.com>
Cc: Frederik Kriewitz <frederik@kriewitz.eu>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Tom Rini <trini@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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This enables Vpp and disables the flash protection on the
Integrator when starting U-Boot. The integrator/AP has double
protection mechanisms: this one and the EBI protection bit
(patch earlier), the Integrator/CP has only one line of
protection in these registers.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Break out the AP system controller and CP "CP controller"
registers into a header file, it gives better overview than
hardcoding its values and other disturbing practices.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This reconfigures the EBI (External Bus Interface) on the
integrator so that chip select 1, handling the flash memory, is
set to writeable. Without this it is not possible for U-Boot to
access flash memory and it crashes on startup since CFI won't
work properly.
Since this is the first time we use the EBI, we create a header
file for its registers.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Casting around to *(volatile ulong *) doesn't look good, so include
the <asm/io.h> macros and use good old readl() instead.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Do away with the config.mk file and move the text offset to the
config files to make things easier.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Alter the board.cfg to pass core module configuration flags
so we can make compile-time switches for different core
modules. These are already in use for some low-level code,
they just got lost in the conversion to the new build
system.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Signed-off-by: David Mueller <d.mueller@elsoft.ch>
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This allows the SPL to avoid compiling in the CPU support code.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Scott Wood <scottwood@freescale.com>
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When booting from Flash, the Integrator remaps its flash memory
from 0x24000000 to 0x00000000, and starts executing it at
0x00000000. This ROM thus hides the RAM underneath and first
0x40000 bytes of the memory cannot be tested by get_ram_size().
So let's test from 0x40000 to the end of detected memory
instead.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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timer.c used static data and are called before relocation.
Move all static variables into global_data structure. Also cleanup
timer.c from unused stubs and make it truly use 64 bit tick values.
Remove reset_timer_masked() get_timer_masked()
reference: arch/arm/cpu/arm926ejs/at91/timer.c
Based on Reinhard Meyer <u-boot@emk-elektronik.de>'s patches
5dca710a3d7703e41da0e9894f2d71f9e25bea6b
cfff263f41e32c7ba2ee9162a8cc6423eb5a8390
Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
Tested-by: Macpaul Lin <macpaul@gmail.com>
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Signed-off-by: Asen Chavdarov Dimov <dimov@ronetix.at>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
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add a function in board file to pass board revision
info to kernel. Revision number 0 and 1 are passed in
case of DM6467 and DM6467T respectively.
Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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add new configuration file for dm6467T and appropraite changes
in boards.cfg. dm6467T is the new varaiant of dm6467 SOC which
supports 33 MHz reference clock where as dm6467 supports 27 MHz
reference clock.
Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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da850_ddr_setup() expects the BOOTUNLOCK bit to be set in
If BOOTUNLOCK is not set in this define, several configuration
bits will not be writeable and the code will not work.
Since the BOOTUNLOCK and TIMUNLOCK bits are not configuration options
but access control bits, this patch changes the code to work
irrespective of the value of these bits in CONFIG_SYS_DA850_DDR2_SDBCR.
Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
Cc: Heiko Schocher <hs@denx.de>
Cc: Paulraj Sandeep <s-paulraj@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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The LPSC functions defined in
arch/arm/cpu/arm926ejs/davinci/da850_lowlevel.c
are replaced by those already defined in
arch/arm/cpu/arm926ejs/davinci/psc.c.
Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
Cc: Heiko Schocher <hs@denx.de>
Cc: Paulraj Sandeep <s-paulraj@ti.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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Rename arch/arm/cpu/arm926ejs/davinci/am1808_lowlevel.c and
arch/arm/include/asm/arch-davinci/am1808_lowlevel.h to da850_lowlevel.c
and da850_lowlevel.h since they apply not only to the AM1808 SoC
but to all DA850 chips. The function names and #defines are changed
likewise.
Signed-off-by: Christian Riesch <christian.riesch@omicron.at>
Cc: Heiko Schocher <hs@denx.de>
Cc: Paulraj Sandeep <s-paulraj@ti.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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This patch fixes following compile error for da8xx evm
da830evm.c: In function 'board_init':
da830evm.c:222: error: 'DAVINCI_SYSCFG_SUSPSRC_UART2' undeclared (first use in this function)
da830evm.c:222: error: (Each undeclared identifier is reported only once
da830evm.c:222: error: for each function it appears in.)
make[2]: *** [da830evm.o] Error 1
similarly for da850evm.
introduced through commit:
f9fc237f1f07d4e5ff7c9c2da39cabc8d3d7b339
Signed-off-by: Prabhakar Lad <prabhakar.csengg@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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Signed-off-by: David Mueller <d.mueller@elsoft.ch>
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* 'master' of git://git.denx.de/u-boot-fdt:
Fix constness of the fdt void pointer in fdt_getprop_u32_default
Add some missing endian conversions in fdt_support.c
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The function fdt_getprop_u32_default doesn't modify the fdt, so it can use a
const void * for its fdt argument.
Signed-off-by: Gabe Black <gabeblack@chromium.org>
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Some functions in fdt_support.c use fdt_getprop to read 32 bit values out of
the device tree, but then use them directly without doing any endian
conversion. Because they check for a value that doesn't actually appear in
practice, the functions continued to work even though they're incorrect.
This change adds the missing conversions.
Signed-off-by: Gabe Black <gabeblack@chromium.org>
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* 'master' of git://git.denx.de/u-boot-mpc85xx:
powerpc/85xx: Fix builds of P1020/P2020RDB-PC_36BIT_NAND
arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c: Fix GCC 4.6 build warning
arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c: Fix GCC 4.6 build warning
arch/powerpc/cpu/mpc8xxx/ddr/options.c: Fix GCC 4.6 build warning
drivers/qe/uec.c: Fix GCC 4.6 build warning
drivers/usb/host/ehci-fsl.c: Fix GCC 4.6 build warning
drivers/net/fm/fm.c: Fix GCC 4.6 build warning
board/sbc8560/sbc8560.c: Fix GCC 4.6 build warning
board/sbc8548/sbc8548.c: Fix GCC 4.6 build warning
board/freescale/mpc8569mds/mpc8569mds.c: Fix GCC 4.6 build warning
board/freescale/mpc8568mds/mpc8568mds.c: Fix GCC 4.6 build warning
board/freescale/mpc8548cds/mpc8548cds.c: Fix GCC 4.6 build warning
board/freescale/common/pixis.c: Fix GCC 4.6 build warning
board/freescale/common/cds_pci_ft.c: Fix GCC 4.6 build warning
arch/powerpc/cpu/mpc8xxx/fsl_lbc.c: Fix GCC 4.6 build warning
arch/powerpc/cpu/mpc85xx/tlb.c: Fix GCC 4.6 build warning
arch/powerpc/cpu/mpc85xx/cpu_init.c: Fix GCC 4.6 build warning
phylib: Enable AR8021 phy support
powerpc/85xx: Set max alloc length to 10MB on P1022DS
powerpc/mpc85xx: Set SYSCLK to the required frequency
powerpc/85xx: Fix NAND SPL support
powerpc/85xx: Fix MPC8572DS NAND build
fsl_ifc: Fixed a bug in the erratum handling code for IFC_A003399
powerpc/85xx: Add support for Book-E MMU Arch v2.0
powerpc/85xx: Make inclusion of USB device fixup conditional
powerpc/85xx: Fix warning for USB device-fixup
powerpc/85xx: resize the boot page TLB before relocating CCSR
powerpc/85xx: verify the current address of CCSR before relocating it
powerpc/85xx: add some missing sync instructions in the CCSR relocation code
powerpc/85xx: fix some comments in the CCSR relocation code
powerpc/85xx: fix definition of MAS register macros
powerpc/mpc8548cds: Fix network initialization
powerpc/mpc8548: Add workaround for erratum NMG_eTSEC129
powerpc/QorIQ: fix network frame manager TBI PHY address settings
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Size grew a bit so nand-spl didn't fit in 4k, reduce done by removing
LAW entries not needed during SPL phase.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Fix:
ctrl_regs.c: In function 'set_ddr_sdram_cfg_2':
ctrl_regs.c:641:15: warning: variable 'rcw_en' set but not used [-Wunused-but-set-variable]
ctrl_regs.c: In function 'compute_fsl_memctl_config_regs':
ctrl_regs.c:951:31: warning: array subscript is above array bounds [-Warray-bounds]
ctrl_regs.c:752:34: warning: array subscript is above array bounds [-Warray-bounds]
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Fix:
fsl_corenet_serdes.c: In function 'fsl_serdes_init':
fsl_corenet_serdes.c:511:8: warning: variable 'buf' set but not used [-Wunused-but-set-variable]
fsl_corenet_serdes.c:498:18: warning: variable 'lane_prtcl' set but not used [-Wunused-but-set-variable]
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Fix:
options.c: In function 'populate_memctl_options':
options.c:486:28: warning: variable 'pdodt' set but not used [-Wunused-but-set-variable]
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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uec.c: In function 'uec_stop':
uec.c:267:22: warning: variable 'uccf' set but not used [-Wunused-but-set-variable]
uec.c: In function 'uec_set_mac_if_mode':
uec.c:328:15: warning: variable 'uec_info' set but not used [-Wunused-but-set-variable]
uec.c: In function 'adjust_link':
uec.c:519:11: warning: variable 'uec_regs' set but not used [-Wunused-but-set-variable]
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Fix:
ehci-fsl.c: In function 'ehci_hcd_init':
ehci-fsl.c:43:7: warning: variable 'usb_phy' set but not used [-Wunused-but-set-variable]
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Fix:
fm.c: In function 'fm_init_common':
fm.c:398:6: warning: variable 'n' set but not used [-Wunused-but-set-variable]
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Fix:
sbc8560.c: In function 'ft_board_setup':
sbc8560.c:351:12: warning: variable 'tmp' set but not used [-Wunused-but-set-variable]
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Fix:
sbc8548.c: In function 'local_bus_init':
sbc8548.c:80:7: warning: variable 'lbc_hz' set but not used [-Wunused-but-set-variable]
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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mpc8569mds.c: In function 'local_bus_init':
mpc8569mds.c:306:7: warning: variable 'lbc_hz' set but not used [-Wunused-but-set-variable]
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Fix:
mpc8568mds.c: In function 'local_bus_init':
mpc8568mds.c:150:7: warning: variable 'lbc_hz' set but not used [-Wunused-but-set-variable]
mpc8568mds.c: In function 'pib_init':
mpc8568mds.c:271:11: warning: variable 'orig_i2c_bus' set but not used [-Wunused-but-set-variable]
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Fix:
mpc8548cds.c: In function 'local_bus_init':
mpc8548cds.c:87:7: warning: variable 'lbc_hz' set but not used [-Wunused-but-set-variable]
mpc8548cds.c: In function 'lbc_sdram_init':
mpc8548cds.c:121:7: warning: variable 'cpu_board_rev' set but not used [-Wunused-but-set-variable]
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Fix:
pixis.c: In function 'strfractoint':
pixis.c:383:6: warning: variable 'intarr_len' set but not used [-Wunused-but-set-variable]
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Fix:
cds_pci_ft.c: In function 'cds_pci_fixup':
cds_pci_ft.c:31:12: warning: variable 'tmp' set but not used [-Wunused-but-set-variable]
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Fix:
fsl_lbc.c: In function 'upmconfig':
fsl_lbc.c:110:9: warning: variable 'mdr' set but not used [-Wunused-but-set-variable]
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Fix:
tlb.c: In function 'disable_tlb':
tlb.c:175:34: warning: variable '_mas7' set but not used [-Wunused-but-set-variable]
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Fix:
cpu_init.c: In function 'cpu_init_r':
cpu_init.c:320:7: warning: variable 'l2srbar' set but not used [-Wunused-but-set-variable]
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Enable AR8021 as it used on Freescale boards: P1020RDB-PC, P1021RDB-PC,
P2020RDB-PC, P1020UTM-PC, and P1020MSBG-PC.
Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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In order to support 1920x01080 resolution, we must increase the alloc
length.
Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
CC: Anatolij Gustschin <agust@denx.de>
Acked-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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For ICS307-02, there is one general expression to generate SYSCLK:
CLK1Frequency = InputFrequency * 2 * (VDW + 8) / ((RDW + 2) * OD)
If we want the required frequency for SYSCLK, we must find one solution
to generate this frequency, this solution includes VDW, RDW and OD.
For OD, there are only eight option value: 10, 2, 8, 4, 5, 7, 3, 6.
For RDW, the range is 1 to 127.
For VDW, the range is 4 to 511.
First, we use one OD, RDW and required SYSCLK to calculate the VDW,
if VDW is in it's range, we will calculate the CLK1Frequency with
the OD, RDW and VDW calculated, and we will check this percent
(CLK1Frequency / required SYSCLK), and the precision is 1/1000.
if the percent is less than 1/1000, we think the CLK1Frequency is we want.
Otherwise, We will continue to calculate it with the next OD and RDW.
Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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We cause CCSRBAR to be relocated in the SPL phase of NAND boot which
isn't expected and breaks things. Fixing the board config.h to NOT
relocate CCSR during the CONFIG_NAND_SPL phase.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Reduce NAND SPL build size by not include TLB entries that arent used by
it.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Wrong pointer was being used to copy code into L2SRAM.
Also removed the unreferenced variable l2srbar.
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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A few of the config registers changed definition between MMU v1.0 and
MMUv2.0. The new e6500 core from Freescale implements v2.0 of the
architecture.
Specifically, how we determine the size of TLB entries we support in the
variable size (or TLBCAM/TLB1) array is specified in a new register
(TLBnPS - TLB n Page size) instead of via TLBnCFG.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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