summaryrefslogtreecommitdiff
Commit message (Collapse)AuthorAgeLines
* powerpc/85xx: Enable eSPI support on P1022DSJiang Yutang2011-04-29-0/+18
| | | | | Signed-off-by: Jiang Yutang <b14898@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Enable eSPI support for p1_p2_rdbPriyanka Jain2011-04-29-2/+16
| | | | | | | Also added support to save env to spi flash in case of SPIBOOT. Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Enable eSPI controller & SPI boot support on P2020DSJerry Huang2011-04-29-0/+29
| | | | | | Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com> Signed-off-by: Zhao Chenhui <b35336@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc: eSPI and eSPI controller supportMingkai Hu2011-04-29-7/+342
| | | | | | | | Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Singed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com> Signed-off-by: Shaohui Xie <b21989@freescale.com> Cc: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* tsec: Fix MDIO on devices with eTSEC2Andy Fleming2011-04-29-1/+1
| | | | | | | | | | The tsec driver was defining the default MDIO address as the TSEC_BASE + 0x520, but on eTSEC2 controllers, the first TSEC's registers are separated from the MDIO registers. Use the existing MDIO_BASE_ADDR, instead. Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Change timebase divisor to be defined per processorKumar Gala2011-04-28-5/+19
| | | | | | | | Introduce new CONFIG_SYS_FSL_TBCLK_DIV on 85xx platforms because different SoCs have different divisor amounts. All the PQ3 parts are /8, the P4080/P4080 is /16, and P2040/P3041/P5020 are /32. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Implement work-around for P4080 erratum SERDES-A001Timur Tabi2011-04-28-16/+65
| | | | | | | | | | | | | Bank powerdown through RCW[SRDS_LPD_Bn] for XAUI on FM2 and SGMII on FM1 are swapped. Erratum SERDES-A001 says that if bank two is kept disabled and after bank three is enabled, then the PLL for bank three won't lock properly. The work-around is to enable and then disable bank two after bank three is enabled. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Extend SERDES9 erratum work-around to SGMII, SRIO, and AURORATimur Tabi2011-04-28-17/+35
| | | | | | | | | Part of the SERDES9 erratum work-around is to set some bits in the SerDes TTLCR0 register for lanes configured as XAUI, SGMII, SRIO, or AURORA. The current code does this only for XAUI, so extend it to the other protocols. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Display SERDES 8 erratum warning if banks are not disabledTimur Tabi2011-04-28-0/+11
| | | | | | | | | The work-around for P4080 erratum SERDES-8 requires all lanes of banks two and three to be disabled (powered down) in the RCW. Display a warning message if this is not the case. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Implement work-around for P4080 erratum SERDES-A005Timur Tabi2011-04-28-0/+52
| | | | | | | | SerDes PLL bandwidth default setting is incorrect when no lanes are configured as PCI Express. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/fsl: add 'pixis_reset dump' commandTimur Tabi2011-04-28-0/+58
| | | | | | | | Add the 'pixis_reset dump' command, which displays the contents of the PIXIS registers. This command is only available if DEBUG is defined. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/86xx: remove empty board_early_init_f()Timur Tabi2011-04-28-7/+0
| | | | | | | Remove an empty board_early_init_f() from the MPC8641HPCN board. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Don't set FT_FSL_PCI_SETUP if CONFIG_PCI is not setMatthew McClintock2011-04-27-1/+3
| | | | | | | | | | | | | | A lot of boards set FT_FSL_PCI_SETUP directly in their board code and don't check to see if CONFIG_PCI is actually defined. This will cause the board compilation to fail if CONFIG_PCI is not defined. The p1022ds board is one such example. Instead of fixing every board this patch wraps FT_FSL_PCI_SETUP around CONFIG_PCI so we can remove CONFIG_PCI and boards will still build properly. Signed-off-by: Matthew McClintock <msm@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: handle both "secX.Y" and "sec-vX.Y" propertiesKim Phillips2011-04-27-0/+13
| | | | | | | | | versioned SEC properties changed names during development, so for now search and update LIODNs for both "secX.Y" and "sec-vX.Y" based properties. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Enable ESDHC111 erratum on P2040/P3041/P5010/P5020 SoCsLei Xu2011-04-27-0/+4
| | | | | | | | | The workaround for ESDHC111 should also be applied on P2040/P3041/P5010/P5020 SoCs. Signed-off-by: Lei Xu <B33228@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Enable Internal USB PHY for p2040, p3041, p5010 and p5020Roy Zang2011-04-27-0/+38
| | | | | | | | The P2040, P3041, P5010, and P5020 all have internal USB PHYs that we need to enable for them to function. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc: Add P3041DS/P5020DS board support (uses corenet_ds code)Kumar Gala2011-04-27-10/+208
| | | | | | | | | | | | | | | | The P3041DS & P5020DS boards are almost identical (except for the processor in them). Additionally they are based on the P4080DS board design so we use the some board code for all 3 boards. Some ngPIXIS (FPGA) registers where reserved on P4080DS and now have meaning on P3041DS/P5020DS. We utilize some of these for SERDES clock configuration. Additionally, the P3041DS/P5020DS support NAND. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Shaohui Xie <b21989@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* p4080/serdes: Implement the XAUI workaround for SERDES9 erratumEmil Medve2011-04-27-0/+116
| | | | | | Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com> Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: fsl_corenet_serdes code reworkEmil Medve2011-04-27-3/+43
| | | | | | | | | | | | Rework and add some new APIs to the fsl_corenet_serdes code for use by erratum and drivers. * Rename serdes_get_bank() to serdes_get_bank_by_lane() * Add serdes_get_first_lane returns which SERDES lane is used by device Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com> Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Fix Wrong PCIe 3 virtual address on corenet_ds platformsTrübenbach, Ralf2011-04-27-1/+1
| | | | | | | | | | | | | | This patch fixes a wrong address define in corenet_ds.h (used by P4080DS.h, P3041DS.h, P5020DS.h). Since board/Freescale/corenet_ds/tlb.c does not use the CONFIG_SYS_PCIE3_MEM_VIRT define (uses CONFIG_SYS_PCIE1_MEM_VIRT with a fix offset instead) this has no effect to the functionality. But it may be important for changes in the future? Signed-off-by: Ralf Trübenbach <ralf.truebenbach@men.de> Cc: Andy Fleming <afleming@gmail.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Add device tree fixup for bman portalHaiying Wang2011-04-27-1/+33
| | | | | | | Fix fdt bportal to pass the bman revision number to kernel via device tree. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Add support for 2nd USB controller on p1_p2_rdbRamneek Mehresh2011-04-27-0/+16
| | | | | | Second USB controller only works for SPI and SD boot because of pin muxing Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
* powerpc/85xx: Added PMUXCR1 and PMUXCR2 defines for P1010/P1014 SoCDipen Dudhat2011-04-27-0/+71
| | | | | Signed-off-by: Dipen Dudhat <Dipen.Dudhat@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Change CS timing params before changing CS properties on IFCDipen Dudhat2011-04-27-16/+15
| | | | | | | | To make sure that machine change operation work successfully, change timing parameters first before changing machine for chip select on IFC. Signed-off-by: Dipen Dudhat <Dipen.Dudhat@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Add support to save environment in SD card on p1_p2_rdbPriyanka Jain2011-04-27-1/+5
| | | | | | | | If we boot from a SD card use it for the environment as well. Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> Signed-off-by: Poonam Aggrwal <Poonam.Aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* common: add a grepenv commandKim Phillips2011-04-28-4/+84
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | u-boot environments, esp. when boards are shared across multiple users, can get pretty large and time consuming to visually parse. The grepenv command this patch adds can be used in lieu of printenv to facilitate searching. grepenv works like printenv but limits its output only to environment strings (variable name and value pairs) that match the user specified substring. the following examples are on a board with a 5313 byte environment that spans multiple screen pages: Example 1: summarize ethernet configuration: => grepenv eth TSEC etact=FM1@DTSEC2 eth=FM1@DTSEC4 ethact=FM1@DTSEC2 eth1addr=00:E0:0C:00:8b:01 eth2addr=00:E0:0C:00:8b:02 eth3addr=00:E0:0C:00:8b:03 eth4addr=00:E0:0C:00:8b:04 eth5addr=00:E0:0C:00:8b:05 eth6addr=00:E0:0C:00:8b:06 eth7addr=00:E0:0C:00:8b:07 eth8addr=00:E0:0C:00:8b:08 eth9addr=00:E0:0C:00:8b:09 ethaddr=00:E0:0C:00:8b:00 netdev=eth0 uprcw=setenv ethact $eth;setenv filename p4080ds/R_PPSXX_0xe/rcw_0xe_2sgmii_rev2_high.bin;setenv start 0xe8000000;protect off all;run upimage;protect on all upuboot=setenv ethact $eth;setenv filename u-boot.bin;setenv start eff80000;protect off all;run upimage;protect on all upucode=setenv ethact $eth;setenv filename fsl_fman_ucode_P4080_101_6.bin;setenv start 0xef000000;protect off all;run upimage;protect on all usdboot=setenv ethact $eth;tftp 1000000 $dir/$bootfile;tftp 2000000 $dir/initramfs.cpio.gz.uboot;tftp c00000 $dir/p4080ds-usdpaa.dtb;setenv bootargs root=/dev/ram rw console=ttyS0,115200 $othbootargs;bootm 1000000 2000000 c00000; => Example 2: detect unused env vars: => grepenv etact etact=FM1@DTSEC2 => Example 3: reveal hardcoded variables; e.g., for fdtaddr: => grepenv fdtaddr fdtaddr=c00000 nfsboot=setenv bootargs root=/dev/nfs rw nfsroot=$serverip:$rootpath ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off console=$consoledev,$baudrate $othbootargs;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr - $fdtaddr ramboot=setenv bootargs root=/dev/ram rw console=$consoledev,$baudrate $othbootargs;tftp $ramdiskaddr $ramdiskfile;tftp $loadaddr $bootfile;tftp $fdtaddr $fdtfile;bootm $loadaddr $ramdiskaddr $fdtaddr => grep $fdtaddr fdtaddr=c00000 my_boot=bootm 0x40000000 0x41000000 0x00c00000 my_dtb=tftp 0x00c00000 $prefix/p4080ds.dtb nohvboot=tftp 1000000 $dir/$bootfile;tftp 2000000 $dir/$ramdiskfile;tftp c00000 $dir/$fdtfile;setenv bootargs root=/dev/ram rw ramdisk_size=0x10000000 console=ttyS0,115200;bootm 1000000 2000000 c00000; => This patch also enables the grepenv command by default on corenet_ds based boards (and repositions the DHCP command entry to keep the list sorted). Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Cc: Kumar Gala <kumar.gala@freescale.com> Cc: Andy Fleming <afleming@freescale.com>
* powerpc: fix implementation of out_8 to match the other out_XX functionsTimur Tabi2011-04-28-1/+4
| | | | Signed-off-by: Timur Tabi <timur@freescale.com>
* env: fix env var autocompletionKim Phillips2011-04-28-1/+1
| | | | | | | | | | | | | | | | commit 560d424b6d7cd4205b062ad95f1b104bd4f8bcc3 "env: re-add support for auto-completion" fell short of its description - the 'used' logic in hmatch_r was reversed - 'used' is 0 if the hash table entry is not used, or -1 if deleted. This patch makes hmatch_r actually match on valid ('used') entries, instead of skipping them and failing to match anything. typing 'printenv tft' and hitting 'tab' now displays valid choices for variable names. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Cc: Mike Frysinger <vapier@gentoo.org> Tested-by: Mike Frysinger <vapier@gentoo.org>
* mpc52xx, digsy_mtc: protect default flash sectorsHeiko Schocher2011-04-28-0/+2
| | | | | | call flash_protect_default() to protect default sectors. Signed-off-by: Heiko Schocher <hs@denx.de>
* mpc52xx, digsy_mtc: change phy addr for rev5 boards.Heiko Schocher2011-04-28-0/+9
| | | | | | | | | | - rev5 board has phy addr 1 -> adapt CONFIG_PHY_ADDR define in board config file. - also fixup the phy addr entry in dts, before booting Linux. Signed-off-by: Heiko Schocher <hs@denx.de> Acked-by: Detlev Zundel <dzu@denx.de>
* NET: Correct potential missing goto label in case statement.Gray Remlin2011-04-28-1/+2
| | | | | | | | If neither CONFIG_CMD_PING or CONFIG_CMD_SNTP are defined but CONFIG_CMD_DNS is, a compile-time error will occur due to the absence of a goto label. Signed-off-by: Gray Remlin <gryrmln@gmail.com>
* fix redundant environment for serial flashthomas.langer@lantiq.com2011-04-28-27/+12
| | | | | | | | | | | | This patch fixes problems in the handling of redundant environment in env_sf.c The major problem are double calls of free() on the allocated buffers, which damages the internal data of malloc and crashes on next call. In addition, the selection of the active environment had errors and compiler warnings, which are corrected by this patch. Signed-off-by: Thomas Langer <thomas.langer@lantiq.com>
* Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2011-04-27-1328/+5293
|\
| * Don't grab memory for LCD if FB address is definedMinkyu Kang2011-04-27-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | If FB address is defined specific address then don't grab memory for LCD Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Cc: Albert Aribaud <albert.aribaud@free.fr> Cc: Wolfgang Denk <wd@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Kim Phillips <kim.phillips@freescale.com> Cc: Andy Fleming <afleming@gmail.com> Cc: Kumar Gala <kumar.gala@freescale.com>
| * nhk8815: move config targets from Makefile to boards.cfgAlessandro Rubini2011-04-27-9/+2
| | | | | | | | | | Signed-off-by: Alessandro Rubini <rubini@unipv.it> Acked-by: Andrea Gallo <andrea.gallo@stericsson.com>
| * nhk8815: add support for relocationAlessandro Rubini2011-04-27-28/+12
| | | | | | | | | | | | | | | | | | | | This patch defines all the needed symbols in the header file and removes the now-unused config.mk in board directory. Changes to board C file as requested. Signed-off-by: Alessandro Rubini <rubini@gnudd.com> Signed-off-by: Alessandro Rubini <rubini@unipv.it> Acked-by: Andrea Gallo <andrea.gallo@stericsson.com>
| * nhk8815: remove platform.S, which was unused at link timeAlessandro Rubini2011-04-27-341/+1
| | | | | | | | | | | | | | | | | | | | | | This source file, which I got by the vendor in their own port, was not actually executing because lib-based compilation didn't call lowlevel_init (we have CONFIG_SKIP_LOWLEVEL_INIT). With the change to object-based linking, an undefined symbol in this file started hitting in the final link. Signed-off-by: Alessandro Rubini <rubini@unipv.it> Acked-by: Andrea Gallo <andrea.gallo@stericsson.com>
| * cpuat91: fix board supportEric Benard2011-04-27-82/+87
| | | | | | | | | | | | | | | | - fix board support following relocation changes - switch to boards.cfg - disable i2c to keep size under 128kiB (1 sector) Signed-off-by: Eric Bénard <eric@eukrea.com>
| * ftsmc020: move ftsmc020 static mem controller to driver/mtdMacpaul Lin2011-04-27-4/+6
| | | | | | | | | | | | | | | | | | | | | | Move the header file and definitions of ftsmc020 static memory control unit from a320 SoC folder to "drivers/mtd" folder. This change will let other SoC which also use ftsmc020 could share the same header file. Signed-off-by: Macpaul Lin <macpaul@andestech.com>
| * ftsdmc020: move ftsdmc020.h to include/faradayMacpaul Lin2011-04-27-1/+1
| | | | | | | | | | | | | | | | | | | | Move the header file "ftsdmc020.h" (SDRAM Controller) to "include/faraday" folder. This change will let other SoC which also use ftsdmc020 could share the same header file. Signed-off-by: Macpaul Lin <macpaul@andestech.com>
| * cpu9260: update board supportEric Benard2011-04-27-208/+263
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - update to new relocation code - switch to boards.cfg - get rid of LEGACY (still a little hack in .h to compile) - add nand boot configuration - boot tested for the following configurations : 9260 (64MB RAM & nor boot) 9260_nand (64MB RAM & nand boot) 9G20_128M (128MB RAM & nor boot) 9G20_nand_128M (128MB RAM & nand boot) (nor boot is using lowlevel init) Signed-off-by: Eric Bénard <eric@eukrea.com>
| * Fix the issue of _end symbol not being found while buildingSughosh Ganu2011-04-27-0/+2
| | | | | | | | | | | | Fix the nand_spl build for the hawkboard Signed-off-by: Sughosh Ganu <urwithsughosh@gmail.com>
| * ARMV7: OMAP3: Add support for Comelit DIG297 boardLuca Ceresoli2011-04-27-0/+936
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Board support for the DIG297 board manufactured by Comelit Group SpA. It is a custom board based on the BeagleBoard <http://beagleboard.org/> by Texas Instruments. The board support is based on the BeagleBoard implementation. Signed-off-by: Luca Ceresoli <luca.ceresoli@comelit.it> Cc: Wolfgang Denk <wd@denx.de> Cc: Albert Aribaud <albert.aribaud@free.fr> Cc: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * ARMV7: OMAP3: Cleanup extern variables in mem.cLuca Ceresoli2011-04-27-155/+53
| | | | | | | | | | | | | | | | | | | | | | | | Removed boot_flash_* extern variables. boot_flash_type was totally unused. The other ones were actually constants, so they have been replaced with #defines in the board config files. Signed-off-by: Luca Ceresoli <luca.ceresoli@comelit.it> Cc: Wolfgang Denk <wd@denx.de> Cc: Albert Aribaud <albert.aribaud@free.fr> Cc: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * arm: Tegra2: Move clk/mux init to board_early_init_f, add GPIO initTom Warren2011-04-27-11/+113
| | | | | | | | Signed-off-by: Tom Warren <twarren@nvidia.com>
| * arm: Tegra2: GPIO: Add basic GPIO definitionsTom Warren2011-04-27-0/+60
| | | | | | | | Signed-off-by: Tom Warren <twarren@nvidia.com>
| * arm: Tegra2: Add missing PLLX initTom Warren2011-04-27-2/+33
| | | | | | | | Signed-off-by: Tom Warren <twarren@nvidia.com>
| * ARM: fix stack pointer adjustment in board_init_f()Eric Cooper2011-04-27-1/+1
| | | | | | | | | | | | | | | | Since addr_sp is a byte address, it should be adjusted by 12 here. Signed-off-by: Eric Cooper <ecc@cmu.edu> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Acked-by: Wolfgang Denk <wd@denx.de>
| * arm: Tegra2: add support for A9 CPU initTom Warren2011-04-27-1/+669
| | | | | | | | Signed-off-by: Tom Warren <twarren@nvidia.com>
| * ARMV7: OMAP3: Add GPMC_CONFIGx register value definitionsLuca Ceresoli2011-04-27-0/+95
| | | | | | | | | | Signed-off-by: Luca Ceresoli <luca.ceresoli@comelit.it> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
generated by cgit v1.1 at 2024-11-07 08:30:26 +0000