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* arm, imx6: add aristainetos 2b board versionHeiko Schocher2015-09-02-14/+148
| | | | | | | | | | | | there is a 2b board version of the aristainetos2 board. Differences to the v2: - spi cs for the nor flash and display controller changed - some pinmux changes - LED gpio settings changed Signed-off-by: Heiko Schocher <hs@denx.de>
* video, lg4573: make spi bus and cs configurableHeiko Schocher2015-09-02-1/+4
| | | | | | | | | make the spi bus and the spi chipselect configurable for the lg4573 driver. Use it on the aristainetos boards. Signed-off-by: Heiko Schocher <hs@denx.de> Acked-by: Anatolij Gustschin <agust@denx.de>
* imx: mx6ul_14x14_evk discard MX6UL from CONFIG_SYS_EXTRA_OPTIONSPeng Fan2015-09-02-1/+1
| | | | | | | | | Discard MX6UL from CONFIG_SYS_EXTRA_OPTIONS, since we default select MX6UL for mx6ul_14x14_evk board. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
* imx: mx6ul_14x14_evk select MX6ULPeng Fan2015-09-02-0/+1
| | | | | | | | | | There is no need to expose SoC choice to user, we already got the SoC according to the build target. So default "select MX6UL" for MX6UL_14x14_EVK target. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
* arm: Add SYS_L2CACHE_OFF Kconfig entryPeng Fan2015-09-02-0/+6
| | | | | | | | | | | | | | To i.MX6UL, SYS_L2CACHE_OFF is selected, but there is no Kconfig entry for SYS_L2CACHE_OFF. Then "select SYS_L2CACHE_OFF" does not effect for i.MX6UL, which is not expected. Since SYS_L2CACHE_OFF is mainly used by ARM architecture, add it to arch/arm/Kconfig. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@konsulko.com> Cc: Stefano Babic <sbabic@denx.de>
* imx: mx6slevk: add SPL supportPeng Fan2015-09-02-1/+181
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add SPL boot support for mx6slevk board. 1. Introduce a configuration file mx6slevk_spl_defconfig. 2. i.MX6SL has same DRAM space with i.MX6SX, need to change SPL DRAM SPACE. 3. Include imx6_spl.h and related SPL macro in mx6slevk.h. 4. select SUPPORT_SPL for TARGET_MX6SLEVK. 5. Add SPL board code to do related initialization. Boot Log: U-Boot SPL 2015.07-00544-g1594a76 (Aug 17 2015 - 01:56:59) reading u-boot.img reading u-boot.img U-Boot 2015.07-00544-g1594a76 (Aug 17 2015 - 01:56:59 +0000) CPU: Freescale i.MX6SL rev1.2 996 MHz (running at 396 MHz) CPU: Commercial temperature grade (0C to 95C) at 50C Reset cause: POR Board: MX6SLEVK I2C: ready DRAM: 1 GiB PMIC: PFUZE100 ID=0x10 MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2 *** Warning - bad CRC, using default environment In: serial Out: serial Err: serial Net: FEC [PRIME] Hit any key to stop autoboot: 0 Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
* imx: mx6: ddr: add LPDDR2 supportPeng Fan2015-09-02-4/+311
| | | | | | | | | | | | | | Add LPDDR2 support: 1. Implement a function mx6_lpddr2_cfg to initialize MMDC for LPDDR2. 2. Introduce a structure mx6_lpddr2_cfg, most entrys are same to mx6_ddr3_cfg, but still keep it a single one for easy to choose parameters for LPDDR2. 3. If ddr_type is LPDDR2, use mx6_lpddr2_cfg to init MMDC. 4. Update comments. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com>
* imx: mx6: ddr init MMDC according to ddr_typePeng Fan2015-09-02-2/+21
| | | | | | | | | | | | | | | | | To i.MX6, DDR3 and LPDDR2 is supported, so rename function mx6_dram_cfg to mx6_ddr3_cfg and the original mx6_dram_cfg function only is a wrapper. The new reimplemented function mx6_dram_cfg only invokes mx6_ddr3_cfg when ddr_type is for DDR3. Later we can use ddr_type to initialize MMDC for LPDDR2. Initialize ddr_type for different boards which enable SPL. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Stefan Roese <sr@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Stefan Roese <sr@denx.de>
* imx: mx6: ddr add an entry ddr_type for mx6_ddr_sysinfoPeng Fan2015-09-02-0/+6
| | | | | | | | | | | Add ddr_type entry for mx6_ddr_sysinfo. It will be used for differenrate DDR3 and LPDDR2. Introduce an enum type for ddr_type. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com>
* imx: mx6: ddr add mpzqlp2ctl entryPeng Fan2015-09-02-0/+2
| | | | | | | | | Add mpzqlp2ctl entry for mx6_mmdc_calibration. MMDC_MPZQLP2CTL register is for init tZQINIT, tZQCL, tZQCS for LPDDR2 chips. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com>
* imx: mx6: ddr add dram io configuration and header file for i.MX6SLPeng Fan2015-09-02-0/+150
| | | | | | | | | Define two structure mx6sl_iomux_ddr_regs and mx6sl_iomux_grp_regs. Add a new function mx6sl_dram_iocfg to configure dram io. Add header file to define macros for register address. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
* imx: mx6: ddr correct tRFC and tXSPeng Fan2015-09-02-2/+2
| | | | | | | | | | | To Chip density 4Gb, tRFC should be 300ns, see "Table 61 — Refresh parameters by device density" of JESD79-3E. tXS(min) is max(5nCK, tRFC(min) + 10ns). Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
* imx: mx6: ddr no support MMDC1 for i.MX6SLPeng Fan2015-09-02-2/+4
| | | | | | | | | i.MX 6SoloLite only supports MMDC0, so do not access MMDC1 for i.MX 6SL. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
* imx: mx6: ddr add more register entry for mmdc_p_regsPeng Fan2015-09-02-9/+56
| | | | | | | | | Add more register entry for MMDC structure. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
* tbs2910: remove SYS_SOC from board specific KconfigSoeren Moch2015-09-02-3/+0
| | | | | | | SYS_SOC is already defined in arch/arm/cpu/armv7/mx6/Kconfig, no need to define it again Signed-off-by: Soeren Moch <smoch@web.de>
* tbs2910: remove deprecated CONFIG_SYS_EXTRA_OPTIONSSoeren Moch2015-09-02-1/+6
| | | | | | move options from CONFIG_SYS_EXTRA_OPTIONS to board specific Kconfig Signed-off-by: Soeren Moch <smoch@web.de>
* tbs2910: use full name in Kconfig board selectionSoeren Moch2015-09-02-1/+1
| | | | Signed-off-by: Soeren Moch <smoch@web.de>
* imx: fec: add MAC reading from eFuses to READMEOlaf Mandel2015-09-02-1/+20
| | | | | | | | | | | | Extend the documentation of the fec_mxc configuration by describing its ability to read the ethaddr MAC address from the SoC eFuses. Also add an example how to program the fuses for an imx5 to clarify the byte order. Cc: Stefano Babic <sbabic at denx.de> Cc: Marek Vasut <marex at denx.de> Signed-off-by: Olaf Mandel <o.mandel at menlosystems.com>
* arm, imx6: aristainetos board updatesHeiko Schocher2015-09-02-11/+7
| | | | | | | | | | some small updates for the aristainetos boards: - fix display timings for the aristainetos board - fix pinmux for the aristainetos board - fix pinmux for the aristainetos2 board - fix default environment Signed-off-by: Heiko Schocher <hs@denx.de>
* imx: mx6sxsabresd: enable CONFIG_SPL_FAT_SUPPORTPeng Fan2015-09-02-0/+1
| | | | | | | Enable CONFIG_SPL_FAT_SUPPORT to load u-boot.img from FAT partition. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
* imx: mx6ul_14x14_evk add ENET supportPeng Fan2015-09-02-1/+135
| | | | | | | | | | | Add enet support for mx6ul_14x14_evk board: 1. add pinmux settings 2. implement board_eth_init 3. implement board_phy_config Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
* imx: ocotp: mxc add i.MX7D supportAdrian Alonso2015-09-02-1/+73
| | | | | | | | | * Ocotp of i.MX7D has different operation rule. This patch is to add support for i.MX7D ocotp. Signed-off-by: Adrian Alonso <aalonso@freescale.com> Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* imx: mxc_gpio: add support for imx7d SoCAdrian Alonso2015-09-02-3/+17
| | | | | | | | * Add mxc_gpio support for imx7d SoC * Use CONFIG_MX7 to extend mxc gpio driver support for imx7d Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Signed-off-by: Adrian Alonso <aalonso@freescale.com>
* imx: iomux-v3: add imx7d support for iomuxcAdrian Alonso2015-09-02-0/+1377
| | | | | | | | | | | | | | | * Add imx7d support for iomux controller * imx7d has two iomux controllers iomuxc (0x3033000) and iomuxc-lpsr (0x302C0000) each conroller provides control and mux mode pad registers but shares iomuxc input select register with iomuxc-lpsr IOMUX_CONFIG_LPSR flag is used to properly set daisy chain settings for iomuxc-lpsr pads. * Since mx7d introduces LPSR IOMUX pins, add new base to IOMUX v3 driver for these LPSR pins. Signed-off-by: Adrian Alonso <aalonso@freescale.com> Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* power: pmic: add pfuze3000 supportAdrian Alonso2015-09-02-0/+111
| | | | | | | | * Add pmic pfuze3000 support, implement power_pfuze3000_init to be used in power_init_board callback function. Signed-off-by: Adrian Alonso <aalonso@freescale.com> Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* net: fec: do not access reserved register for i.MX6ULPeng Fan2015-09-02-5/+9
| | | | | | | | | | The MIB RAM and FIFO receive start register does not exist on i.MX6UL. Accessing these register will cause enet not work well. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Signed-off-by: Fugang Duan <B38611@freescale.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Stefano Babic <sbabic@denx.de>
* imx: clock support enet2 anatop clock supportPeng Fan2015-09-02-12/+31
| | | | | | | | | | | | | | | | To i.MX6SX/UL, two ethernet interfaces are supported. Add ENET2 clock support: 1. Introduce a new input parameter "fec_id", only 0 and 1 are allowed. To value 1, only i.MX6SX/UL can pass the check. 2. Modify board code who use this api to follow new api prototype. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Heiko Schocher <hs@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefan Roese <sr@denx.de> Cc: Nikolaos Pasaloukos <Nikolaos.Pasaloukos@imgtec.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Stefan Roese <sr@denx.de>
* imx-common: consolidate macros and prototypes into sys_proto.hPeng Fan2015-09-02-87/+60
| | | | | | | | | | | | | | | | | Move most macro definitions and prototypes into "arch/arm/include/asm/imx-common/sys_proto.h" to avoid duplicated function prototypes and marco definitions for different i.MX SoCs. This patch do not remove the sys_proto.h for different i.MX SoCs, because we need to modify lots of driver code and others. This patch remove duplicated macros and prototypes and incude "sys_proto.h" of imx-common for each sys_proto.h of different i.MX platforms. Then later we should avoid add stuff in sys_proto.h of each platform, and modify driver to include common sys_proto.h. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de>
* imx: mxs: reimplement get_cpu_revPeng Fan2015-09-02-28/+25
| | | | | | | | | | | | Rewrite get_cpu_rev, from "static const char *get_cpu_rev(void)" to "u32 get_cpu_rev(void)". To align with get_cpu_rev of other i.MXes. Also write get_imx_type to replace get_cpu_type, since we have macro named get_cpu_type. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de>
* imx: mx31 use new formula for get_cpu_revPeng Fan2015-09-02-1/+3
| | | | | | | | | Use new formula for get_cpu_rev, since we need to use this formula to do runtime check for all i.MXes. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de>
* imx: mx27 implement get_cpu_revPeng Fan2015-09-02-0/+6
| | | | | | | | Implement get_cpu_rev to support runtime check using is_cpu_type. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de>
* imx: add cpu type for i.MX2 and i.MX3Peng Fan2015-09-02-0/+6
| | | | | | | | Add cpu types for i.MX2/3. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de>
* imx: mx6 move TARGET_xx Kconfig option to mx6 specific Kconfig filePeng Fan2015-09-02-132/+168
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move TARGET_xx Kconfig option based on mx6 to arch/arm/cpu/armv7/mx6/Kconfig. Add enable "CONFIG_ARCH_MX6" for boards based on mx6. Then we can choose target boards using "make ARCH=arm menuconfig" with ARCH_MX6 defined. If using original way, we have no chance to enable ARCH_MX6 when "make menuconfig". Even define CONFIG_ARCH_MX6=y in xx_defconfig, kconfig will complains "arch/../configs/platinum_titanium_defconfig:3: warning: override: TARGET_PLATINUM_TITANIUM changes choice state" Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Eric Bénard <eric@eukrea.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Eric Nelson <eric.nelson@boundarydevices.com> Cc: Marek Vasut <marex@denx.de> Cc: Christian Gmeiner <christian.gmeiner@gmail.com> Cc: Stefan Roese <sr@denx.de> Cc: Soeren Moch <smoch@web.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Soeren Moch <smoch@web.de> Acked-by: Otavio Salvador <otavio@ossystems.com.br> Acked-by: Christian Gmeiner <christian.gmeiner@gmail.com>
* mxs_ocotp: Shift the HBUS divider correctlyChris Smith2015-09-02-0/+1
| | | | | | | | | | | | | When the original HBUS divider value is retrieved in mxs_ocotp_scale_hclk() for the purpose or restoring it back later, the value is not shifted by the HBUS divider offset in that register. This is not a problem, since the shift is zero on all MXS hardware. Add the shift anyway, for completeness and in case FSL ever decides to re-use this driver on future designs. Signed-off-by: Chris Smith <chris@zxdesign.info> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
* ARM: ts4800: add ethernet supportDamien Riegel2015-09-02-0/+130
| | | | | | | | | | This commit adds ethernet support to the TS4800. Note that the MAC address is not fused on this board and have to be read from FEC PALR PAUR registers (this is how the kernel provided by Technologic Systems does it). signed-off-by: Damien Riegel <damien.riegel@savoirfairelinux.com> Cc: Stefano Babic <sbabic@denx.de>
* ARM: ts4800: add basic board supportLucile Quirion2015-09-02-0/+376
| | | | | | | | | | | | This commit adds basic support including: MMC, Serial console, TS4800 watchdog The config use CONFIG_SKIP_LOWLEVEL_INIT as U-boot is used as a second stage bootloader. Signed-off-by: Lucile Quirion <lucile.quirion@savoirfairelinux.com> signed-off-by: Damien Riegel <damien.riegel@savoirfairelinux.com> Cc: Stefano Babic <sbabic@denx.de>
* nitrogen6x: change maintainerEric Nelson2015-09-02-1/+1
| | | | | | | Troy Kisky will be maintaining the Nitrogen6x board going forward. Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Troy Kisky <troy.kisky@boundarydevices.com>
* cgtqmx6eval: Add Ethernet supportOtavio Salvador2015-09-02-0/+224
| | | | | | | | | cgtqmx6eval can be populated with a AR8035 or KSZ9031 depending on the board revision. Add Ethernet support. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
* arm: mxs: Fix mkimage invocationMarek Vasut2015-09-02-6/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove this ad-hoc mkimage invocation in MXS Makefile and replace it with the standard mkimage rule instead. This patch fixes recent build issues introduced by the patch 92a655c mkimage: Set up a file size parameter and keep it updated These build issues could be triggered by building for example the MX28EVK and the u-boot.sb image: $ make mx28evk_defconfig $ make V=1 u-boot.sb [...] make -f ./scripts/Makefile.build obj=arch/arm/cpu/arm926ejs/mxs u-boot.sb ./tools/mkimage -n arch/arm/cpu/arm926ejs/mxs/mxsimage.mx28.cfg -T mxsimage u-boot.sb ./tools/mkimage: Can't open (null): Bad address arch/arm/cpu/arm926ejs/mxs/Makefile:82: recipe for target 'u-boot.sb' failed make[1]: *** [u-boot.sb] Error 1 Makefile:989: recipe for target 'u-boot.sb' failed make: *** [u-boot.sb] Error 2 With this patch: ./tools/mkimage -n arch/arm/cpu/arm926ejs/mxs/mxsimage.mx28.cfg -T mxsimage -d arch/arm/cpu/arm926ejs/mxs/mxsimage.mx28.cfg u-boot.sb Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Juha Lumme <juha.lumme@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* tools: mxsboot: calculate ECC block level dynamicallyJörg Krause2015-09-02-17/+4
| | | | | | | | | | | | | | For pages of 2048 bytes the current setting of the ECC Error Correction Level is only true for an oob size of 64 bytes and wrong for all others. Instead of hard-coding every possible combination of page size and oob size use the dynamic calculation of the ECC strength introduced in commit 6121560d7714d6d8e41ce1687a1388a1a8fea4cb. Cc: Marek Vasut <marex@denx.de> Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks> Acked-by: Marek Vasut <marex@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de>
* imx: mx6ul_14x14_evk discard redefined CONFIG_MX6Peng Fan2015-09-02-1/+0
| | | | | | | | | | | | Discard CONFIG_MX6 in mx6ul_14x14_evk.h, since it is already defined in mx6_common.h. Tested on mx6ul_14x14_evk board. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de>
* arm: mx6: Remove SPI support from WRU-IV baseboardStefan Roese2015-09-02-1/+9
| | | | | | | | | | | | This patch removes the SPI support from the WRU-IV baseboard as its not used at all. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Clemens Gruber <clemens.gruber@pqgruber.com> Cc: Markus Niebel <Markus.Niebel@tq-group.com> Cc: Stefano Babic <sbabic@denx.de> Tested-by: Clemens Gruber <clemens.gruber@pqgruber.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
* udoo: Remove SPL fat supportvpeter42015-09-02-1/+1
| | | | | | | | | | Use dd'ed SPL and u-boot.img by default. Signed-off-by: Peter Vicman <peter.vicman@gmail.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de> Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
* udoo: Switch to SPL supportvpeter42015-09-02-253/+351
| | | | | | | | | | | | | | | | | | | Currently we need to build one U-boot image for each of the udoo variants: quad and dual-lite. By switching to SPL we can support all two variants with a single binary. Based on the SPL for wandboard. Tested with OpenELEC (Open Embedded Linux Entertainment Center) on both boards. Signed-off-by: Peter Vicman <peter.vicman@gmail.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Peter Vicman <peter.vicman@gmail.com> Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
* tools/imximage: set DCD pointer to NULL when its length is 0Baruch Siach2015-09-02-1/+5
| | | | | | | | | | | | | | | | | When dcd_len is 0 the Write Data command that the set_dcd_rst_v2() routine generates is empty. This causes HAB to complain that the command is invalid. --------- HAB Event 1 ----------------- event data: 0xdb 0x00 0x0c 0x41 0x33 0x06 0xc0 0x00 0xcc 0x00 0x04 0x04 To fix this set the DCD pointer in the IVT to NULL in this case. The DCD header itself is still needed for detect_imximage_version() to determine the image version. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Acked-by: Stefano Babic <sbabic@denx.de>
* Merge branch 'master' of http://git.denx.de/u-boot-sunxiTom Rini2015-08-31-181/+990
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| * sunxi: increase SYS_MONITOR_LENBoris Brezillon2015-08-31-1/+1
| | | | | | | | | | | | Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: mmc: set transfer timeout according to byte_cnt.Yousong Zhou2015-08-31-2/+4
| | | | | | | | | | | | | | | | | | | | | | Originally a timeout value of 2 seconds was used regardless of the size of data to be transfered. This prevented slow devices from working correctly while there was no much gain for faster devices, e.g. it takes 3708ms for a transfer of uImage of size 1899008 bytes. Signed-off-by: Yousong Zhou <yszhou4tech@gmail.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: Enable non-secure access to RTC on sun6i (A31s)Chen-Yu Tsai2015-08-31-0/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | On the A31s the RTC is by default secured. Thus when u-boot loads the kernel in non-secure world, the RTC is unavailable. The SoC has a TrustZone Protection Controller, which can be used to enable non-secure access to the RTC. On the A31 the TZPC doesn't seem to do anything, i.e. changes to its register contents do not affect access to the RTC. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: Fix MAINTAINERS board sortingHans de Goede2015-08-31-1/+1
| | | | | | | | | | | | | | | | The boards are sorted by SoC, move the Mele_A1000G_quad entry to the list of sun6i boards where it belongs. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>