| Commit message (Collapse) | Author | Age | Lines |
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Fix coverity:392391 392382 392385 Unsigned compared against 0
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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Add return value check
Coverity 392391
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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The device managed API actually not free the memory, so need
to use devm_kfree to free the memory to avoid leakage.
Coverity: 392384 resource leak
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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There are two problems in enabling DDR mode in this new driver:
1. The TDH bits in FLSHCR register should be set to 1. Otherwise, the TX DDR delay logic
won't be enabled. Since u-boot driver does not have DDR commands in LUT. So this won't
cause explicit problem.
2. When doing read/write/readid/erase operations, the MCR register is overwritten, the bits
like DDR_EN are cleared during these operations. When we using DDR mode QSPI boot, the TDH bit
is set to 1 by ROM. if the DDR_EN is cleared, there is no clk2x output for TX data shift.
So these operations will fail.
The explicit problem is users may get "SF: unrecognized JEDEC id bytes: ff, ff, ff" error
after using DDR mode QSPI boot on 6UL/ULL EVK boards.
Signed-off-by: Ye Li <ye.li@nxp.com>
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A wrong config name is used for QSPI boot, it causes IVT offset wrong.
Fix the typo issue.
Signed-off-by: Ye Li <ye.li@nxp.com>
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Need to power down WDOG3 for mx6ull, otherwise the kernel will reboot once the
iomux for WDOG_ANY pin is configured. This is missed in community u-boot.
Signed-off-by: Ye Li <ye.li@nxp.com>
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Clean up the print info, so that the reset cause print can display in
a new line.
Signed-off-by: Ye Li <ye.li@nxp.com>
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Fix incorrect value for 696MHz CPU frequency on i.MX6UL.
Signed-off-by: Ye Li <ye.li@nxp.com>
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Use CONFIG_DM_USB to comment out USB setup functions used by non-DM driver. So
they won't be executed when using DM driver.
These USB setup functions may setup power control pins to USB_PWR function not GPIO,
which is different as the GPIO function used by USB vbus-supply. And cause the power control
not work.
Signed-off-by: Ye Li <ye.li@nxp.com>
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The USDHC2 is connecting to BT/WIFI chip on SDB board, this controller is enabled
in device tree as SDIO, but USDHC driver in u-boot will use it as SDHC. So totally
3 USDHC devices will be created, and cause run time MMC environments go wrong because
it only supports USDHC1 and USDHC3.
So disable the unused USDHC2 controller in u-boot device tree.
Signed-off-by: Ye Li <ye.li@nxp.com>
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Wrong env buffer was passed into sata write function, so the saveenv can't work.
Fix this issue.
Signed-off-by: Ye Li <ye.li@nxp.com>
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The DM Ethernet driver requests the "ethprime" to align with DTB name
or start with "eth" with seq number as index.
So previous name "FEC" can't work as prime. Must change it to the "eth0" for
first ethernet device, or "eth1" for second one.
Signed-off-by: Ye Li <ye.li@nxp.com>
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Wrong bmode value is used in community u-boot for usb reboot. And cause
it failed. Fix this by using a reserved bootcfg value.
Signed-off-by: Ye Li <ye.li@nxp.com>
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The recent ehci-mx6 driver can support vbus-supply property, no need
to request io expander pins in usb setup. If did this, the regulator
for vbus-supply will fail to get due to the pin is occupied.
Signed-off-by: Ye Li <ye.li@nxp.com>
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PFUZE3000_SW1AB_SETP()
Commit:894a4b4da7e2 add the voltage configuration macro that base on
the 0.1mV precision, and i.MX6UL/i.MX6ULL/i.MX7D use the macro as 1mV
prevision that cause the conversion are wrong, then some boards cannot
boot up in ldo bypass mode.
The patch just correct the usage of PFUZE3000_SW1AB_SETP().
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
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For some i.MX6SL evk board, enet phy need reset.
Add phy reset before phy clock enable and init the
pinctrl earlier.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
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Copy the dts files from kernel for MX6SXSCM EVB board for
preparing enabling the OF_CONTROL.
Signed-off-by: Juan Gutierrez <juan.gutierrez@nxp.com>
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Update mx6sxscm boards code and build configurations to enable
OF_CONTROL and DM drivers.
1. Update GPIO codes for adding gpio request
2. Update PMIC and LDO by-pass codes for DM PMIC
3. Add lpddr2 512MB size and eMMC options tolocal Kconfig
4. Update license with NXP 2017
5. Add defconfigs for EVB boards
Signed-off-by: Juan Gutierrez <juan.gutierrez@nxp.com>
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Move the scm mx6sxscm board generic support code from v2016.03
as the base for converting to use DTB OF_CONTROL
Signed-off-by: Juan Gutierrez <juan.gutierrez@nxp.com>
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1. set fdt_file according to board_rev which is set at runtime
2. Add macros for proper delimitation for different board builds
3. Fix and add proper iomux configuration
Signed-off-by: Juan Gutierrez <juan.gutierrez@nxp.com>
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Copy the dts files from kernel for qwks boards for preparing
enabling the OF_CONTROL.
Signed-off-by: Juan Gutierrez <juan.gutierrez@nxp.com>
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Update mx6dqscm boards code and build configurations to enable
OF_CONTROL and DM drivers.
1. Update GPIO codes for adding gpio request
2. Enable USB DM driver
3. Update PMIC and LDO by-pass codes for DM PMIC
4. Add spinor boot support
5. Add lpddr2 modes, sizes and boards on local Kconfig
6. Update license with NXP 2017
7. Add defconfigs for qwks boards
Signed-off-by: Juan Gutierrez <juan.gutierrez@nxp.com>
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Move the scm mx6dqscm board generic support code from v2016.03
as the base for converting to use DTB OF_CONTROL.
Signed-off-by: Juan Gutierrez <juan.gutierrez@nxp.com>
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Remove CONFIG_IS_ENABLED() macro in the driver, it seems the macro don't work
in the config build for mx6sxsabreauto_config platform.
And CONFIG_IS_ENABLED(FOO) evaluates to
* 1 if CONFIG_SPL_BUILD is undefined and CONFIG_FOO is set to 'y' or 'm',
* 1 if CONFIG_SPL_BUILD is defined and CONFIG_SPL_FOO is set to 'y' or 'm'
If enable CONFIG_SPL_BUILD, then CONFIG_FOO doesn't work.
Now remove the CONFIG_IS_ENABLED() in the driver.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
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The compatible string "fsl,imx6sl-fec" is missed for i.mx6sl in
u-boot FEC driver, so that FEC can't be recognized.
Signed-off-by: Ye Li <ye.li@nxp.com>
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VGEN3 and VGEN5 have been fused the right value in PF0100 on i.mx6qp board,
so software didn't need to change their voltage output anymore. Otherwise,
VGEN3 will be wrongly updated from 1.8v to 2.8v.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
(cherry picked from commit 6f7f185664a401f03f6ce6c81b996c1f27fdbe73)
Signed-off-by: Ye Li <ye.li@nxp.com>
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For LPI2C IP, NACK is detected by the rising edge of the ninth clock.
In current uboot driver, once NACK is detected, it will reset and then
disable LPI2C master. As a result, we can never see the falling edge
of the ninth clock.
Signed-off-by: Gao Pan <pandy.gao@nxp.com>
(cherry picked from commit dd139ee52b709c95af3e0c968bcbc3cf42cca408)
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Current USDHC driver will reset VSELECT to 0 (3.3v) during mmc init,
then set to 1 for 1.8v eMMC I/O. When booting from eMMC, since ROM has
already set VSELECT to 1.8v before running the u-boot. This reset in
USDHC driver causes a short 2.2v pulse on CMD pin.
Fix this issue by not reset VSELECT to 0 when 1.8v flag is set.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit f01ebfdaa57b4c74ede32a6a40cf9cf9184ce049)
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Fix wrong usage of device_get_supply_regulator.
device_get_supply_regulator returns 0 on success.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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The new ROM patch will set DENOM and NUM of APLL and SPLL to 0 to
workaround PLL issue.
When DENOM is 0, the PLL rate calculation will divide 0 and raise a signal.
raise: Signal # 8 caught
To avoid such problem, we change our calculation.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit f28cf489e1b3864bac6bae4944d8a73bab30ec32)
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The GPU uses APLL PFD2 as its clock parent (483.84Mhz) with divider set to 1.
This frequecy is out of ULP A0 spec. The MAX rate for GPU is 350Mhz.
So we simply configure the APLL PFD2 to 345.6Mhz (FRAC=28) to workaround the problem.
The correct fix should let GPU handle the clock rate in kernel.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit e931d534fd68e0e639082766de17a20e705fd908)
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The tools/makefile will build a libfdt Python module if swig is available.
But actually it not only need swig but also need python libary. We will get
build break below when python is not installed. It is better to add more
check for python lib.
Because applications may install some python libs, but not the full libpython-dev,
then the Python.h is missed. We check Python.h to instead checking libs.
tools/libfdt_wrap.c:147:21: fatal error: Python.h: No such file or directory
Signed-off-by: Ye Li <ye.li@nxp.com>
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The CONFIG_SYS_USE_NAND is not used in v2017.03. We have to replace it
by other NAND configurations, like CONFIG_CMD_NAND or CONFIG_NAND_MXS.
Signed-off-by: Ye Li <ye.li@nxp.com>
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To use keyboard on mx6slevk, some configurations are added in android header files.
Need adding them to config_whilelist.txt
Signed-off-by: Ye Li <ye.li@nxp.com>
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The button pad setting is missed during cherry-pick.
Signed-off-by: Ye Li <ye.li@nxp.com>
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The CONFIG_USB_GADGET is duplicated set in defconfig and android header file.
Remove it from defconfig
Signed-off-by: Ye Li <ye.li@nxp.com>
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Missed to add eMMC dts file to Makefile
Signed-off-by: Ye Li <ye.li@nxp.com>
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In Kconfig, the CONFIG_MXC_EPDC depends on CONFIG_LCD.
We can't only set the CONFIG_MXC_EPDC in defconfig and set CONFIG_LCD in header file.
This will cause the both two configs are not selected. So in fact the epdc codes
are not compiled.
Signed-off-by: Ye Li <ye.li@nxp.com>
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add splash screen feature for epdc.
it's tested on imx6sll arm2 board and evk board.
Signed-off-by: Robby Cai <robby.cai@nxp.com>
(cherry picked from commit c85c6f2a0f08dfc6c2859fe969b2021ab32b9370)
Signed-off-by: Ye Li <ye.li@nxp.com>
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The sparse image writing and boot image reading may have cache unaligned problem.
The u-boot v2017 will print warning at runtime. This patch fixes the
unaligned problem.
Signed-off-by: Ye Li <ye.li@nxp.com>
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Since we need the setexpr command for m4 image loading, so enable
the CONFIG_CMD_SETEXPR for i.MX6SX defconfigs with m4 boot enabled.
Signed-off-by: Ye Li <ye.li@nxp.com>
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The endianness is not set at qspi driver initialization. So if we don't
boot from QSPI, we will get wrong endianness when accessing from AHB address
directly.
Signed-off-by: Ye Li <ye.li@nxp.com>
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Fix below build warning by declaring sata_get_dev the in the part.h
common/env_sata.c: In function 'saveenv':
common/env_sata.c:70:9: warning: implicit declaration of function 'sata_get_dev' [-Wimplicit-function-declaration]
sata = sata_get_dev(env_sata);
^
common/env_sata.c:70:7: warning: assignment makes pointer from integer without a cast [-Wint-conversion]
sata = sata_get_dev(env_sata);
^
common/env_sata.c: In function 'env_relocate_spec':
common/env_sata.c:116:7: warning: assignment makes pointer from integer without a cast [-Wint-conversion]
sata = sata_get_dev(env_sata);
Signed-off-by: Ye Li <ye.li@nxp.com>
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The wp-gpios property is used for gpio, if this is set, the WP pin is muxed
to gpio function, can't be used as internal WP checking.
This patch changes to examine the "fsl,wp-controller" for using internal WP checking. And
wp-gpios for using gpio pin.
Signed-off-by: Ye Li <ye.li@nxp.com>
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The CONFIG_CMD_BOOTD is commented in the defconfig files, then the default boot
can't work. We need to uncomment it for auto boot.
Signed-off-by: Ye Li <ye.li@nxp.com>
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Since the u-boot size increases after using OF_CONTROL to including DTB,
we have to adjust ENV_OFFSET to 896K for SD/eMMC/FLASH/SATA.
Signed-off-by: Ye Li <ye.li@nxp.com>
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Change the i2c alias seq number to align with device index. So in lpi2c
driver we don't need to add 4 to get the device index. This codes may not
valid on other platforms.
Signed-off-by: Ye Li <ye.li@nxp.com>
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The MX6SL, SLL and ULL have DCP to replace CAAM in SoC. We have to
disable the CAAM driver for them.
Signed-off-by: Ye Li <ye.li@nxp.com>
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Modify the CONFIG_CSF_SIZE to 0x4000 to align with v2016.03. Also remove
the duplicated setting for CSF size.
Signed-off-by: Ye Li <ye.li@nxp.com>
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The num/denom is a float value, but in the calculation it is convert
to integer 0, and cause the result wrong.
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit 4a8f51499ca098637e9ee2036066374d34458865)
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