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* | arm: cache: always flush cache line size for page tableStefan Agner2016-08-26-1/+13
| | | | | | | | | | | | | | | | | | | | | | | | The page table is maintained by the CPU, hence it is safe to always align cache flush to a whole cache line size. This allows to use mmu_page_table_flush for a single page table, e.g. when configure only small regions through mmu_set_region_dcache_behaviour. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Tested-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de>
* | arm: cache: add support for LPAE for region D$ behaviorStefan Agner2016-08-26-0/+4
| | | | | | | | | | | | | | Add LPAE support for mmu_set_region_dcache_behaviour. The function is in use in some LPAE capable board such TI DRA7xx or NXP i.MX 7. Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
* | arch/arm/Kconfig: Whitespace correctionTom Rini2016-08-26-28/+28
| | | | | | | | | | | | Use a tab not 8 spaces. Signed-off-by: Tom Rini <trini@konsulko.com>
* | ARM: Move SYS_CACHELINE_SIZE over to KconfigTom Rini2016-08-26-182/+32
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This series moves the CONFIG_SYS_CACHELINE_SIZE. First, in nearly all cases we are mirroring the values used by the Linux Kernel here. Also, so long as (and in this case, it is true) we implement flushes in hunks that are no larger than the smallest implementation (and given that we mirror the Linux Kernel, again we are fine) it is OK to align higher. The biggest changes here are that we always use 64 bytes for CPU_V7 even if for example the underlying core is only 32 bytes (this mirrors Linux). Second, we say ARM64 uses 64 bytes not 128 (as found in the Linux Kernel) as we do not need multi-platform support (to this degree) and only the Cavium ThunderX 88xx series has a use for such large alignment. Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Prafulla Wadaskar <prafulla@marvell.com> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Stefan Roese <sr@denx.de> Cc: Nagendra T S <nagendra@mistralsolutions.com> Cc: Vaibhav Hiremath <hvaibhav@ti.com> Acked-by: Lokesh Vutla <lokeshvutla@ti.com> Cc: Steve Rae <steve.rae@raedomain.com> Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Nikita Kiryanov <nikita@compulab.co.il> Cc: Stefan Agner <stefan.agner@toradex.com> Acked-by: Heiko Schocher <hs@denx.de> Cc: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Cc: Peter Griffin <peter.griffin@linaro.org> Acked-by: Paul Kocialkowski <contact@paulk.fr> Cc: Anatolij Gustschin <agust@denx.de> Acked-by: "Pali Rohár" <pali.rohar@gmail.com> Cc: Adam Ford <aford173@gmail.com> Cc: Steve Sakoman <sakoman@gmail.com> Cc: Grazvydas Ignotas <notasas@gmail.com> Cc: Nishanth Menon <nm@ti.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Robert Baldyga <r.baldyga@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Thomas Weber <weber@corscience.de> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: David Feng <fenghua@phytium.com.cn> Cc: Alison Wang <b18965@freescale.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Simon Glass <sjg@chromium.org> Cc: York Sun <york.sun@nxp.com> Cc: Shengzhou Liu <Shengzhou.Liu@nxp.com> Cc: Mingkai Hu <mingkai.hu@nxp.com> Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Cc: Aneesh Bansal <aneesh.bansal@freescale.com> Cc: Saksham Jain <saksham.jain@nxp.com> Cc: Qianyu Gong <qianyu.gong@nxp.com> Cc: Wang Dongsheng <dongsheng.wang@nxp.com> Cc: Alex Porosanu <alexandru.porosanu@freescale.com> Cc: Hongbo Zhang <hongbo.zhang@nxp.com> Cc: tang yuantian <Yuantian.Tang@freescale.com> Cc: Rajesh Bhagat <rajesh.bhagat@nxp.com> Cc: Josh Wu <josh.wu@atmel.com> Cc: Bo Shen <voice.shen@atmel.com> Cc: Viresh Kumar <viresh.kumar@linaro.org> Cc: Hannes Schmelzer <oe5hpm@oevsv.at> Cc: Thomas Chou <thomas@wytron.com.tw> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Sam Protsenko <semen.protsenko@linaro.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Christophe Ricard <christophe-h.ricard@st.com> Cc: Anand Moon <linux.amoon@gmail.com> Cc: Beniamino Galvani <b.galvani@gmail.com> Cc: Carlo Caione <carlo@endlessm.com> Cc: huang lin <hl@rock-chips.com> Cc: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Cc: Xu Ziyuan <xzy.xu@rock-chips.com> Cc: "jk.kernel@gmail.com" <jk.kernel@gmail.com> Cc: "Ariel D'Alessandro" <ariel@vanguardiasur.com.ar> Cc: Kever Yang <kever.yang@rock-chips.com> Cc: Samuel Egli <samuel.egli@siemens.com> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Hans de Goede <hdegoede@redhat.com> Cc: Ian Campbell <ijc@hellion.org.uk> Cc: Siarhei Siamashka <siarhei.siamashka@gmail.com> Cc: Boris Brezillon <boris.brezillon@free-electrons.com> Cc: Andre Przywara <andre.przywara@arm.com> Cc: Bernhard Nortmann <bernhard.nortmann@web.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Ben Whitten <ben.whitten@gmail.com> Cc: Tom Warren <twarren@nvidia.com> Cc: Alexander Graf <agraf@suse.de> Cc: Sekhar Nori <nsekhar@ti.com> Cc: Vitaly Andrianov <vitalya@ti.com> Cc: "Andrew F. Davis" <afd@ti.com> Cc: Murali Karicheri <m-karicheri2@ti.com> Cc: Carlos Hernandez <ceh@ti.com> Cc: Ladislav Michl <ladis@linux-mips.org> Cc: Ash Charles <ashcharles@gmail.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Daniel Allred <d-allred@ti.com> Cc: Gong Qianyu <Qianyu.Gong@freescale.com> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Chin Liang See <clsee@altera.com> Tested-by: Stephen Warren <swarren@nvidia.com> Acked-by: Paul Kocialkowski <contact@paulk.fr>
* Merge branch 'master' of git://git.denx.de/u-boot-i2cTom Rini2016-08-26-2/+2
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| * i2c: mvtwsi: Fix order of address bytes (high to low)Stefan Roese2016-08-26-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | Patch f8a10ed1 [i2c: mvtwsi: Make address length variable] accidentally inverted the sequence of address bytes sent to the I2C device. This patch corrects this by sending the highest byte first and the lowest byte last again. Tested on theadorable Armada-XP board. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Mario Six <mario.six@gdsys.cc> Cc: Heiko Schocher <hs@denx.de>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-marvellTom Rini2016-08-26-43/+39
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| * | tools: kwboot: patch destaddr only for SoCs with header version 1Simon Baatz2016-08-26-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit f4db6c976cf ("arm: mvebu: Add runtime detection of UART (xmodem) boot-mode") added a change to hdr->destaddr when dynamically patching an image for UART boot mode. With this change, kwboot ceases to work on Kirkwood. Thus, let's change hdr->destaddr only when we are patching an image with header version 1 (Orion and Kirkwood use header version 0). Signed-off-by: Simon Baatz <gmbnomis@gmail.com> Fixes: f4db6c976cf ("arm: mvebu: Add runtime detection of UART (xmodem) boot-mode") Cc: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Kevin Smith <kevin.smith@elecsyscorp.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | arm: mvebu: a38x: typo fix cpabilities -> capbilitiesChris Packham2016-08-26-1/+1
| | | | | | | | | | | | | | | Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | arm: mvebu: a38x: update serdes error handlingChris Packham2016-08-26-19/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | Ensure appropriate error messages are generated. Previously all errors indicated that the serdes was already in use. Now appropriate error messages are given. Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | spl: Remove unused CONFIG_SPL_SPI_* definitionsChris Packham2016-08-26-14/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | As of commit 88e34e5 ("spl: replace CONFIG_SPL_SPI_* with CONFIG_SF_DEFAULT_*") these defines are not used. Remove them to avoid confusion. Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | arm: mvebu: Add support for NAND interface on A-38xChris Packham2016-08-26-1/+10
| |/ | | | | | | | | | | | | | | | | | | | | The NAND interface on the Armada-38x series is similar to that on the Armada-XP. The key difference is that the NAND ECC clock ratio is provided via the DFX Server registers instead of the Core Clock. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Dirk Eibach <eibach@gdsys.de> Signed-off-by: Stefan Roese <sr@denx.de>
* | spi: tegra: fix hang in set_mode()Stephen Warren2016-08-25-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In tegra20_slink.c, the set_mode() function may be executed before the SPI bus is claimed the first time, and hence the clocks to the SPI controller may not be running. If so, any register read/write at this time will hang the CPU. Fix this by ensuring the clock is running as soon as the driver is probed. This is observed on the Tegra30 Beaver board. Apply the same clock initialization fix to all other Tegra SPI drivers so that if set_mode() is ever implemented there, the same bug will not appear. Note that tegra114_spi.c already operates in this fashion. The clock manipulation code is copied from claim_bus() to probe() rather than moved. This ensures that any calls to set_speed() take effect; the clock can't be set once during probe and left unchanged. Fixes: 5cb1b7b395c0 ("spi: tegra20: Add support for mode selection") Cc: Mirza Krak <mirza.krak@hostmobility.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | ARM: tegra: remove stale nvidia, bpmp I2C DT propertyStephen Warren2016-08-25-11/+0
| | | | | | | | | | | | | | | | | | | | The nvidia,bpmp property is left over from an old BPMP I2C binding, and shouldn't be present. Remove it from the SoC DT file, and update the I2C driver not to parse it; the value wasn't used for anything any more anyway. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | ARM: tegra: fix Tegra186 SDHCI clock/reset namesStephen Warren2016-08-25-7/+5
| | | | | | | | | | | | | | | | | | The Tegra SDHCI binding dictates that the reseet name for the Tegra SDHCI clock be "sdhci" not "sdmmc", and that the clock is accessed by index rather than by name. Fix the Tegra186 DT and MMC driver to honor this. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | ARM: tegra: fix Tegra186 I2C clock nameStephen Warren2016-08-25-9/+9
|/ | | | | | | | The Tegra I2C binding dictates that the clock name for the Tegra I2C clock be "div-clk" not "i2c". Fix the Tegra186 DT and I2C driver to honor this. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* Merge branch 'master' of git://git.denx.de/u-boot-netTom Rini2016-08-23-174/+293
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| * net: mii: check phy advertising register when geting link statusDongpo Li2016-08-22-4/+14
| | | | | | | | | | | | | | | | | | | | | | | | When phy autoneg on, the link speed and duplex should be determined by phy advertising register and phy link partner ability register. Check phy advertising register when geting phy link speed and duplex if autoneg on. Signed-off-by: Dongpo Li <lidongpo@hisilicon.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * net: davinci_emac: Restore the internal MDIO accessors return valueskarl beldan2016-08-22-7/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The spatch series converting legacy drivers from miiphy_register to mdio_register changed the return convention of the davinci_emac internal MDIO accessors, making the internal code relying on it misbehaving: no mdiodev get registered and U-Boot crashes when using net cmds in the context of the old legacy net API. ATM davinci_emac_initialize and cpu_eth_init don't return a proper value in that case but fixing them would not avoid the crash. This change is just a follow-up to the spatch pass, the MDIO accessors of the mdiodev introduced by the spatch pass retain their proper values. Signed-off-by: Karl Beldan <karl.beldan+oss@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * net/fm: Remove unused code of FMan QMIHou Zhiqiang2016-08-22-3/+0
| | | | | | | | | | | | | | | | The QMan is not used in FMan IM mode, so no QMI enqueue or QMI dequeue are performed. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * net: davinci_emac: Invalidate only the received portion of a bufferkarl beldan2016-08-22-5/+5
| | | | | | | | | | | | | | | | | | | | ATM when receiving a packet the whole buffer is invalidated, this change optimizes this behaviour. Signed-off-by: Karl Beldan <karl.beldan+oss@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
| * net: davinci_emac: Round up top tx buffer boundaries for dcache opskarl beldan2016-08-22-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | check_cache_range() warns that the top boundaries are not properly aligned when flushing or invalidating the buffers and make these operations fail. This gets rid of the remaining warnings: CACHE: Misaligned operation at range Signed-off-by: Karl Beldan <karl.beldan+oss@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
| * net: davinci_emac: Remove useless dcache ops on descriptorskarl beldan2016-08-22-28/+0
| | | | | | | | | | | | | | | | | | | | | | | | ATM the rx and tx descriptors are handled as cached memory while they lie in a dedicated RAM of the SoCs, which is an uncached area. Removing the said dcache ops, while optimizing the logic and clarifying the code, also gets rid of most of the check_cache_range() incurred warnings: CACHE: Misaligned operation at range Signed-off-by: Karl Beldan <karl.beldan+oss@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * net: nfs: Simplify rpc_add_credentials()Joe Hershberger2016-08-22-16/+3
| | | | | | | | | | | | | | We use an empty hostname, so remove all the "processing" of the known-to-be-empty hostname and just write 0's where needed. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
| * net: nfs: Use the tx buffer to construct rpc msgsJoe Hershberger2016-08-22-43/+45
| | | | | | | | | | | | | | | | | | Instead of always allocating a huge temporary buffer on the stack and then memcpy()ing the result into the transmit buffer, simply figure out where in the transmit buffer the bytes will belong and write them there directly as each message is built. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
| * net: nfs: Move some prints to debug statementsJoe Hershberger2016-08-22-21/+22
| | | | | | | | | | | | | | | | Much of the information is verbose and derived directly from the environment. Only output in debug mode. This also saves about 300 bytes from the code size. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
| * net: nfs: Use consistent names for the rpc_pktJoe Hershberger2016-08-22-17/+17
| | | | | | | | | | | | | | Use the same name throughout the nfs code and use the same member of the union to avoid casts. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
| * net: nfs: Correct a commentJoe Hershberger2016-08-22-1/+1
| | | | | | | | | | | | The buffer is of 32-bit elements, not bytes. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
| * net: nfs: Consolidate handling of NFSv3 attributesJoe Hershberger2016-08-22-92/+59
| | | | | | | | | | | | | | Instead of repeating the same large snippet for dealing with attributes it should be shared with a helper function. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
| * net: nfs: Fix lines that are too longJoe Hershberger2016-08-22-3/+6
| | | | | | | | | | | | Fix complaints from checkpatch.pl. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
| * net: nfs: Correct the reply data buffer sizeJoe Hershberger2016-08-22-1/+1
| | | | | | | | | | | | | | | | | | | | The type of the buffer is uint32_t, but the parameter used to size it is referring to bytes. Divide by the size of the array elements. Strictly speaking, this shouldn't be needed at all... It could just be 1 just like the request. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
| * net: nfs: Share the file handle buffer for v2 / v3Joe Hershberger2016-08-22-7/+5
| | | | | | | | | | | | | | The v3 handles can be larger than v2, but that doesn't mean we need a separate buffer. Reuse the same (larger) buffer for both. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
| * net: NFS: Add NFSv3 supportGuillaume GARDET2016-08-22-47/+242
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enables NFSv3 support. If NFSv2 is available use it as usual. If NFSv2 is not available, but NFSv3 is available, use NFSv3. If NFSv2 and NFSv3 are not available, print an error message since NFSv4 is not supported. Tested on iMX6 sabrelite with 4 Linux NFS servers: * NFSv2 + NFSv3 + NFSv4 server: use NFSv2 protocol * NFSv2 + NFSv3 server: use NFSv2 protocol * NFSv3 + NFSv4 server: use NFSv3 protocol * NFSv3 server: use NFSv3 protocol Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr> Cc: Tom Rini <trini@konsulko.com> Cc: joe.hershberger@ni.com Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * net: nfs: Remove unused defineJoe Hershberger2016-08-22-2/+0
| | | | | | | | | | | | Unreferenced, so remove the noise. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
| * net: nfs: Remove separate buffer for default nameJoe Hershberger2016-08-22-3/+1
| | | | | | | | | | | | | | | | There is no reason to store the default filename in a separate buffer only to immediately copy it to the main name buffer. Just write it there directly and remove the other buffer. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
| * net: Stop including NFS overhead in defragment maxJoe Hershberger2016-08-22-9/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | At least on bfin, this "specimen" is actually allocated in the BSS and wastes lots of memory in already tight memory conditions. Also, with the introduction of NFSv3 support, this waste got substantially larger. Just remove it. If a board needs a specific different defragment size, that board can override this setting. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
* | Prepare v2016.09-rc2Tom Rini2016-08-22-1/+1
| | | | | | | | Signed-off-by: Tom Rini <trini@konsulko.com>
* | fs-test.sh: Correct check_md5() test with newlinesTom Rini2016-08-22-1/+1
|/ | | | | | | | | | The fs-test.sh script expected there to be a \n\r style newline at the end of the output. This is no longer the case, so use 'tr' to remove the \r that we get. Fixes: (c5917b4b054d "dm: serial-uclass: Move a carriage return before a line feed") Signed-off-by: Tom Rini <trini@konsulko.com>
* Merge branch 'rmobile' of git://git.denx.de/u-boot-shTom Rini2016-08-20-221/+11604
|\ | | | | | | | | [trini: Drop CMD_BOOTI as it's now on by default on ARM64] Signed-off-by: Tom Rini <trini@konsulko.com>
| * ARM: rmobile: r8a7795: Add MMU layoutNobuhiro Iwamatsu2016-08-17-1/+31
| | | | | | | | | | | | This add MMU layout for R8A7795 of Renesas ARM64 SoC. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * ARM: rmobile: salvator-x: Update defconfigNobuhiro Iwamatsu2016-08-17-1/+9
| | | | | | | | | | | | This moves some config from config files. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * ARM: rmobile: Remove duplicate configs by Kconfig in rcar-gen3-common.hNobuhiro Iwamatsu2016-08-17-7/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | This commit remove dupilicate following configs from rcar-gen3-common.h. - CONFIG_CMD_BOOTZ - CONFIG_BOOTDELAY - CONFIG_CMD_EDITENV - CONFIG_CMD_SAVEENV - CONFIG_CMD_MEMORY - CONFIG_CMD_RUN - CONFIG_CMD_LOADS Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * ARM: rmobile: lager: Move rcar-gen2-common to rcar-commonNobuhiro Iwamatsu2016-08-17-1/+1
| | | | | | | | | | | | | | To common use of rcar-gen2-common directory in the R-Car SoCs, and change from rcar-gen2-common to rcar-common. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * arm: rmobile: Update defconfigNobuhiro Iwamatsu2016-08-17-116/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This updated defconfig following boards: - Alt - Gose - Koelsh - Lager - Porter - Silk - Stout - Blanche Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * arm: rmobile: Fix HDMI output for BLANCHE boardmasakazu.mochizuki.wd@hitachi.com2016-08-17-0/+30
| | | | | | | | | | | | | | This commit fixes HDMI output for BLANCHE board Signed-off-by: Masakazu Mochizuki <masakazu.mochizuki.wd@hitachi.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * arm: rmobile: Add BLANCHE board supportmasakazu.mochizuki.wd@hitachi.com2016-08-17-47/+5006
| | | | | | | | | | | | | | | | | | | | BLANCHE is development board based on R-Car V2H SoC (R8A7792) This commit supports the following periherals: - SCIF, Ethernet, QSPI, MMC Signed-off-by: Masakazu Mochizuki <masakazu.mochizuki.wd@hitachi.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * mmc: rmobile: add a compiler barrierYannick Gicquel2016-08-17-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Building w/ GCC v5.2, the SD card access is broken due to invalid data in the response command reconstructed at the end of sh_sdhci_get_response(). Add a memory barrier between the two main steps of this function to ensure the resp[] table content is consistent before bits reordering. This fix has been tested Ok on Porter board rev1.0 using v2016.03 release. Signed-off-by: Yannick Gicquel <yannick.gicquel@iot.bzh>
| * ARM: rmobile: rcar-common: Fix warning of type differenceNobuhiro Iwamatsu2016-08-17-2/+4
| | | | | | | | Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * ARM: rmobile: Add support salvator-x boardNobuhiro Iwamatsu2016-08-17-0/+329
| | | | | | | | | | | | | | | | Salvator-x is an entry level development board based on R-Car H3 SoC (R8A7795). This commit supports SCIF only. Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * ARM: rmobile: Add support R8A7795Nobuhiro Iwamatsu2016-08-17-0/+5877
| | | | | | | | | | | | | | | | | | Renesas R8A7795 is CPU with Cortex-a57. This supports the basic register definition and GPIO and framework of PFC. Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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