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* Exynos: Tidy up the pwm_config function in the exynos pwm driverGabe Black2013-04-01-16/+6
| | | | | | | | | | | | | | | | | | | | | | | | | Some small fixes in the exynos pwm driver: 1. NS_IN_HZ is non-sensical since these are not compatible units. This constant actually describes the number of nanoseconds in a second. Renamed it to NS_IN_SEC. Also dropped the unnecessary parenthesis. 2. The variable "period" is not used to hold a period, it's used to hold a frequency. Renamed it to "frequency". 3. tcmp is an unsigned value, so (tcmp < 0) will never be true and the if which checks that condition will never execute. Also, there should be no problem if the pwm never switches, so there's no reason to subtract one from tcmp and therefore no reason to compare it against zero. Removed both ifs. If they weren't removed, tcmp should be a signed value. 4. Add a check for a 0 period. Test with command "sf probe 1:0; time sf read 40008000 0 1000". Try with different numbers of bytes and see that sane values are obtained Build and boot U-boot with this patch, backlight works properly. Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* Exynos: Avoid a divide by zero by specifying a non-zero period for pwm 4Gabe Black2013-04-01-1/+1
| | | | | | | | | | | | | | | | | The pwm_config function in the exynos pwm driver divides by its period period parameter. A function was calling pwm_config with a 0ns period and a 0ns duty cycle. That doesn't actually make any sense physically, and results in a divide by zero in the driver. This change changes the parameters to be a 100000ns period and duty cycle. Test with command "sf probe 1:0; time sf read 40008000 0 1000". Try with different numbers of bytes and see that sane values are obtained Build and boot U-boot with this patch, backlight works properly. Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* Exynos: pwm: Fix two bugs in the exynos pwm configuration codeGabe Black2013-04-01-10/+14
| | | | | | | | | | | | | | | | | | | | | | | | First, the "div" value was being used incorrectly to compute the frequency of the PWM timer. The value passed in is a constant which reflects the value that would be found in a configuration register, 0 to 4. That should correspond to a scaling factor of 1, 2, 4, 8, or 16, 1 << div, but div + 1 was being used instead. Second, the reset value of the timers were being calculated to give an overall frequency, thrown out, and set to a maximum value. This was done so that PWM 4 could be used as the system clock by counting down from a high value, but it was applied indiscriminantly. It should at most be applied only to PWM 4. This change also takes the opportunity to tidy up the pwm_init function. Test with command "sf probe 1:0; time sf read 40008000 0 1000". Try with different numbers of bytes and see that sane values are obtained Build and boot U-boot with this patch, backlight works properly. Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* Exynos: Add timer_get_us functionChe-Liang Chiou2013-04-01-0/+15
| | | | | | | | | | | | | | | | | timer_get_us returns the time in microseconds since a certain reference point of history. However, it does not guarantee to return an accurate time after a long period; instead, it wraps around (that is, the reference point is reset to some other point of history) after some periods. The frequency of wrapping around is about an hour (or 2^32 microseconds). Test with command "sf probe 1:0; time sf read 40008000 0 1000". Try with different numbers of bytes and see that sane values are obtained Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* Exynos: Change get_timer() to work correctlySimon Glass2013-04-01-62/+44
| | | | | | | | | | | | | | | | At present get_timer() does not return sane values. It should count up smoothly in milliscond intervals. We can change the PWM to count down at 1MHz, providing a resolution of 1us and a range of about an hour between required get_timer() calls. Test with command "sf probe 1:0; time sf read 40008000 0 1000". Try with different numbers of bytes and see that sane values are obtained Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* Exynos5: config: enable time commandAkshay Saraswat2013-04-01-0/+3
| | | | | | | This patch enables time command. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* Exynos5: clock: Fix a typo bug in exynos clock initAkshay Saraswat2013-03-29-4/+4
| | | | | | | | | | | | | We intended to clear the bits of CLK_SRC_TOP2 register, instead we were writing on the reserved bits of src_core1 register. Since the default value of clk_src_top2 register were itself zero, this typo was not creating any big issue. But it is better to fix this error for better readability of the code. Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* Exynos: config: Enable hash commandAkshay Saraswat2013-03-29-0/+2
| | | | | | | | | | | | This enables hash command. Tested with command "hash sha256 0x40008000 0x2B 0x40009000". Used mm and md to write a standard string to memory location 0x40008000 and ran the above command to verify the output. Signed-off-by: ARUN MANKUZHI <arun.m@samsung.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
* gen: Add sha h/w acceleration to hashAkshay Saraswat2013-03-29-0/+68
| | | | | | | | | Adding H/W acceleration support to hash which can be used to test SHA 256 hash algorithm. Signed-off-by: ARUN MANKUZHI <arun.m@samsung.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
* Exynos: config: Enable ACE HW for SHA 256 for ExynosAkshay Saraswat2013-03-29-0/+3
| | | | | | | | This enables SHA 256 for exynos. Signed-off-by: ARUN MANKUZHI <arun.m@samsung.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
* Exynos: Add hardware accelerated SHA256 and SHA1Akshay Saraswat2013-03-29-0/+503
| | | | | | | | SHA-256 and SHA-1 accelerated using ACE hardware. Signed-off-by: ARUN MANKUZHI <arun.m@samsung.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
* Exynos: clock: Fix a bug in PLL lock check conditionAkshay Saraswat2013-03-29-7/+7
| | | | | | | | | | | The condition for testing of PLL getting locked was incorrect. Rectify this error in this patch. Reported-by: Alexei Fedorov <alexie.fedorov@arm.com> Signed-off-by: Hatim Ali <hatim.rv@samsung.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* spl:falcon:trats: Fix SPL image size computing.Przemyslaw Marczak2013-03-29-0/+1
| | | | | | | | | | | "spl_imgsize" was set as decimal variable by "setexpr" and this causes wrong image size written by "ext4write". Preset this val with "0x" prefix allow to fix this issue. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* spi: exynos: Fix compiler warnings for non-dt systemsVivek Gautam2013-03-29-0/+2
| | | | | | | | | | | | Enclosing process_nodes() and spi_get_config() inside CONFIG_OF_CONTROL, since they are compiled only for DT systems. This fixes following warning: exynos_spi.c:391:12: warning: 'process_nodes' defined but not used [-Wunused-function] Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* SMDK5250: Fix compiler warning for non-dt systemsVivek Gautam2013-03-29-1/+2
| | | | | | | | | | | | | Compiling for non-dt systems gives folowing warning: smdk5250.c: In function 'board_eth_init': smdk5250.c:152:6: warning: unused variable 'node' [-Wunused-variable] Declare variable 'node' only for dt enabled systems to remove this warning. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* SMDK5250: Use statically defined structures only in non DT caseAjay Kumar2013-03-27-5/+9
| | | | | | | | | | Since we have DT support in exynos_fb and exynos_dp drivers now, we need not define any static structure or platform data related to display in the board file smdk5250.c. So, we place the already existing structures inside #ifndef CONFIG_OF_CONTROL block. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* SMDK5250: Add device node for DPAjay Kumar2013-03-27-0/+15
| | | | | | | Add DT bindings for DP supporting an eDP panel of size 2560x1600. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* EXYNOS5: Add device node for DPAjay Kumar2013-03-27-0/+76
| | | | | | | Add DT node and bindings documentaion for DP. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* video: exynos_dp: Add function to parse DP DT nodeAjay Kumar2013-03-27-0/+82
| | | | | | | | Add function to parse the required platform data fron DP DT node and fill the edp_info structure. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* EXYNOS5: FDT: Add compatible strings for FIMDAjay Kumar2013-03-27-0/+2
| | | | | | | Add required compatible information for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* video: exynos_dp: Make dp_regs globalAjay Kumar2013-03-27-45/+10
| | | | | | | | | | dp_regs variable was redundantly defined across all the functions in the driver even though it contains just the same address. We make it global and initialize it once using exynos_dp_set_base_addr(). >From then on, other funtions can use the address stored in the global variable. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* SMDK5250: Add device node for FIMDAjay Kumar2013-03-27-0/+25
| | | | | | | Add DT bindings for FIMD supporting an eDP panel of size 2560x1600. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* EXYNOS5: Add device node for FIMDAjay Kumar2013-03-27-0/+98
| | | | | | | Add DT node and bindings documentation for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* video: exynos_fb: add DT support for FIMD driverAjay Kumar2013-03-27-0/+180
| | | | | | | | | | | Add function to parse FIMD data from device tree. The driver still supports non-DT case. Define panel_info statically in some file if you are not using DT. If you have defined DT node for FIMD, panel_info will be filled using the bindings of FIMD DT node. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* EXYNOS: FDT: Add compatible strings for FIMDAjay Kumar2013-03-27-0/+2
| | | | | | | Add required compatible information for FIMD. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* video: exynos_fb: Make fimd_ctrl globalAjay Kumar2013-03-27-25/+2
| | | | | | | | | | fimd_ctrl variable was redundantly defined across all the functions in the driver even though it contains just the same address. We make it global and initialize it in exynos_fimd_lcd_init. From then on, other funtions can use the data in the global variable. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* video: exynos_dp: Remove callbacks from the driverAjay Kumar2013-03-27-4/+12
| | | | | | | | | Replaced the functionality of callbacks by using a standard set of functions. Instead of implementing and hooking up a callback, put the same code in one of the standard set of functions by overriding it. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* video: exynos_fb: Remove callbacks from the driverAjay Kumar2013-03-27-45/+66
| | | | | | | | | | | | Replaced the functionality of callbacks by using a standard set of functions. Instead of implementing and hooking up a callback, put the same code in one of the standard set of functions by overriding it. This patch is tested only on SMDK5250. For Trats and universal_c210 board, it is only compile tested. Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* EXYNOS5: Add L2 Cache Support.Rajeshwari Shinde2013-03-27-0/+36
| | | | | | | | | This patch set adds L2 Cache Support to EXYNOS. Signed-off-by: Arun Mankuzhi <arun.m@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'Albert ARIBAUD2013-03-26-491/+1188
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| * Tegra114: MMC: Enable DT MMC driver support for Tegra114 Dalmore boardsTom Warren2013-03-25-1/+11
| | | | | | | | | | | | | | | | | | Tested on my Dalmore E1611 board, eMMC and SD-Card work fine, can load a kernel off of an SD card OK, card detect works, and the env is now stored in eMMC (end of the 2nd 'boot' sector, same as Tegra20/30). Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
| * Tegra114: MMC: Add SD bus power-rail init routineTom Warren2013-03-25-0/+62
| | | | | | | | | | | | | | T114 requires SD bus power-rail bringup for the SDIO card on SDMMC3. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
| * Tegra114: Dalmore: Add SDIO3 pad config to pinctrl_config tableTom Warren2013-03-25-0/+16
| | | | | | | | | | | | | | | | SDIO1 (the SD-card slot on Dalmore) needs to have its pads setup before the MMC driver is added. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
| * Tegra114: fdt: Add SDMMC (sdhci) nodes for T114 boards (Dalmore for now)Tom Warren2013-03-25-0/+45
| | | | | | | | | | | | | | Took these values directly from the kernel dts files. Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
| * tegra114: dalmore: config: enable SPIAllen Martin2013-03-25-0/+11
| | | | | | | | | | | | | | | | Turn on SPI in dalmore config file Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
| * tegra114: add SPI driverAllen Martin2013-03-25-1/+463
| | | | | | | | | | | | | | | | | | | | Add driver for tegra114 SPI controller. This controller is not compatible with either the tegra20 or tegra30 controllers, so it requires a new driver. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
| * tegra114: dalmore: fdt: enable dalmore SPI controllerAllen Martin2013-03-25-0/+5
| | | | | | | | | | | | | | | | | | Dalmore has a SPI flash part attached to controller 4, so enable controller 4 and set to 25MHz. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
| * tegra114: fdt: add SPI blocksAllen Martin2013-03-25-0/+72
| | | | | | | | | | | | | | | | Add nodes for t114 SPI controller hardware Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
| * tegra114: fdt: add apbdma blockAllen Martin2013-03-25-0/+37
| | | | | | | | | | | | | | | | Add node for apbdma controller hardware. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
| * tegra114: fdt: add compatible string for tegra114 SPI ctrlAllen Martin2013-03-25-0/+2
| | | | | | | | | | | | | | | | Add "nvidia,tegra114-spi" to represent t114 SPI controller hardware. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
| * sf: winbond: add W25Q32DWAllen Martin2013-03-25-0/+5
| | | | | | | | | | | | | | | | Add support for Winbond W25Q32DW 32Mbit part Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
| * spi: add common fdt SPI driver interfaceAllen Martin2013-03-25-46/+224
| | | | | | | | | | | | | | | | | | | | | | Add a common interface to fdt based SPI drivers. Each driver is represented by a table entry in fdt_spi_drivers[]. If there are multiple SPI drivers in the table, the first driver to return success from spi_init() will be registered as the SPI driver. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
| * tegra20: spi: move fdt probe to spi_initAllen Martin2013-03-25-43/+67
| | | | | | | | | | | | | | | | | | | | Make the tegra20 SPI driver similar to the tegra30 (and soon to be tegra114) SPI drivers in preparation of common fdt SPI driver front end. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
| * tegra: spi: pull register structs out of headersAllen Martin2013-03-25-110/+110
| | | | | | | | | | | | | | | | | | | | Move register structs from headers into .c files and use common name. This is in preparation of making common fdt front end for SPI drivers. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
| * tegra: spi: remove non fdt supportAllen Martin2013-03-25-37/+4
| | | | | | | | | | | | | | | | | | Remove non fdt support from tegra20 and tegra30 SPI drivers in preparation of new common fdt based SPI driver front end. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
| * tegra: spi: rename tegra SPI driversAllen Martin2013-03-25-13/+13
| | | | | | | | | | | | | | | | | | Rename tegra SPI drivers to tegra20_flash and tegra20_slink in preparation for commonization and addition of tegra114_spi. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
| * tegra: remove support for UART SPI switchAllen Martin2013-03-25-202/+3
| | | | | | | | | | | | | | | | | | | | This feature was only used for tegra20 seaboard that had a pinmux conflict on the SPI pins. These boards were never manufactured, so remove this support to clean up SPI driver. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com>
* | Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'Albert ARIBAUD2013-03-26-10/+1776
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| * mmc:sdhci:fix: Change default interrupts enabled at SDHCI initializationŁukasz Majewski2013-03-12-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch changes sdhci_init()'s behavior to NOT enable all interrupt sources by default. Moreover interrupt signaling has been disabled. This patch do not enable interrupts which aren't served in u-boot (they are defined at sdhci.h but NOT used elsewhere): - SDHCI_INT_CARD_INSERT, SDHCI_INT_CARD_REMOVE, SDHCI_BUS_POWER, SDHCI_INT_CARD_REMOVE, SDHCI_INT_CARD_INT Special care shall be put on SDHCI_INT_CARD_INT, which indicates interrupt generated by SD card. According to "SD Host Controller Simplified Spec. ver 3.00" when bit 8 (Card Interrupt Status Enable) at "Normal Interrupt Status Enable Register" (offset 0x34) is set, the card interrupt detection is started. Then eMMC card may cause the SD controller to set this bit and then this interrupt is passed to booted OS and might cause kernel crash. To sum up: - Only enable interrupts, which are served at u-boot - This cleanup as a side effect fixes SDHCI's CARD INTERRUPT problem at Linux kernel (versions 3.6+, sdhci controller) - Keep masked bits at "Normal Interrupt Signal Enable Register" (0x38h) Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Cc: Lei Wen <leiwen@marvell.com> Cc: Andy Fleming <afleming@freescale.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * EXYNOS5: Snow: Add a configuration fileRajeshwari Shinde2013-03-12-0/+38
| | | | | | | | | | | | | | | | | | This patch adds the configuration file for Snow Board and defines the same in boards.cfg. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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