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* x86: dts: Mark serial as needed before relocationSimon Glass2017-02-06-0/+1
| | | | | | | | We almost always need the serial port before relocation, so mark it as such. This will ensure that it appears in the device tree for SPL, if used. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: ivybridge: Fix types for 64-bit compilationSimon Glass2017-02-06-4/+4
| | | | | | | Fix a few types that causes warnings on 64-bit machines. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: ivybridge: Add more debugging for failuresSimon Glass2017-02-06-10/+31
| | | | | | | | Add various debug() messages in places where errors occur. This aids with debugging. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: ivybridge: Declare global data where it is usedSimon Glass2017-02-06-0/+10
| | | | | | | | Some files are missing this declaration. Add it to avoid build errors when we actually need the declaration. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Update mpspec to build on 64-bit machinesSimon Glass2017-02-06-10/+10
| | | | | | | | | At present this uses u32 to store an address. We should use unsigned long and avoid special types in function return values and parameters unless necessary. This makes the code more portable. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Use unsigned long for address in table generationSimon Glass2017-02-06-36/+29
| | | | | | | | We should use unsigned long rather than u32 for addresses. Update this so that the table-generation code builds correctly on 64-bit machines. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* spl: Don't create a BSS padding when it is separateSimon Glass2017-02-06-1/+2
| | | | | | | | When BSS does not immediate follow the SPL image we don't need padding before the device tree. Remove it in this case. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* spl: Allow PCH drivers to be used in SPLSimon Glass2017-02-06-0/+10
| | | | | | | Add an option for building Platorm Controller Hub drivers in SPL. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* spl: Allow timer drivers to be used in SPLSimon Glass2017-02-06-0/+10
| | | | | | | Add a new Kconfig option to allow timer drivers to be used in SPL. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* spl: Allow RTC drivers to be used in SPLSimon Glass2017-02-06-0/+11
| | | | | | | Add a new Kconfig option to allow RTC drivers to be used in SPL. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* spl: Allow PCI drivers to be used in SPLSimon Glass2017-02-06-0/+10
| | | | | | | Add a new Kconfig option to allow PCI drivers to be used in SPL. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* spl: Allow CPU drivers to be used in SPLSimon Glass2017-02-06-0/+11
| | | | | | | Add a new Kconfig option to allow CPU drivers to be used in SPL. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* spl: Makefile: Define SPL_ earlierSimon Glass2017-02-06-0/+6
| | | | | | | | | This Makefile variable can be used in the architecture's main Makefile but at present it is not set up until later. Set it just before this Makefile is included. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* spl: spi: Add a debug message if loading failsSimon Glass2017-02-06-1/+4
| | | | | | | This currently fails silently. Add a debug message to aid debugging. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* console: Don't enable CONFIG-CONSOLE_MUX, etc. in SPLSimon Glass2017-02-06-20/+20
| | | | | | | | | CONFIG_CONSOLE_MUX and CONFIG_SYS_CONSOLE_IS_IN_ENV are not applicable for SPL. Update the console code to use CONFIG_IS_ENABLED(), so that these options will be inactive in SPL. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Synchronize list of x86 subarchitectures (update bootparam.h)Andy Shevchenko2017-02-06-1/+2
| | | | | | | | Basically rename X86_SUBARCH_MRST to X86_SUBARCH_INTEL_MID to be more specific. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini2017-02-03-103/+356
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: configs/ls1046aqds_defconfig configs/ls1046aqds_nand_defconfig configs/ls1046aqds_qspi_defconfig configs/ls1046aqds_sdcard_ifc_defconfig configs/ls1046aqds_sdcard_qspi_defconfig configs/ls1046ardb_emmc_defconfig configs/ls1046ardb_qspi_defconfig configs/ls1046ardb_sdcard_defconfig
| * arch: powerpc: update the eLBC IP input clockPrabhakar Kushwaha2017-02-03-40/+24
| | | | | | | | | | | | | | | | | | | | | | | | eLBC IP clock is always a constant divisor of platform clock pre-defined per SoC. Clock ratio register (LCRR) used in current implementation governs eLBC IP output cloc. Update sys_info->freq_localbus to represent eLBC input clock with value constant divisor of platform clock. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * arch: powerpc: Move CONFIG_FSL_ELBC to KconfigPrabhakar Kushwaha2017-02-03-16/+20
| | | | | | | | | | | | | | Enable ELBC from Kconfig. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * arch: arm: update the IFC IP input clockPrabhakar Kushwaha2017-02-03-24/+5
| | | | | | | | | | | | | | | | | | | | | | | | IFC IP clock is always a constant divisor of platform clock pre-defined per SoC. Clock control register (CCR) used in current implementation governs IFC IP output clock. Update sys_info->freq_localbus to represent IFC input clock with value constant divisor of platform clock. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * arch: powerpc: update the IFC IP input clockPrabhakar Kushwaha2017-02-03-8/+21
| | | | | | | | | | | | | | | | | | | | | | | | IFC IP clock is always a constant divisor of platform clock pre-defined per SoC. Clock control register (CCR) used in current implementation governs IFC IP output clock. Update sys_info->freq_localbus to represent IFC input clock with value constant divisor of platform clock. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * arch: powerpc: Move CONFIG_FSL_IFC to KconfigPrabhakar Kushwaha2017-02-03-13/+17
| | | | | | | | | | | | | | Enable IFC from Kconfig. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls1012a: Add support of PPAPrabhakar Kushwaha2017-02-03-0/+22
| | | | | | | | | | | | | | | | | | | | | | The PPA implements PSCI which requires for power managment. Added support of PPA for LS1012AQDS, LS1012ARDB and LS1012AFRDM. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * board: freescale: ls1012a: Enable secure DDR on LS1012A platformsPrabhakar Kushwaha2017-02-03-0/+91
| | | | | | | | | | | | | | | | | | | | | | PPA binary needs to be relocated on secure DDR, hence marking out a portion of DDR as secure if CONFIG_SYS_MEM_RESERVE_SECURE flag is set Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls1046a: Enable workaround for erratum A-008336York Sun2017-01-31-0/+1
| | | | | | | | | | | | | | Erratum A-008336 applies to LS1046A per latest SoC document. Signed-off-by: York Sun <york.sun@nxp.com> CC: Shengzhou Liu <Shengzhou.Liu@nxp.com>
| * armv7: ls1021aqds: Set cpo_sample for erratum A-009942York Sun2017-01-31-0/+3
| | | | | | | | | | | | | | | | | | Set cpo_sample as suggested by the driver "WARN: pls set popts->cpo_sample = 0x58 in <board>/ddr.c to optimize cpo". Signed-off-by: York Sun <york.sun@nxp.com> CC: Shengzhou Liu <Shengzhou.Liu@nxp.com>
| * drivers: net: fsl-mc: Fixup MAC addresses in DPCBogdan Purcareata2017-01-31-2/+101
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixup port_mac_address property in MC DPC with values from the u-boot environment. Since u-boot already reads the environment MAC addresses when probing the PHYs, use these values. The u-boot environment MAC addresses take precedence over any eventual ones defined in the DPC, except for the case where they are randomly assigned (no u-boot env value declared for port). The patch assumes the "/board_info/ports/" node is present in the DPC. Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> [York S: Fix several indentations] Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls1046a: enable usb in defconfigTang Yuantian2017-01-27-0/+18
| | | | | | | | | | Signed-off-by: Tang Yuantian <yuantian.tang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls1046a: added usb nodes in dtsTang Yuantian2017-01-27-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | The LS1046A processor has three integrated USB 3.0 controllers (USB1, USB2, and USB3) that allow direct connection to the USB ports with appropriate protection circuitry and power supplies. USB1 and USB2 ports are powered by a NX5P2190UK device, which supplies 5v power at up to 1.2 A. The power enable and power-fault-detect pins are connected to the LS1046A processor via CPLD for individual port management. Signed-off-by: Tang Yuantian <yuantian.tang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls1046aqds: added usb feature supportTang Yuantian2017-01-27-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | The LS1046AQDS processor has three integrated USB 3.0 controllers (USB1, USB2, and USB3) that allow direct connection to the USB ports with appropriate protection circuitry and power supplies. USB1 and USB2 ports are powered by a NX5P2190UK device, which supplies 5v power at up to 1.2 A. The power enable and power-fault-detect pins are connected to the LS1046A processor via CPLD for individual port management. Signed-off-by: Tang Yuantian <yuantian.tang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | Merge git://git.denx.de/u-boot-mpc85xxTom Rini2017-02-01-17/+38
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| * | powerpc: mpc5200: Correct return value of memcpy functionMark Marshall2017-02-01-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | The memcpy() function returns a pointer to trg. Signed-off-by: Mark Marshall <Mark.Marshall@omicron.at> Reviewed-by: Thomas Graziadei <thomas.graziadei@omicronenergy.com> Reviewed-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: York Sun <york.sun@nxp.com>
| * | powerpc: mpc85xx: Use symbolic names for cache control bitsMark Marshall2017-01-31-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | We should use the symbolic names for the cache control bits. Signed-off-by: Mark Marshall <Mark.Marshall@omicron.at> Reviewed-by: Thomas Graziadei <thomas.graziadei@omicronenergy.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | powerpc: mpc83xx: Enable pre-relocation mallocmario.six@gdsys.cc2017-01-31-7/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | To enable DM on MPC83xx, we need pre-relocation malloc, which is implemented in this patch. Signed-off-by: Mario Six <mario.six@gdsys.cc> [York S: Fixed compiling warning for unused variable 'i'] Reviewed-by: York Sun <york.sun@nxp.com>
| * | powerpc: mpc83xx: Minimize r1 modificationmario.six@gdsys.cc2017-01-31-5/+8
| |/ | | | | | | | | | | | | | | | | | | | | | | | | The r1 register is modified several times during the cache-ram setup of the MPC83xx SoCs. Since this SP modification confuses debuggers, we use a general purpose register to compute the new stack pointer value, and only set the SP once after all computations are done. Signed-off-by: Mario Six <mario.six@gdsys.cc> Reviewed-by: Joakim Tjernlund <Joakim.Tjernlund@infinera.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2017-02-01-267/+4692
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| * | BOARD: MCCMON6: Provide support for iMX6q based mccmon6 boardLukasz Majewski2017-01-30-0/+1245
| | | | | | | | | | | | | | | | | | | | | | | | This patch provides u-boot support for Liebherr (LWN) mccmon6 board. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
| * | arm: dts: imx53-cx9020: fix packetloss on fec_mxcPatrick Bruenn2017-01-30-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The pinmuxing for i.MX53 FEC ethernet copied from <kernel>/arch/arm/boot/dts/imx53-qsb-common.dtsi (at least until v4.9) was bad. It is different from the manual pinmuxing in <u-boot>/board/freescale/mx53loco/mx53loco.c which was used in cx9020 implementation previously before mainlining into u-boot. It seems the bug in imx53-qsb kernel device tree is hidden for so long, because it was never used, by the kernel driver. Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com>
| * | imx: mx6sxsabreauto: enable more dm driversPeng Fan2017-01-27-209/+69
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable MMC/I2C/GPIO/PMIC/REGULATOR/PCA953X DM drivers for mx6sxsabreauto board. Drop non-DM code. Note: The i.MX DM drivers has such dependency. MXC GPIO -> MXC I2C -> PFUZE/REGULATOR MXC GPIO -> PCA953X MXC GPIO -> FSL_USDHC So the drivers needs to be enabled all to avoid compiling error. The uboot dm tree log: => dm tree Class Probed Name ---------------------------------------- root [ + ] root_driver thermal [ ] |-- imx_thermal simple_bus [ + ] |-- soc simple_bus [ + ] | |-- aips-bus@02000000 simple_bus [ ] | | |-- spba-bus@02000000 gpio [ + ] | | |-- gpio@0209c000 gpio [ + ] | | |-- gpio@020a0000 gpio [ + ] | | |-- gpio@020a4000 gpio [ + ] | | |-- gpio@020a8000 gpio [ + ] | | |-- gpio@020ac000 gpio [ + ] | | |-- gpio@020b0000 gpio [ + ] | | |-- gpio@020b4000 simple_bus [ ] | | |-- anatop@020c8000 simple_bus [ ] | | |-- snvs@020cc000 pinctrl [ + ] | | `-- iomuxc@020e0000 pinconfig [ + ] | | `-- imx6x-sabreauto pinconfig [ + ] | | |-- i2c2grp-1 pinconfig [ + ] | | |-- i2c3grp-2 pinconfig [ ] | | |-- uart1grp pinconfig [ + ] | | |-- usdhc3grp pinconfig [ ] | | |-- usdhc3grp-100mhz pinconfig [ ] | | |-- usdhc3grp-200mhz pinconfig [ + ] | | |-- usdhc4grp pinconfig [ + ] | | `-- vccsd3grp simple_bus [ + ] | |-- aips-bus@02100000 mmc [ + ] | | |-- usdhc@02198000 mmc [ + ] | | |-- usdhc@0219c000 i2c [ + ] | | |-- i2c@021a4000 i2c_generic [ + ] | | | |-- generic_8 i2c_generic [ + ] | | | `-- generic_4e i2c [ + ] | | `-- i2c@021a8000 gpio [ + ] | | |-- gpio@30 gpio [ + ] | | `-- gpio@32 simple_bus [ ] | `-- aips-bus@02200000 simple_bus [ ] | `-- spba-bus@02200000 simple_bus [ + ] `-- regulators regulator [ + ] `-- regulator@0 Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
| * | imx: dts: mx6sxsabreauto: enable i2c2/3Peng Fan2017-01-27-0/+42
| | | | | | | | | | | | | | | | | | | | | | | | Enable i2c2/3, add pinctrl settings. Add max7310 for i2c3. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
| * | imx: mx6sxsabreauto: enable pinctrl driverPeng Fan2017-01-27-0/+2
| | | | | | | | | | | | | | | | | | | | | Enable pinctrl driver for mx6sxsabreauto board. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
| * | imx: mx6sx: add dts for mx6sxsabreauto boardPeng Fan2017-01-27-0/+3285
| | | | | | | | | | | | | | | | | | | | | | | | Add dts for mx6sxsabreauto board. dts related files imported fro Linux (commit e5517c2a5a4). Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
| * | ARM: imx6ul: Move liteSOM source to SoC directoryMarcin Niestroj2017-01-27-19/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Moving arch/arm/mach-litesom/ to arch/arm/cpu/armv7/mx6/ was requested in [1] during discussion of chiliSOM support patches. [1] http://lists.denx.de/pipermail/u-boot/2017-January/279137.html Suggested-by: Tom Rini <trini@konsulko.com> Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com> Reviewed-by: Tom Rini <trini@konsulko.com>
| * | udoo_neo: Remove ramdiskaddr environment variableBreno Lima2017-01-27-1/+0
| | | | | | | | | | | | | | | | | | | | | Remove unused ramdiskaddr environment variable. Suggested-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Breno Lima <breno.lima@nxp.com>
| * | udoo_neo: Remove trailing semicolon and spaceBreno Lima2017-01-27-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Remove the trailing semicolon and space. It's not necessary to have it on the last condition. Suggested-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Breno Lima <breno.lima@nxp.com>
| * | udoo_neo: Add fdt_addr_r environment variableBreno Lima2017-01-27-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to doc/README.distro: "fdt_addr_r: Mandatory. The location in RAM where the DTB will be loaded or copied to when processing the fdtdir/devicetreedir or fdt/devicetree options in extlinux.conf." So add the fdt_addr_r environment variable. Suggested-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Breno Lima <breno.lima@nxp.com>
| * | imx_common: check for bmode Serial DownloaderStefan Agner2017-01-27-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Before commit 81c4eccb55cc ("imx: mx6: fix USB bmode to use reserved value") a non-reserved value has been used to trigger Serial Downloader using bmode, which translated to a GPR9 value of 0x10. However, on some boards the non-reserved value lead to unreliable bmode command. With the above mentioned commit, U-boot switched to use [7:4] b0001, which translates to GPR9 0x10 for Serial Downloader mode. Check for the new value and classify it as Serial Downloader mode. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> CC: Stefano Babic <sbabic@denx.de> CC: Tim Harvey <tharvey@gateworks.com> CC: Fabio Estevam <Fabio.Estevam@freescale.com> CC: Eric Nelson <eric.nelson@boundarydevices.com>
| * | imx: nitrogen6x: fix USB host initializationGary Bisson2017-01-27-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | USB Host scanning has been broken since v2016.05. This is due to all the USB changes that happened between v2016.03 and v2016.05, especially: 2ef117fe4f usb: Remove 200 ms delay in usb_hub_port_connect_change() a22a264ec3 usb: Change power-on / scanning timeout handling So we need to increase the init delay to 2s using the usb_pgood_delay environment variable. Signed-off-by: Gary Bisson <gary.bisson@boundarydevices.com>
| * | README: mxc_hab: Adapt the CONFIG_SECURE_BOOT text to KconfigFabio Estevam2017-01-27-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 6e1f4d2652e79 ("arm: imx-common: add SECURE_BOOT option to Kconfig") moved the CONFIG_SECURE_BOOT option to Kconfig, so update the mxc_hab README file to reflect that. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Gary Bisson <gary.bisson@boundarydevices.com>
| * | mx6qsabreauto: Pass the correct parallel NOR widthFabio Estevam2017-01-27-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | On mx6qsabreauto the parallel NOR width is 16 bits, so pass configure CONFIG_SYS_FLASH_CFI_WIDTH correctly so that the CFI driver does not use 8 bits by default. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
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