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* arch: arm: update the IFC IP input clockPrabhakar Kushwaha2017-02-03-24/+5
| | | | | | | | | | | | IFC IP clock is always a constant divisor of platform clock pre-defined per SoC. Clock control register (CCR) used in current implementation governs IFC IP output clock. Update sys_info->freq_localbus to represent IFC input clock with value constant divisor of platform clock. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* arch: powerpc: update the IFC IP input clockPrabhakar Kushwaha2017-02-03-8/+21
| | | | | | | | | | | | IFC IP clock is always a constant divisor of platform clock pre-defined per SoC. Clock control register (CCR) used in current implementation governs IFC IP output clock. Update sys_info->freq_localbus to represent IFC input clock with value constant divisor of platform clock. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* arch: powerpc: Move CONFIG_FSL_IFC to KconfigPrabhakar Kushwaha2017-02-03-13/+17
| | | | | | | Enable IFC from Kconfig. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* armv8: ls1012a: Add support of PPAPrabhakar Kushwaha2017-02-03-0/+22
| | | | | | | | | | | The PPA implements PSCI which requires for power managment. Added support of PPA for LS1012AQDS, LS1012ARDB and LS1012AFRDM. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* board: freescale: ls1012a: Enable secure DDR on LS1012A platformsPrabhakar Kushwaha2017-02-03-0/+91
| | | | | | | | | | | PPA binary needs to be relocated on secure DDR, hence marking out a portion of DDR as secure if CONFIG_SYS_MEM_RESERVE_SECURE flag is set Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* armv8: ls1046a: Enable workaround for erratum A-008336York Sun2017-01-31-0/+1
| | | | | | | Erratum A-008336 applies to LS1046A per latest SoC document. Signed-off-by: York Sun <york.sun@nxp.com> CC: Shengzhou Liu <Shengzhou.Liu@nxp.com>
* armv7: ls1021aqds: Set cpo_sample for erratum A-009942York Sun2017-01-31-0/+3
| | | | | | | | | Set cpo_sample as suggested by the driver "WARN: pls set popts->cpo_sample = 0x58 in <board>/ddr.c to optimize cpo". Signed-off-by: York Sun <york.sun@nxp.com> CC: Shengzhou Liu <Shengzhou.Liu@nxp.com>
* drivers: net: fsl-mc: Fixup MAC addresses in DPCBogdan Purcareata2017-01-31-2/+101
| | | | | | | | | | | | | | | | | Fixup port_mac_address property in MC DPC with values from the u-boot environment. Since u-boot already reads the environment MAC addresses when probing the PHYs, use these values. The u-boot environment MAC addresses take precedence over any eventual ones defined in the DPC, except for the case where they are randomly assigned (no u-boot env value declared for port). The patch assumes the "/board_info/ports/" node is present in the DPC. Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> [York S: Fix several indentations] Reviewed-by: York Sun <york.sun@nxp.com>
* armv8: ls1046a: enable usb in defconfigTang Yuantian2017-01-27-0/+18
| | | | | Signed-off-by: Tang Yuantian <yuantian.tang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* armv8: ls1046a: added usb nodes in dtsTang Yuantian2017-01-27-0/+21
| | | | | | | | | | | | | The LS1046A processor has three integrated USB 3.0 controllers (USB1, USB2, and USB3) that allow direct connection to the USB ports with appropriate protection circuitry and power supplies. USB1 and USB2 ports are powered by a NX5P2190UK device, which supplies 5v power at up to 1.2 A. The power enable and power-fault-detect pins are connected to the LS1046A processor via CPLD for individual port management. Signed-off-by: Tang Yuantian <yuantian.tang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* armv8: ls1046aqds: added usb feature supportTang Yuantian2017-01-27-0/+12
| | | | | | | | | | | | | The LS1046AQDS processor has three integrated USB 3.0 controllers (USB1, USB2, and USB3) that allow direct connection to the USB ports with appropriate protection circuitry and power supplies. USB1 and USB2 ports are powered by a NX5P2190UK device, which supplies 5v power at up to 1.2 A. The power enable and power-fault-detect pins are connected to the LS1046A processor via CPLD for individual port management. Signed-off-by: Tang Yuantian <yuantian.tang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* Merge git://www.denx.de/git/u-boot-marvellTom Rini2017-01-26-10/+624
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| * arm64: mvebu: Update bubt command MMC block device accessKonstantin Porotchkin2017-01-25-3/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the MMC block device access code in bubt command implementation according to the latest MMC driver changes. Change-Id: Ie852ceefa0b040ffe1362bdb7815fcea9b2d923b Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Cc: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
| * arm64: mvebu: Enable SDHCI/MMC support for the db-88f7040/8040Stefan Roese2017-01-25-2/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enables the MMC support for the SDHCI controller on the Armada 7k db-88f7040 and the Armada 8k db-88f8040 board. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Wilson Ding <dingwei@marvell.com> Cc: Victor Gu <xigu@marvell.com> Cc: Hua Jing <jinghua@marvell.com> Cc: Terry Zhou <bjzhou@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Cc: Haim Boot <hayim@marvell.com>
| * arm64: mvebu: Armada 7040-db: Add SDHCI device tree nodesStefan Roese2017-01-25-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the SDHCI device tree nodes to the Armada 7040-db dts file. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Wilson Ding <dingwei@marvell.com> Cc: Victor Gu <xigu@marvell.com> Cc: Hua Jing <jinghua@marvell.com> Cc: Terry Zhou <bjzhou@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Cc: Haim Boot <hayim@marvell.com>
| * arm64: mvebu: Armada 7k/8k: Add SDHCI device tree nodesStefan Roese2017-01-25-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the SDHCI device tree nodes to the Armada AP806 dtsi file which is used by the Armada 7k/8K SoCs. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Wilson Ding <dingwei@marvell.com> Cc: Victor Gu <xigu@marvell.com> Cc: Hua Jing <jinghua@marvell.com> Cc: Terry Zhou <bjzhou@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Cc: Haim Boot <hayim@marvell.com>
| * arm64: mvebu: Enable SDHCI/MMC support for the db-88f3720Stefan Roese2017-01-25-1/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enables the MMC support for the SDHCI controller on the Armada 3700 db-88f3720 board. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Wilson Ding <dingwei@marvell.com> Cc: Victor Gu <xigu@marvell.com> Cc: Hua Jing <jinghua@marvell.com> Cc: Terry Zhou <bjzhou@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Cc: Haim Boot <hayim@marvell.com>
| * arm64: mvebu: Armada 3720-db: Add SDHCI device tree nodesStefan Roese2017-01-25-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the SDHCI device tree nodes to the Armada 3700-db dts file. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Wilson Ding <dingwei@marvell.com> Cc: Victor Gu <xigu@marvell.com> Cc: Hua Jing <jinghua@marvell.com> Cc: Terry Zhou <bjzhou@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Cc: Haim Boot <hayim@marvell.com>
| * arm64: mvebu: Armada 3700: Add SDHCI device tree nodesStefan Roese2017-01-25-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the SDHCI device tree nodes to the Armada 3700 dtsi file. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Wilson Ding <dingwei@marvell.com> Cc: Victor Gu <xigu@marvell.com> Cc: Hua Jing <jinghua@marvell.com> Cc: Terry Zhou <bjzhou@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Cc: Haim Boot <hayim@marvell.com>
| * mmc: Add Marvell Xenon SDHCI controller driverStefan Roese2017-01-25-0/+509
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This driver implementes platform specific code for the Xenon SDHCI controller which is integrated in the Marvell MVEBU Armada 37xx and Armada 7k / 8K SoCs. History: This driver is ported from the Marvell U-Boot version 2015.01 which is written by Victor Gu <xigu@marvell.com> with minor changes ported from the Linux driver which is written by Ziji Hu <huziji@marvell.com>. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
| * mmc: sdhci: Add support for optional controller specific set_ios_post()Stefan Roese2017-01-25-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some SDHCI drivers might need to do some special controller configuration after the common clock set_ios() function has been called (speed / width configuration). This patch adds a call to the newly created function set_ios_port() when its configured in the host driver. This will be used by the Xenon SDHCI controller driver used on the Marvell Armada 3700 and 7k/8k ARM64 SoCs. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
| * mmc: sdhci: Clear SDHCI_CLOCK_CONTROL before configuring the new valueStefan Roese2017-01-25-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch completely clears the SDHCI_CLOCK_CONTROL register before the new value is configured instead of just clearing the 2 bits SDHCI_CLOCK_CARD_EN and SDHCI_CLOCK_INT_EN. Without this change, some clock configurations will lead to the "Internal clock never stabilised." error message on the Xenon SDHCI controller used on the Marvell Armada 3700 and 7k/8k ARM64 SoCs. The Linux SDHCI core driver also writes 0 to this register before the new value is configured. So this patch simplifies the driver a bit and brings the U-Boot driver more in-line with the Linux one. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Cc: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
* | cmd: ubi: allow '-' to specify maximum volume sizeLadislav Michl2017-01-26-3/+5
| | | | | | | | | | | | | | | | | | Currently maximum volume size can be specified only if no other arguments are used. Use '-' placeholder as volume size to allow maximum volume size to be specified together with volume id and type. Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
* | Merge git://git.denx.de/u-boot-mpc85xxTom Rini2017-01-25-3/+37
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| * | powerpc: Enable flush and invalidate dcache by range for MPC85xxTony O'Brien2017-01-24-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit ac337168a unified functions to flush and invalidate dcache by range. These two functions were no-ops for SoCs other than 4xx and MPC86xx. Adding these functions seemed to be correct but introduced issues in some drivers when the dcache was flushed. While the root cause was under investigation, these functions were disabled in Commit cb1629f91a for affected SoCs, including the MPC85xx, to make the various drivers work. On the T208x USB stopped working after v2016.07 was pulled. After re-enabling the dcache functions for the MPC85xx it started working again. The USB and DPPA Ethernet drivers have been seen as operational after this change but other drivers cannot be tested. Reviewed-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Signed-off-by: Tony O'Brien <tony.obrien@alliedtelesis.co.nz> Cc: Marek Vasut <marex@denx.de> Cc: York Sun <york.sun@nxp.com> Reviewed-by: York Sun <york.sun>
| * | mpc85xx: pcie: Implement workaround for Erratum A007815Tony O'Brien2017-01-24-1/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The read-only-write-enable bit is set by default and must be cleared to prevent overwriting read-only registers. This should be done immediately after resetting the PCI Express controller. Reviewed-by: Hamish Martin <hamish.martin@alliedtelesis.co.nz> Signed-off-by: Tony O'Brien <tony.obrien@alliedtelesis.co.nz> [York S: Move SYS_FSL_ERRATUM_A007815 to Kconfig] Reviewed-by: York Sun <york.sun@nxp.com>
| * | powerpc: mpc85xx: Implemente workaround for CPU erratum A-007907Darwin Dingel2017-01-24-1/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Core hang occurs when using L1 stashes. Workaround is to disable L1 stashes so software uses L2 cache for stashes instead. Reviewed-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Signed-off-by: Darwin Dingel <darwin.dingel@alliedtelesis.co.nz> Cc: York Sun <york.sun@nxp.com> [York S: Move SYS_FSL_ERRATUM_A007907 to Kconfig] Reviewed-by: York Sun <york.sun@nxp.com>
* | | Drop CONFIG_CMD_DOCSimon Glass2017-01-25-30/+0
| | | | | | | | | | | | | | | | | | | | | This is not used in U-Boot, and the only usage calls a non-existent function. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | Drop prt_mpc5xxx_clks() in favour of print_cpuinfo()Simon Glass2017-01-25-5/+2
| | | | | | | | | | | | | | | | | | | | | Rather than having an arch-specific function, use the existing generic one. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | Drop the static inline print_cpuinfo()Simon Glass2017-01-25-7/+2
| | | | | | | | | | | | | | | | | | | | | This is only called from one place and the function cannot be inlined. Convert it to a normal function. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | Drop CONFIG_WINBOND_83C553Simon Glass2017-01-25-222/+0
| | | | | | | | | | | | | | | | | | This is not used in U-Boot. Drop this option and associated dead code. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | powerpc: Drop CONFIG_SYS_ALLOC_DPRAMSimon Glass2017-01-25-166/+7
| | | | | | | | | | | | | | | | | | This is not defined anywhere in U-Boot. Drop this dead code. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | powerpc: Drop probecpu() in favour of arch_cpu_init()Simon Glass2017-01-25-19/+25
| | | | | | | | | | | | | | | | | | | | | To avoid an unnecessary arch-specific call in board_init_f(), rename this function. Signed-off-by: Simon Glass <sjg@chromium.org>
* | | Convert CONFIG_ARCH_MISC_INIT to KconfigSimon Glass2017-01-25-35/+64
| | | | | | | | | | | | | | | | | | | | | This converts the following to Kconfig: CONFIG_ARCH_MISC_INIT Signed-off-by: Simon Glass <sjg@chromium.org>
* | | Convert CONFIG_BOARD_EARLY_INIT_F to KconfigSimon Glass2017-01-25-290/+459
| | | | | | | | | | | | | | | | | | | | | This converts the following to Kconfig: CONFIG_BOARD_EARLY_INIT_F Signed-off-by: Simon Glass <sjg@chromium.org>
* | | Convert CONFIG_ARCH_EARLY_INIT_R to KconfigSimon Glass2017-01-25-21/+31
| | | | | | | | | | | | | | | | | | | | | This converts the following to Kconfig: CONFIG_ARCH_EARLY_INIT_R Signed-off-by: Simon Glass <sjg@chromium.org>
* | | config: Drop CONFIG_ARCH_DMA_PIO_WORDSSimon Glass2017-01-25-7/+1
| |/ |/| | | | | | | | | This is not defined by any board in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org>
* | travis-ci: Add swig and libpython-dev to the package listTom Rini2017-01-24-0/+2
| | | | | | | | | | | | | | | | | | As part of 1905c8fc711a we introduced failures depending on if swig and libpython-dev are installed or not. To provide coverage for this are of code in the future ensure we have these packages installed. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Heiko Schocher <hs@denx.de>
* | mach-omap2: Cleanup secure boot media generationAndrew F. Davis2017-01-24-10/+28
| | | | | | | | | | | | | | | | | | | | Currently all secure media types of SPL are generated for all platforms, all platforms do not need all types, only generate the media types valid for each platform. Signed-off-by: Andrew F. Davis <afd@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Tested-by: Lokesh Vutla <lokeshvutla@ti.com>
* | tools: Correct python building host toolsTom Rini2017-01-24-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | When we have python building tools for the host it will not check HOSTXX variables but only XX variables, for example LDFLAGS and not HOSTLDFLAGS. Cc: Simon Glass <sjg@chromium.org> Reported-by: Heiko Schocher <hs@denx.de> Fixes: 1905c8fc711a ("build: Always build the libfdt python module") Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Tested-by: Heiko Schocher <hs@denx.de>
* | bootz/booti: relocate ramdisk if CONFIG_SYS_BOOT_RAMDISK_HIGH setCédric Schieli2017-01-24-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | In commit c2e7e72, the ramdisk relocation code was moved from image_setup_linux to do_bootm, leaving the bootz and booti cases broken. This patch fixes both by adding the BOOTM_STATE_RAMDISK state in their call to do_bootm_states if CONFIG_SYS_BOOT_RAMDISK_HIGH is set. Signed-off-by: Cédric Schieli <cschieli@gmail.com> Reviewed-by: Rick Altherr <raltherr@google.com> Tested-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | arm: am57xx: cl-som-am57x: fix EthernetUri Mashiach2017-01-24-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The module is continuously rebooting with the following message: Net: data abort pc : [<fff77f42>] lr : [<fff6e32b>] reloc pc : [<80816f42>] lr : [<8080d32b>] sp : fdf5ce48 ip : fdf5d79c fp : 00000017 r10: 8083cd58 r9 : fdf5cef0 r8 : fdf5d5d0 r7 : 48485000 r6 : 400000ff r5 : fdf5d6e0 r4 : fdf5d618 r3 : fdf5d5b4 r2 : fdf5d5d0 r1 : 643a3631 r0 : fdf5d6e0 Flags: nzCv IRQs off FIQs off Mode SVC_32 Resetting CPU ... Modifications: * Enable Ethernet configuration in the SPL. * Update PINMUX of PHY enable GPIO. Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il> Reviewed-by: Tom Rini <trini@konsulko.com>
* | Kconfig: Migrate BOARD_LATE_INIT to a selectTom Rini2017-01-24-281/+146
| | | | | | | | | | | | | | | | | | This option should not really be user selectable. Note that on PowerPC we currently only need BOARD_LATE_INIT when CHAIN_OF_TRUST is enabled so be conditional on that. Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> (for UniPhier)
* | NXP: Introduce board/freescale/common/Kconfig and migrate CHAIN_OF_TRUSTTom Rini2017-01-24-13/+66
| | | | | | | | | | | | | | | | | | Introduce board/freescale/common/Kconfig so that we have a single place for CONFIG options that are shared between ARM and PowerPC NXP platforms. Cc: York Sun <york.sun@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | imx31_phycore: Split the eet variant out into a different TARGETTom Rini2017-01-24-5/+8
| | | | | | | | | | | | | | Rename CONFIG_IMX31_PHYCORE_EET to CONFIG_TARGET_IMX31_PHYCORE_EET and make this a distinct config target. Signed-off-by: Tom Rini <trini@konsulko.com>
* | rpi: Fix device tree path on ARM64Tuomas Tynkkynen2017-01-24-21/+27
| | | | | | | | | | | | | | | | | | The directory structure of device tree files produced by the kernel's 'make dtbs_install' is different on ARM64, the RPi3 device tree file is in a 'broadcom' subdirectory there. Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org>
* | mmc: Print error code for mmc_complete_init failureJagan Teki2017-01-23-1/+3
| | | | | | | | | | | | | | | | Print the error code for non-zero (failure case) instead of making debug statement without any condition, this usually gives proper clue in failure condition. Log:
* | mmc: sdhci: Distinguish between base clock and maximum peripheral frequencyStefan Herbrechtsmeier2017-01-23-34/+52
|/ | | | | | | | | | The sdhci controller assumes that the base clock frequency is fully supported by the peripheral and doesn't support hardware limitations. The Linux kernel distinguishes between base clock (max_clk) of the host controller and maximum frequency (f_max) of the card interface. Use the same differentiation and allow the platform to constrain the peripheral interface. Signed-off-by: Stefan Herbrechtsmeier <stefan.herbrechtsmeier@weidmueller.com>
* Merge branch 'master' of git://git.denx.de/u-boot-uniphierTom Rini2017-01-22-415/+934
|\ | | | | | | | | | | | | - Allow to disable SPL (mainly for ATF) - Refactor SoC init code - Update DRAM settings - Add PXs3 SoC support (DT, pinctrl driver, SoC code)
| * ARM: uniphier: add PXs3 SoC supportMasahiro Yamada2017-01-22-0/+31
| | | | | | | | | | | | Initial support for PXs3 SoC. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
generated by cgit v1.1 at 2024-11-11 03:56:45 +0000