summaryrefslogtreecommitdiff
Commit message (Collapse)AuthorAgeLines
...
| * | arm: ls1021a: improve the core frequency to 1.2GHZYuan Yao2016-11-21-7/+7
| | | | | | | | | | | | | | | | | | | | | Change core clock to 1.2GHz in the configurations for SD and NAND boot. Signed-off-by: Yuan Yao <yao.yuan@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | armv8: ls2080aqds: fix SGMII repeater settingsShaohui Xie2016-11-21-5/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current value to check whether the PHY was configured has dependency on MC, it expects MC to start PCS AN, this is not true during boot up, so it should be changed to remove the dependency. The PHY's register space should be restore to default after accessing extended space. Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | fsl: serdes: fix a deadloop issue for P4080Hou Zhiqiang2016-11-21-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This deadloop is introduced by commit: 71fe222 fsl: serdes: ensure accessing the initialized maps of serdes protocol deadloop detail: cpu_init_r => fsl_serdes_init => p4080_erratum_serdes_a005 => is_serdes_configured => fsl_serdes_init Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | powerpc: mpc512x: Add support for get_svr() for mpc512x devicesSriram Dash2016-11-21-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | Defines get_svr() for mpc512x devices Signed-off-by: Sriram Dash <sriram.dash@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | driver: net: ldpaa_eth: Fix missing bracket issuePriyanka Jain2016-11-21-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | armv8: ls2080a: Update serdes protocol supportPriyanka Jain2016-11-21-3/+125
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add these serdes protocols Serdes1: 0x39, 0x4B, 0x4C, 0x4D Serdes2: 0x47, 0x57 Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> [YS: Revise commit message] Reviewed-by: York Sun <york.sun@nxp.com>
| * | armv8: ls1046aqds: add lpuart supportShaohui Xie2016-11-21-0/+131
| | | | | | | | | | | | | | | | | | | | | LPUART0 is used by default, and it's using platform clock. Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | lpuart: add a get_lpuart_clk functionShaohui Xie2016-11-21-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It's not always true that LPUART clock is CONFIG_SYS_CLK_FREQ. This patch provides a weak function get_lpuart_clk(), so that the clock can be ovreridden on a specific board which uses different clock for LPUART. Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com> [YS: Reformat commit message] Reviewed-by: York Sun <york.sun@nxp.com>
| * | armv7: Add support of ls1021a-iot boardFeng Li2016-11-21-1/+999
| | | | | | | | | | | | | | | | | | | | | | | | The patch adds support for Freescale ls1021a-iot board. Signed-off-by: Feng Li <feng.li_2@nxp.com> [YS: rewrite commit message, fix whitespace in Kconfig] Reviewed-by: York Sun <york.sun@nxp.com>
| * | configs: ls2080ardb: Enable DSPI flash supportYuan Yao2016-11-21-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | There is the stmicro DSPI flash on LS12080ARDB. Enable DSPI flash related configure options. Signed-off-by: Yuan Yao <yao.yuan@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | armv8:ls1012a: Update bootargs for fast-bootPratiyush Srivastava2016-11-21-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add optimization parameters like "quiet" in bootargs to reduce the system boot time Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com> Signed-off-by: Harninder Rai <harninder.rai@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | | colibri_pxa270: transition to driver model for serialMarcel Ziswiler2016-11-23-4/+18
| | | | | | | | | | | | | | | | | | | | | Add serial platform data to board file. Enable driver model for PXA serial driver. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
* | | colibri_pxa270: drop edit, elf, fpga, hush, regex et al. for space reasonMarcel Ziswiler2016-11-23-3/+7
| | | | | | | | | | | | | | | | | | | | | | | | With em humble DM and Kconfig migraters U-Boot binary size keeps increasing. Drop a bunch of less needed stuff to save another precious 20+ KB. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
* | | serial: pxa: integrate optional driver model handlingMarcel Ziswiler2016-11-23-70/+169
| | | | | | | | | | | | | | | | | | | | | Optional driver model handling integration. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Marek Vasut <marex@denx.de>
* | | serial: pxa: use kconfig for serial configurationMarcel Ziswiler2016-11-23-5/+9
| |/ |/| | | | | | | | | | | Migrate the PXA serial driver to be configured via Kconfig. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by: Marek Vasut <marex@denx.de>
* | MAINTAINERS: SUNXI: Update maintainershipJagan Teki2016-11-22-2/+4
| | | | | | | | | | | | | | Add Jagan and Maxime as Maintainers for SUNXI Signed-off-by: Jagan Teki <jagan@openedev.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2016-11-22-460/+409
|\ \
| * | sf: Add support for MX66U51235F, MX66L1G45G, MT25QU02G, MT25QL02GRadu Bacrau2016-11-22-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit adds support for the Macronix MX66U51235F, MX66L1G45G and Micron MT25QU02G, MT25QL02G flash parts. Signed-off-by: Radu Bacrau <dumitru.bacrau@intel.com> Cc: Chin Liang See <clsee@altera.com> Cc: Radu Bacrau <radu.bacrau@gmail.com> [Update proper commit header and 80-line cut on body] Reviewed-by: Jagan Teki <jagan@openedev.com>
| * | drivers: SPI: sunxi SPL: fix warningAndre Przywara2016-11-21-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Somehow an int returning function without a return statement sneaked in, fix it. Also fix some whitespace damage on the way. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
| * | sf: Fix s25fs512s id tableJagan Teki2016-11-19-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | s25fs512s and s25fl512s_256k have common id information till 5 bytes and 6th byte have different family id like FS and FL-S as 0x81 and 0x80. Reported-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Jagan Teki <jagan@openedev.com>
| * | sf: dataflash: Minor cleanupsJagan Teki2016-11-19-23/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - fix single line comments - remove unneeded spaces - ascending order of include files - rename SPI DATAFLASH to dataflash - rename SPI DataFlash to dataflash - return NULL replaced with error code Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com>
| * | sf: dataflash: Fix add_dataflash return logicJagan Teki2016-11-19-66/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixed the add_dataflash return logic, so-that it can handle both jedec and older chips same as Linux. Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com>
| * | sf: dataflash: Move flash id detection into jedec_probeJagan Teki2016-11-19-9/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Flash id detection should be the first step to enumerate the connected flash on the board, once ie done checking with respective id codes locally in the driver all this should be part of jedec_probe instead of id detection and validated through flash_info{} table separatly. Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com>
| * | sf: dataflash: Remove unneeded spi dataJagan Teki2016-11-19-5/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dataflash doesn't require options, memory_map from spi. Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: York Sun <york.sun@nxp.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com>
| * | spi: Remove dual flash options/flagsJagan Teki2016-11-19-15/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Dual flash code in spi are usually take the spi controller to work with dual connected flash devices. Usually these dual connection operation's are referred to flash controller protocol rather with spi controller protocol, these are still present in flash side for the usage of spi-nor controllers. So, this patch remove the dual_flash options or flags in sf which are triggered from spi controller side. Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com>
| * | sf: Rename few local functionsJagan Teki2016-11-18-13/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | spi_flash_write_bar-> write_bar spi_flash_write_bar -> read_bar spi_flash_cmd_wait_ready -> spi_flash_wait_till_ready Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com>
| * | sf: ids: Use small letter in ext_jedecJagan Teki2016-11-18-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use small 'd' in s25s512s ext_jedec Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
| * | sf: ids: Use small letter's with flash nameJagan Teki2016-11-18-110/+110
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For readability use small letter's with flash name. Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
| * | sf: Rename sf_params.c to spi_flash_ids.cJagan Teki2016-11-18-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now the flash params table as renamed to spi_flash_ids structure, so rename the sf_params.c to spi_flash_ids.c and remove the legacy. Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
| * | sf: Remove non-meaningful commentsJagan Teki2016-11-18-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove unneeded/non-meaningful commit message on params and flash. Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
| * | sf: Remove spansion_s25fss_disable_4KB_eraseJagan Teki2016-11-18-86/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In spansion S25FS-S family the physical sectors are grouped as normal and parameter sectors. Parameter sectors are 4kB in size with 8 set located at the bottom or top address of a device. Normal sectors are similar to other flash family with sizes of 64kB or 32 kB. To erase whole flash using sector erase(D8h or DCh) won't effect the parameter sectors, so in order to erase these we must use 4K sector erase commands (20h or 21h) separately. So better to erase the whole flash using 4K sector erase instead of detecting these family parts again and do two different erase operations. For this: - Removed spansion_s25fss_disable_4KB_erase code - Add SECT_4K for S25FS512S chip Cc: Yunhui Cui <yunhui.cui@nxp.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@openedev.com>
| * | sf: params: Add S25FS256S_64K spi flash supportJagan Teki2016-11-18-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add Spansion S25FS256S_64K spi flash to the list of spi_flash_ids. In spansion S25FS-S family the physical sectors are grouped as normal and parameter sectors. Parameter sectors are 4kB in size with 8 set located at the bottom or top address of a device. Normal sectors are similar to other flash family with sizes of 64kB or 32 kB. To erase whole flash using sector erase(D8h or DCh) won't effect the parameter sectors, so in order to erase these we must use 4K sector erase commands (20h or 21h) separately. So better to erase the whole flash using 4K sector erase instead of detecting these family parts again and do two different erase operations. Cc: Yunhui Cui <yunhui.cui@nxp.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com>
| * | sf: Add INFO6 flash_info macroJagan Teki2016-11-18-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | INFO6 is for tabulating 6 byte flash parts, Ex: S25FS256S_64K Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@openedev.com>
| * | sf: Increase max id length by 1 byteJagan Teki2016-11-18-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | So, now SPI_FLASH_ID_MAX_LEN is 6 bytes useful for few spansion flash families S25FS-S Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
| * | sf: Add SPI_FLASH_MAX_ID_LENJagan Teki2016-11-18-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add id length of 5 bytes numerical value to macro. Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@openedev.com>
| * | sf: nr_sectors -> n_sectorsJagan Teki2016-11-18-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rename nr_sectors as n_sectors to sync with Linux. Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
| * | sf: Cleanup spi_flash_info{}Jagan Teki2016-11-18-24/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Proper tabs spaces - Removed unnecessary - Add comments in spi_flash_info members - Add comments for spi_flash_info.flags Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
| * | sf: sandbox: Use JEDEC_MFR|ID in id exctractJagan Teki2016-11-18-3/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of extracting id's separately better to use JEDEC_MFR|ID for code simplicity. Cc: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@openedev.com>
| * | sf: Simplify lock ops detection codeJagan Teki2016-11-18-8/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Simplify the flash_lock ops detection code and added meaningful comment. Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@openedev.com>
| * | sf: Adopt flash table INFO macro from LinuxJagan Teki2016-11-18-180/+214
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | INFO macro make flash table entries more adjustable like adding new flash_info attributes, update ID length bytes and so on and more over it will sync to Linux way of defining flash_info attributes. - Add JEDEC_ID - Add JEDEC_EXT macro - Add JEDEC_MFR - spi_flash_params => spi_flash_info - params => info Cc: Simon Glass <sjg@chromium.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@openedev.com> Signed-off-by: Jagan Teki <jagan@openedev.com>
| * | spi: kirkwood_spi: implement mvebu_spi_set_mode()Chris Packham2016-11-18-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | Set the appropriate bits in the interface config register based on the SPI_ mode flags. Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Jagan Teki <jteki@openedev.com> Signed-off-by: Chris Packham <judge.packham@gmail.com>
* | | am57xx: Remove unused variable warningsTom Rini2016-11-21-20/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Starting with the changes to fix USB host on am57xx/am43xx we stopped using usb_otg_ss1/related stuff and but we hadn't been enabling the relevant options to cause the warnings until just recently. Fixes: 55efadde7ede (ARM: AM57xx: AM43xx: Fix USB host) Fixes: a48d687c575f (configs: am57xx: Enable download gadget) Signed-off-by: Tom Rini <trini@konsulko.com>
* | | fastboot: simplify the Kconfig logicYann E. MORIN2016-11-21-5/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, the fastboot item in menuconfig is a comment followed by a boolean option withan empty prompt, followed by a menu: *** FASTBOOT *** [*] Fastboot support ---> This is not "nice-looking" at all... Change the logic to make the boolean option a "menuconfig" rather than a mere "config", so that all dependent options gets groupped under a menu. The layout is now: *** FASTBOOT *** [*] Fastboot support ---> Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* | | ARM: OMAP3_LOGIC: Update MTD Partition TableAdam Ford2016-11-21-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The previous partition table did not support a separate device tree and the kernel size was limited to 4MB. This update shows the location of the device tree (labeled as spl-os) for those who want to use Falcon Mode or use U-Boot to store the Flattened Device Tree (FDT) to NAND without appending it to the kernel. This also grows the kernel to 6MB since 4MB was becomming tight Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | | ARM: OMAP3_LOGIC: Remove FIT SupportAdam Ford2016-11-21-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit ("2cd1ff84037a: OMAP3_LOGIC: Setup defconfig to enable SPL and NAND booting") accidentally enabled FIT support. This patch removes the FIT support. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | | ARM: OMAP3_LOGIC: Fix SPL Memory Map for Falcon ModeAdam Ford2016-11-21-13/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The memory map defined in commit ("49c7303f0e52: OMAP3: Enable SPL on omap3_logic) was used by a copy-paste of another board without fully understanding how the map works in Falcon mode. This patch undoes the customization and uses the default SPL Memory Map for OMAP3. When building the uImage, set LOADADDR=0x82000000 and Falcon mode should properly load. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | | rpi: passthrough of the firmware provided FDT blobCédric Schieli2016-11-21-0/+66
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Raspberry firmware used to pass a FDT blob at a fixed address (0x100), but this is not true anymore. The address now depends on both the memory size and the blob size [1]. If one wants to passthrough this FDT blob to the kernel, the most reliable way is to save its address from the r2/x0 register in the U-Boot entry point and expose it in a environment variable for further processing. This patch just does this: - save the provided address in the global variable fw_dtb_pointer - expose it in ${fdt_addr} if it points to a a valid FDT blob There are many different ways to use it. One can, for example, use the following script which will extract from the tree the command line built by the firmware, then hand over the blob to a previously loaded kernel: fdt addr ${fdt_addr} fdt get value bootargs /chosen bootargs bootz ${kernel_addr_r} - ${fdt_addr} Alternatively, users relying on sysboot/pxe can simply omit any FDT statement in their extlinux.conf file, U-Boot will automagically pick ${fdt_addr} and pass it to the kernel. [1] https://www.raspberrypi.org/forums//viewtopic.php?f=107&t=134018 Signed-off-by: Cédric Schieli <cschieli@gmail.com> Acked-by: Stephen Warren <swarren@nvidia.com>
* | | arm: add save_boot_params for ARM1176Cédric Schieli2016-11-21-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement a hook to allow boards to save boot-time CPU state for later use. When U-Boot is chain-loaded by another bootloader, CPU registers may contain useful information such as system configuration information. This feature mirrors the equivalent ARMv7 feature. Signed-off-by: Cédric Schieli <cschieli@gmail.com> Acked-by: Stephen Warren <swarren@nvidia.com>
* | | image: Combine image_sig_algo with image_sign_infoAndrew Duda2016-11-21-54/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the need to explicitly add SHA/RSA pairings. Invalid SHA/RSA pairings will still fail on verify operations when the hash length is longer than the key length. Follow the same naming scheme "checksum,crytpo" without explicitly defining the string. Indirectly adds support for "sha1,rsa4096" signing/verification. Signed-off-by: Andrew Duda <aduda@meraki.com> Signed-off-by: aduda <aduda@meraki.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | image: Add crypto_algo struct for RSA infoAndrew Duda2016-11-21-37/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Cut down on the repetition of algorithm information by defining separate checksum and crypto structs. image_sig_algos are now simply pairs of unique checksum and crypto algos. Signed-off-by: Andrew Duda <aduda@meraki.com> Signed-off-by: aduda <aduda@meraki.com> Reviewed-by: Simon Glass <sjg@chromium.org>
generated by cgit v1.1 at 2024-11-07 20:56:32 +0000