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| | * | TI:armv7: Move CONFIG_SPL_LIBDISK_SUPPORT to MMC sectionTom Rini2013-08-28-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We only need this library when we're doing "disk" access to MMC/SD. Update comment around the rest of CONFIG_SPL_LIB* to note that the others are always required. Signed-off-by: Tom Rini <trini@ti.com>
| | * | am33xx: Correct and expand comments on CONFIG_SPL_MAX_SIZETom Rini2013-08-28-3/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We had been allowing the max size to be larger than actually allowed by the ROM. Expand the commentary here to explain why we set these locations. Signed-off-by: Tom Rini <trini@ti.com>
| | * | ARM: igep00x0.h: Enable raw initrd supportJavier Martinez Canillas2013-08-28-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that IGEP base boards default environment use the bootz command to boot a zImage instead of a uImage, it makes sense to add support to supply a raw initrd image to the kernel if needed. Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
| | * | arm: omap3: fix SRAM copy and execution sequenceAlbert ARIBAUD2013-08-28-11/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix size calculation in copy of go_to_speed into SRAM. Use SRAM_CLK_CODE in call to SRAM-based go_to_speed. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
| | * | ARM: OMAP4460: sdp: Limit TPS mux config to 4460Taras Kondratiuk2013-08-28-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | TPS mux config is 4460 specific, so it should be limited to 4460 only. Signed-off-by: Taras Kondratiuk <taras@ti.com>
| | * | ARM: OMAP4470: Add Elpida EDB8164B3PF memory configurationLubomir Popov2013-08-28-7/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | OMAP4470 SDP SoM has EDB8164B3PF PoP memory on board. This memory has 4Gb x 2CS = 8Gb configuration. Add configuration for runtime calculation and precalculated cases. Patch is based on a draft Lubomir's patch [1]. [1] http://lists.denx.de/pipermail/u-boot/2013-April/150851.html Signed-off-by: Lubomir Popov <lpopov@mm-sol.com> [taras@ti.com: cleaned up patch and fixed precalculated values] Signed-off-by: Taras Kondratiuk <taras@ti.com>
| | * | ARM: OMAP4470: Add voltage and dpll dataTaras Kondratiuk2013-08-28-1/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | OMAP4470 reference design uses TWL6032 PMIC with a following connection scheme: VDD_CORE = TWL6032 SMPS2 VDD_MPU = TWL6032 SMPS1 VDD_IVA = TWL6032 SMPS5 Set voltage and frequency values according to OMAP4470 Data Manual Operating Condition Addendum v0.7 Signed-off-by: Taras Kondratiuk <taras@ti.com>
| | * | ARM: OMAP4470: Add OMAP4470 identificationTaras Kondratiuk2013-08-28-0/+5
| | | | | | | | | | | | | | | | Signed-off-by: Taras Kondratiuk <taras@ti.com>
| | * | sdp4430: Initialize board id using CONFIG_MACH_TYPEOleksandr Tyshchenko2013-08-28-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use CONFIG_MACH_TYPE generic macro to set the machine type number in the common arm code instead of setting it in the board code. Signed-off-by: Oleksandr Tyshchenko <oleksandr.tyshchenko@ti.com>
| * | | Merge branch 'u-boot-atmel/master' into 'u-boot-arm/master'Albert ARIBAUD2013-09-04-196/+486
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| | * | | arm: atmel: cpux9k2: board update and enhancementJens Scharsig (BuS Elektronik)2013-08-22-30/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - fix adresses in env settings in config header - add missing CONFIG_STANDALONE_LOAD_ADDR to eb_cpux9k2 config header - remove jffs2 support, board doesn't use this anymore - add ubifs support - change sizes and start for partitions Signed-off-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| | * | | gpio: atmel: add copyright and remove error header infoBo Shen2013-08-22-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Bo Shen <voice.shen@atmel.com> Acked-by: Jens Scharsig <js_at_ng@scharsoft.de> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| | * | | gpio: atmel: add gpio common API supportBo Shen2013-08-22-0/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | add gpio common API support for gpio command Signed-off-by: Bo Shen <voice.shen@atmel.com> [fix unnecessary cast] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| | * | | gpio: atmel: fix code to use pointer for pio portBo Shen2013-08-22-112/+138
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | fix code to use pointer for pio port as the warning message suggested remove the warning message Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| | * | | arm: atmel: remove the config.mk fileBo Shen2013-08-22-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | remove the config.mk file move text base define to board config file for following boards - at91sam9m10g45ek - at91sam9x5ek Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| | * | | arm: atmel: sama5d3: fix typo error for CONFIG_ENV_IS_NOWHEREBo Shen2013-08-22-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | fix typo error for CONFIG_ENV_IS_NOWHERE from CONIG_ENV_IS_NOWHERE Signed-off-by: Bo Shen <voice.shen@gmail.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| | * | | arm: sama5d3: remove unused defineBo Shen2013-08-22-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The CONFIG_MAX_NAND_CHIPS never used, remove it No where define LCD_TEST_PATTERN, so no need undefine Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| | * | | arm: sama5d3: fix smc cs related registers offsetBo Shen2013-08-22-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | the smc cs related registers start at 0x600 and loop with 5 registers so the reserved register should be in at91_smc structure while no in at91_cs structure. So fix it Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| | * | | ARM: at91: atmel_nand: add code to check the ONFI parameter ECC requirementWu, Josh2013-08-22-2/+128
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | 1. if CONFIG_SYS_NAND_ONFI_DETECTION is defined, driver will check NAND flash's ecc minimum requirement in ONFI parameter. a) if CONFIG_PMECC_CAP, CONFIG_PMECC_SECTOR_SIZE are defined. then use it. Driver will display a WARNING if the values are different from ONFI parameters. b) if CONFIG_PMECC_CAP, CONFIG_PMECC_SECTOR_SIZE are not defined, then use the value from ONFI parameters. * If ONFI ECC parameters are in ONFI extended parameter page, since we are not support it, so assume the minimum ecc requirement is 2 bits in 512 bytes. * For non-ONFI support nand flash, also assume the minimum ecc requirement is 2 bits in 512 bytes. 2. if CONFIG_SYS_NAND_ONFI_DETECTION is not defined, just use CONFIG_PMECC_CAP and CONFIG_PMECC_SECTOR_SIZE. Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| | * | | mtd: atmel_nand: alloc memory instead of use static array for pmecc dataWu, Josh2013-08-22-7/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In this way, the pmecc corraction capbility can change in run time. Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| | * | | linux/compat.h: move dev_err, dev_info and dev_dbg from usb driver to compat.hWu, Josh2013-08-22-16/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since kernel code current use many dev_xxx() instead of using printk. To compatible, move those dev_xxx from usb driver to linux/compat.h. Then all driver code can use dev_err, dev_info and dev_vdbg. This patch also removed duplicated macro definitions in usb driver. Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| | * | | ARM: at91: sama5d3: remove unused definition about PMECC alpha table offsetWu, Josh2013-08-22-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| | * | | ARM: at91: atmel_nand: pmecc driver will select the galois table by sector sizeWu, Josh2013-08-22-17/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Define the galois index table offset in chip head file. So user do not need to set by himself. Driver will set it correctly according to sector_size. Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Scott Wood <scottwood@freescale.com> [rebased on master] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| | * | | arm: atmel: add nand trimffs subcommand for at91sam9n12 and at91sam9x5Bo Shen2013-08-22-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | as the at91sam9n12 and at91sam9x5 soc support PMECC, when use u-boot to flash the rootfs, in order to avoid flash one sector with all 0xff into NAND, so use nand trimffs subcommand to avoid it Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| | * | | arm: atmel: add gmac support for sama5d3xek boardBo Shen2013-08-22-0/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | add gmac support for sama5d3xek board, the gmac embedded in: - sama5d33, sama5d34, sama5d35 Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| | * | | net: macb: fix the following building warningBo Shen2013-08-22-3/+9
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | fix the following building warning ---8>--- macb.c: In function 'macb_init': macb.c:400:14: warning: 'phydev' may be used uninitialized in this function macb.c:377:21: note: 'phydev' was declared here ---<8--- Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * | | Merge branch 'u-boot-tegra/master' into 'u-boot-arm/master'Albert ARIBAUD2013-09-03-5/+10
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| | * | | ARM: tegra: support raw ramdisksStephen Warren2013-08-19-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This way, we don't have to run mkimage on them. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * | | ARM: tegra: Enable data cache on DalmoreThierry Reding2013-08-19-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Disabling the data cache is no longer required to boot Dalmore, so enable it. This results in notably better performance when loading and booting the Linux kernel. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| | * | | ARM: tegra: Make cache line size SoC specificThierry Reding2013-08-19-2/+9
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently all Tegra SoCs are assumed to have 32 byte cache lines. This isn't true for Tegra114, however, which uses 4 Cortex-A15 cores and therefore uses a cache line size of 64 bytes. Move the cache line size setting to the per-SoC common configuration file. Signed-off-by: Thierry Reding <treding@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | | Merge 'u-boot-microblaze/zynq' into (u-boot-arm/master'Albert ARIBAUD2013-09-03-1/+80
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/include/asm/arch-zynq/hardware.h The conflict above was trivial and solved during merge.
| | * | | zynq: Enable axi ethernet and emaclite driver initializationMichal Simek2013-08-12-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Zynq can have axi ethernet and emaclite IPs in programmable logic. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| | * | | zynq: slcr: Wait 100ms till clk is properly setupMichal Simek2013-08-12-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If you don't wait you will loose the first sent packet even all bits in emacps are correctly setup. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| | * | | zynq: Add new ddrc driver for ECC supportMichal Simek2013-08-12-0/+62
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The first 1MB is not initialized by first stage bootloader. Check if memory is setup to 16bit mode and ECC is enabled. If it is, clear the first 1MB. Also u-boot should report only the half size of memory. Acked-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | | | cam_enc_4xx: Move CONFIG_SPL_PAD_TO to a config headerMasahiro Yamada2013-09-06-6/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For most boards which define CONFIG_SPL_PAD_TO, it is defined in config header files. Currently, there exists only one exception, cam_enc_4xx board. This patch moves CONFIG_SPL_PAD_TO definition from board/ait/cam_enc_4xx/config.mk to include/configs/cam_enc_4xx.h. With this modification, we can delete a glue code in the top level config.mk: ifneq ($(CONFIG_SPL_PAD_TO),) CPPFLAGS += -DCONFIG_SPL_PAD_TO=$(CONFIG_SPL_PAD_TO) endif Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Heiko Schocher <hs@denx.de>
* | | | | config.mk: Delete unnecessary codeMasahiro Yamada2013-09-06-16/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently no makefiles (board-specific config.mk) set the following variables: CONFIG_SPL_TEXT_BASE CONFIG_UBOOT_PAD_TO CONFIG_RESET_VECTOR_ADDRESS CONFIG_TPL_PAD_TO For all target boards using above macros they are set in header files (include/configs/*.h), so we do not need to set them as CPPFLAGS. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | | | fw_env: fix writing environment for mtd devicesOliver Metz2013-09-06-28/+42
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Oliver Metz <oliver@freetz.org> Tested-by: Luka Perkov <luka@openwrt.org>
* | | | | fw_env: add redundant env support for MTD_ABSENTOliver Metz2013-09-06-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Oliver Metz <oliver@freetz.org> Tested-by: Luka Perkov <luka@openwrt.org>
* | | | | mail: Fix email addressMarek Vasut2013-09-06-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix my email address. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@ti.com>
* | | | | Always build u-boot.img when using CONFIG_SPL_FRAMEWORKHenrik Nordström2013-09-06-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use of uImage formatted u-boot have long been preferred, and recent changes to better support Falcon mode on MMC now enforces it on MMC. Signed-off-by: Henrik Nordstrom <henrik@henriknordstrom.net>
* | | | | ahci: convert to use libata functions and definitionsRob Herring2013-09-06-79/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | libata already has similar functions as implemented in the ahci code. Refactor the code to use the libata variants and remove the dependency on ata.h. Convert some defines to use the version from libata.h. Also, remove some unnecessary memset's of bss data. This is a step toward hopefully merging ahci.c and dw_ahsata.c which are essentially the same driver. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Reviewed-by: Tom Rini <trini@ti.com>
* | | | | ahci: increase spin-up timeout to 20 secRob Herring2013-09-06-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on Linux libata code, most drives are less than 10 sec, but some need up to 20 sec. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Reviewed-by: Tom Rini <trini@ti.com>
* | | | | ahci: handle COMINIT received during spin-upRob Herring2013-09-06-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some Intel SSDs can send a COMINIT after the initial COMRESET. This causes the link to go down and we need to re-initialize the link. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
* | | | | ahci: move link bring-up handling to separate functionRob Herring2013-09-06-15/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the link bring-up handling to a separate weak function in order to allow platforms to override it. This is needed on highbank platform which needs special phy handling. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
* | | | | ahci: add defines for PORT_SCR_STAT register bitsRob Herring2013-09-06-2/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace hard-coded register values with proper defines for PORT_SCR_STAT register. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
* | | | | ahci: fix memory leak in ata_scsiop_inquiryRob Herring2013-09-06-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes a memory leak when scsi inquiry fails. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Reviewed-by: Tom Rini <trini@ti.com>
* | | | | ahci: fix unaligned accessRob Herring2013-09-06-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | gcc 4.7 will generate unaligned accesses to local char arrays, so make them static to avoid that. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Reviewed-by: Tom Rini <trini@ti.com>
* | | | | ahci: use ports implemented map instead of num_portsRichard Gibbs2013-09-06-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The AHCI driver was incorrectly using the Capabilities register NP (number of ports) field to determine which ports to activate. This commit changes it to correctly use the PORTS_IMPL register as a port map. Signed-off-by: Richard Gibbs <richard.gibbs@calxeda.com> Reviewed-by: Tom Rini <trini@ti.com>
* | | | | standalone-examples: support custom GCC libJack Mitchell2013-09-06-2/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for defining the gcc lib in standalone examples as is done in the main u-boot Makefile Signed-off-by: Jack Mitchell <jack.mitchell@dbbroadcast.co.uk>
* | | | | fs: fat: don't call disk_write with zero sector numWu, Josh2013-09-06-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the set_cluster() function, it will convert the buffer size to sector numbers. Then call disk_write() to write by sector. For remaining buffer, the size is less than a sector, call disk_write() again to write them in one sector. But if the total buffer size is less then one sector, the original code will call disk_write() with zero sector number. It is unnecessary. So this patch fix this. Now it will not call disk_write() if total buffer size is less than one sector. Signed-off-by: Josh Wu <josh.wu@atmel.com>
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