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* MA-9702-2 [Android] Enable booti for android arm64.sanshan zhang2017-07-10-6/+57
| | | | | | | | | | | | boot_addr_start for booti should be the addr of Image rather than boot.img, so need read Image into hdr->kernel_addr. change the offset for bootloader. booti do not call android_image_get_kernel to init android env. booti can't load boot.img, so it can't init android env. init android env through android_image_get_kernel. Change-Id: Ifb990ee9c5710ce7bd5fa9a0d4221dcb0e52d341 Signed-off-by: sanshan zhang <sanshan.zhang@nxp.com>
* MA-9382 [Android] uboot: enable BCB&BOOTCTR&LOCK_UNLOCKzhang sanshan2017-06-21-5/+50
| | | | | | | | | Add configure for bcb & bootctr & lock_unlock for android. change CONFIG_SYS_BOOT_NAND to CONFIG_NAND_BOOT correct macro ANDROID_FASTBOOT_NAND_PARTS. Change-Id: Iec2190ee940260d770de904889d8d352572a80b5 Signed-off-by: zhang sanshan <sanshan.zhang@nxp.com>
* MA-9382 [Android]uboot: fix compiler issue and command line issue.zhang sanshan2017-06-21-39/+23
| | | | | | | | Fix compile error when enable CONFIG_NAND_BOOT. Fix data abort issue in uboot. Change-Id: If41a7fafa40a2c851882c723a201ac5cdf31284f Signed-off-by: zhang sanshan <sanshan.zhang@nxp.com>
* MA-9376 [Android IMX] uboot: enable lock&unlockzhang sanshan2017-06-21-47/+1817
| | | | | | | | | | | | | | | | Fix compile error for api change. Porting below patches from v2015.o4: MA-7875 Enable CAAM for i.MX6 MA-7875-1 Support fastboot lock&unlock in u-boot MA-7875-2 Support fastboot lock/unlock in i.MX6 platform MA-7875-3 Support fastboot lock/unlock in i.MX6UL MA-8425 fastboot: return OKAY in fastboot erase MA-8418 fix return value check for get_device_and_partition MA-8622 - [brillo] fix uboot compile warnings and code style warnings Change-Id: I2370c3e5851cc1f92aaa93c200e6c079f7929af2 Signed-off-by: zhang sanshan <sanshan.zhang@nxp.com>
* MA-9375 [Android IMX] uboot: enable BCB and bootctrlzhang sanshan2017-06-21-838/+1154
| | | | | | | | | * Add API to read\write MISC partition. * get the boot mode from BCB command when boot up. * get the boot up tactics from bootctrl. Change-Id: Icbba6340e10983dddc1b04804ecc012a3a3c57d0 Signed-off-by: zhang sanshan <sanshan.zhang@nxp.com>
* MLK-15127 mx7dsdb: fix epdc en gpio usagePeng Fan2017-06-21-0/+1
| | | | | | | | Request gpio before use it, otherwise it will fail to drive the gpio when gpio_direction_output. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com>
* MLK-15108 mx7d_12x12_lpddr3_arm2: Fix PMIC setting issueYe Li2017-06-20-1/+1
| | | | | | | | | Fix the SW2MODE setting problem in power_init_board, which causes issue when wakeup source is set in kernel for LPSR. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Bai Ping <ping.bai@nxp.com> (cherry picked from commit 35e62eb779ffcc5af32a6fff615549e536bf6cf4)
* MLK-13723 imx7d: restore epdc QoS setting after exit the lpsr modeRobby Cai2017-06-20-0/+58
| | | | | | | | | | without this patch, the QoS setting will be lost after exit LPSR mode. The patch moves the QoS setting into DDR setting group (in plugin mode), thus when exit LPSR mode, QoS setting will be restored as well as DDR setting. Signed-off-by: Robby Cai <robby.cai@nxp.com> (cherry picked from commit 0b217456375bace3fbe9a72c7e92a46dc1907277) (cherry picked from commit 75790929c674eea2f867b86a7734127d4cd45dfc)
* MLK-15087 mx7ulp_evk: Add m4 boot defconfigYe Li2017-06-20-0/+44
| | | | | | | | | Add back the defconfig to boot M4 in single mode, because some customers are using the defconfig during development. Signed-off-by: Ye Li <ye.li@nxp.com> Acked-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit 8d4daa7703af842a56e9ea7aefe7f3d3a36580b8)
* MLK-15086 arm: Add firmware_image section to objcopy flagsYe Li2017-06-20-0/+4
| | | | | | | | | The u-boot limits the needed sections in .bin by set -j parameter in objcopy. Need to add the firmware_image section for M4 image. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit 709839a52af39f1b4640ae3c72475fc01b1b37d5)
* MLK-14994 mx7ulp: Update M4 image header version checkYe Li2017-06-20-1/+1
| | | | | | | | | The latest M4 image uses the version 0x41 not 0x40, have to update it when checking M4 image. Otherwise M4 image won't be loaded. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit 4f421455c850226b9acec9a43b3997995929872e)
* MLK-14533 mx7ulp_evk: Change APLL and its PFD0 frequenciesYe Li2017-06-12-2/+26
| | | | | | | | | | | | | | | | | | | | | | | To support HDMI display on EVK board, the LCDIF pix clock must be 25.2Mhz. Since the its PCC divider range is from 1-8, the max rate of LCDIF PCC source clock is 201.6Mhz. This limits the source clock must from NIC1 bus clock or NIC1 clock, other sources from APLL PFDs are higher than this max rate. The NIC1 bus clock and NIC1 clock are from DDRCLK whose parent source is APLL PFD0, so we must change the APLL PFD0 and have impact to DDRCLK, NIC1 and NIC1 bus. Eventually, this requests to set the APLL PFD0 frequency to 302.4Mhz (25.2 * 12), with settings: PFD0 FRAC: 32 APLL MULT: 22 APLL NUM: 2 APLL DENOM: 5 Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Fancy Fang <chen.fang@nxp.com> (cherry picked from commit 91be2789a93288cc087cd9e8db522c8308ef007c) (cherry picked from commit 40fd4ea8d86142a7182d13a99db4f2b4d1b55d35)
* MLK-15044 DTS: mx6ul/ullevk: Add OTG ID pin muxYe Li2017-06-12-0/+32
| | | | | | | | | The OTG ID pin mux setting is missed in DTS, so the OTG can't work as host mode. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit b23324508acf2fcda3531bce17055548758c49f8)
* MLK-14930-2 dwc_ahsata: Fix memory issue in reset_sataYe Li2017-05-24-0/+3
| | | | | | | | The reset_sata should reset the sata device info and free the probe_ent memory. Otherwise, it will cause memory leak if we init the sata again. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 39c9261fd057b0fa98f9dfdee7d368aa029ff736)
* MLK-14930-1 cmd: sata: Fix sata init and stop issueYe Li2017-05-24-3/+9
| | | | | | | | | | | | | When sata stop is executed, the sata_curr_device is not reset to -1, so any following sata commands will not initialize the sata again and cause problem. Additional, in sata init implementation, the sata_curr_device should be updated, otherwise sata will be initialized again when doing other sata commands like read/write/info/part/device. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit e2a66807f3573e8344dcd285dcb7d53f0e5fcf8e)
* MLK-14958 mx6slevk: Move setup_spi to board_initYe Li2017-05-22-5/+7
| | | | | | | | Current setup_spi is in board_early_init_f which is too early, so gpio_request can't reserve the gpio successfully. Move it to board_init. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 7c1b220f77313d9df84dbaf0da6ac820e85cba9a)
* MLK-14945 HAB: Check IVT DCD pointer before authenticating imageYe Li2017-05-22-0/+11
| | | | | | | | | | | | To avoid security leak, check the IVT DCD pointer before authenticating the kernel image. If the pointer is not 0, set back it to 0 and give a warning like the log below. Authenticate image from DDR location 0x80800000... Warning, DCD pointer must be 0 Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 083daef8d9206d53fb4fa9807f37b8ff5dc319c7)
* MLK-14915 mx6ul_arm2/mx6ull_arm2: Fix ENET PHY reset issueYe Li2017-05-15-27/+59
| | | | | | | | | There are two pins used for ENET PHY reset, need to assert them before init the PHY. Current DM driver does not have such operation, need board level codes to handle. This patch moves the PHY reset operation into setup_fec, which is common for DM driver and non-DM driver. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14890 i2c: Enable I2C force idle busYe Li2017-05-15-91/+648
| | | | | | | | | | | This patch enables the I2C force idle bus for all i.MX6 and i.MX7 boards to avoid i2c bus problem during reboot. To use it, we must add some i2c properties in DTB file and the GPIO pinctrl for i2c. For mx6qsabreauto, mx6slevk, mx6sxsabresd and mx6sxscm, these boards call the setup_i2c. To remove conflict, change to use "setup_i2c" only for non-DM i2c driver. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14891 mx6slevk/mx6sll_arm2: Fix SPINOR CS GPIO usingYe Li2017-05-14-0/+4
| | | | | | | Needs to request the GPIO pin before assigning to GPIO to SPI driver which will directly setting it to output without request it. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14772 net: fec: set the device->seq id to priv->dev_idFugang Duan2017-05-12-5/+3
| | | | | | | | | i.MX6UL/ULL evk board net get the wrong MAC address from fuse, exp, eth1 get MAC0 address, eth0 get MAC1 address from fuse. Set the priv->dev_id to device->seq as the real net interface alias id then .fec_get_hwaddr() read the related MAC address from fuse. Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
* MLK-14877 DTB: mx6sllevk: Fix usdhc2 property issueYe Li2017-05-11-1/+1
| | | | | | | | For eMMC, should using "non-removable" property, not "no-removable", this cause USDHC driver has problem in get_cd, then switching to eMMC will always show no card present. Signed-off-by: Ye Li <ye.li@nxp.com>
* ARM: fixed relocation using proper alignmentManfred Schlaegl2017-05-11-1/+1
| | | | | | | | | | | | | | | | | | | | | | | Using u-boot-2017.05 on i.MX6UL we ran into following problem: Initially U-Boot could be started normally. If we added one random command in configuration, the newly generated image hung at startup (last output was DRAM: 256 MiB). We tracked this down to a data abort within relocation (relocated_code). relocated_code in arch/arm/lib/relocate.S copies 8 bytes per loop iteration until the source pointer is equal to __image_copy_end. In a good case __image_copy_end was aligned to 8 bytes, so the loop stopped as suggested, but in an errornous case __image_copy_end was not aligned to 8 bytes, so the loop ran out of bounds and caused a data abort exception. This patches solves the issue by aligning __image_copy_end to 8 byte using the linker script related to arm. From Community: http://patchwork.ozlabs.org/patch/760592/ Signed-off-by: Peng Fan <peng.fan@nxp.com>
* MLK-14864: regulator: pfuze100: unsigned compared against 0Peng Fan2017-05-11-3/+9
| | | | | | Fix coverity:392391 392382 392385 Unsigned compared against 0 Signed-off-by: Peng Fan <peng.fan@nxp.com>
* MLK-14862 net: eth-uclass: add return value checkPeng Fan2017-05-11-2/+12
| | | | | | | | Add return value check Coverity 392391 Signed-off-by: Peng Fan <peng.fan@nxp.com>
* MLK-14840: pinctrl: imx: fix resource leakPeng Fan2017-05-11-0/+5
| | | | | | | | | The device managed API actually not free the memory, so need to use devm_kfree to free the memory to avoid leakage. Coverity: 392384 resource leak Signed-off-by: Peng Fan <peng.fan@nxp.com>
* MLK-14878 qspi: Fix issue when enabling DDR modeYe Li2017-05-10-7/+13
| | | | | | | | | | | | | | | There are two problems in enabling DDR mode in this new driver: 1. The TDH bits in FLSHCR register should be set to 1. Otherwise, the TX DDR delay logic won't be enabled. Since u-boot driver does not have DDR commands in LUT. So this won't cause explicit problem. 2. When doing read/write/readid/erase operations, the MCR register is overwritten, the bits like DDR_EN are cleared during these operations. When we using DDR mode QSPI boot, the TDH bit is set to 1 by ROM. if the DDR_EN is cleared, there is no clk2x output for TX data shift. So these operations will fail. The explicit problem is users may get "SF: unrecognized JEDEC id bytes: ff, ff, ff" error after using DDR mode QSPI boot on 6UL/ULL EVK boards. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14808 mx6sxsabresd: Fix wrong configuration name for QSPI bootYe Li2017-05-10-1/+1
| | | | | | | A wrong config name is used for QSPI boot, it causes IVT offset wrong. Fix the typo issue. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14792 mx6ull: Disable WDOG3 after initYe Li2017-05-10-1/+1
| | | | | | | Need to power down WDOG3 for mx6ull, otherwise the kernel will reboot once the iomux for WDOG_ANY pin is configured. This is missed in community u-boot. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14839-2 imx: clean up print info for thermal and reset causeYe Li2017-05-09-3/+4
| | | | | | | Clean up the print info, so that the reset cause print can display in a new line. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14839-1 mx6: Fix wrong CPU frequencyYe Li2017-05-09-1/+1
| | | | | | Fix incorrect value for 696MHz CPU frequency on i.MX6UL. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14845 mx6/mx7: Not call usb setup functions used by non-DM driverYe Li2017-05-09-1/+101
| | | | | | | | | | | Use CONFIG_DM_USB to comment out USB setup functions used by non-DM driver. So they won't be executed when using DM driver. These USB setup functions may setup power control pins to USB_PWR function not GPIO, which is different as the GPIO function used by USB vbus-supply. And cause the power control not work. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14775 mx7dsabresd: Disable USDHC2 in device treeYe Li2017-05-08-1/+1
| | | | | | | | | | | The USDHC2 is connecting to BT/WIFI chip on SDB board, this controller is enabled in device tree as SDIO, but USDHC driver in u-boot will use it as SDHC. So totally 3 USDHC devices will be created, and cause run time MMC environments go wrong because it only supports USDHC1 and USDHC3. So disable the unused USDHC2 controller in u-boot device tree. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14828 env_sata: Fix SATA saveenv issueYe Li2017-05-08-1/+1
| | | | | | | Wrong env buffer was passed into sata write function, so the saveenv can't work. Fix this issue. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14768 fec: Change CONFIG_ETHPRIME name to align with DM ETHYe Li2017-05-08-0/+92
| | | | | | | | | | The DM Ethernet driver requests the "ethprime" to align with DTB name or start with "eth" with seq number as index. So previous name "FEC" can't work as prime. Must change it to the "eth0" for first ethernet device, or "eth1" for second one. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14831 mx6: Fix wrong bmode value used for usb bootYe Li2017-05-08-1/+1
| | | | | | | Wrong bmode value is used in community u-boot for usb reboot. And cause it failed. Fix this by using a reserved bootcfg value. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14779 mx6qdlsabreauto: Fix usb detect issueYe Li2017-05-08-26/+6
| | | | | | | | The recent ehci-mx6 driver can support vbus-supply property, no need to request io expander pins in usb setup. If did this, the regulator for vbus-supply will fail to get due to the pin is occupied. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14777 imx: mx6ul/mx6ull/mx7d: correct the usage of the macro ↵Fugang Duan2017-05-04-14/+14
| | | | | | | | | | | | | PFUZE3000_SW1AB_SETP() Commit:894a4b4da7e2 add the voltage configuration macro that base on the 0.1mV precision, and i.MX6UL/i.MX6ULL/i.MX7D use the macro as 1mV prevision that cause the conversion are wrong, then some boards cannot boot up in ldo bypass mode. The patch just correct the usage of PFUZE3000_SW1AB_SETP(). Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
* MLK-14776 imx6sl: add enet phy reset to i.MX6SL EVK boardFugang Duan2017-05-03-7/+8
| | | | | | | | For some i.MX6SL evk board, enet phy need reset. Add phy reset before phy clock enable and init the pinctrl earlier. Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
* MXSCM-292-3 mx6sxscm: add dts files for EVB boardJuan Gutierrez2017-04-28-1/+1185
| | | | | | | Copy the dts files from kernel for MX6SXSCM EVB board for preparing enabling the OF_CONTROL. Signed-off-by: Juan Gutierrez <juan.gutierrez@nxp.com>
* MXSCM-292-2 mx6sxscm: convert to enable OF_CONTROL and DM driversJuan Gutierrez2017-04-28-31/+391
| | | | | | | | | | | | | Update mx6sxscm boards code and build configurations to enable OF_CONTROL and DM drivers. 1. Update GPIO codes for adding gpio request 2. Update PMIC and LDO by-pass codes for DM PMIC 3. Add lpddr2 512MB size and eMMC options tolocal Kconfig 4. Update license with NXP 2017 5. Add defconfigs for EVB boards Signed-off-by: Juan Gutierrez <juan.gutierrez@nxp.com>
* MXSCM-292-1 mx6sxscm: add mx6sxscm boards codeJuan Gutierrez2017-04-28-0/+1432
| | | | | | | Move the scm mx6sxscm board generic support code from v2016.03 as the base for converting to use DTB OF_CONTROL Signed-off-by: Juan Gutierrez <juan.gutierrez@nxp.com>
* MXSCM-291 mx6dqscm: set runtime fdt_file and other fixesJuan Gutierrez2017-04-28-6/+51
| | | | | | | | 1. set fdt_file according to board_rev which is set at runtime 2. Add macros for proper delimitation for different board builds 3. Fix and add proper iomux configuration Signed-off-by: Juan Gutierrez <juan.gutierrez@nxp.com>
* MXSCM-290-3 mx6dqscm: add dts files for qwks boardsJuan Gutierrez2017-04-28-1/+1057
| | | | | | | Copy the dts files from kernel for qwks boards for preparing enabling the OF_CONTROL. Signed-off-by: Juan Gutierrez <juan.gutierrez@nxp.com>
* MXSCM-290-2 mx6dqscm: convert to enable OF_CONTROL and DM driversJuan Gutierrez2017-04-28-186/+781
| | | | | | | | | | | | | | | Update mx6dqscm boards code and build configurations to enable OF_CONTROL and DM drivers. 1. Update GPIO codes for adding gpio request 2. Enable USB DM driver 3. Update PMIC and LDO by-pass codes for DM PMIC 4. Add spinor boot support 5. Add lpddr2 modes, sizes and boards on local Kconfig 6. Update license with NXP 2017 7. Add defconfigs for qwks boards Signed-off-by: Juan Gutierrez <juan.gutierrez@nxp.com>
* MXSCM-290-1 mx6dqscm: add mx6dqscm boards codeJuan Gutierrez2017-04-28-0/+3190
| | | | | | | Move the scm mx6dqscm board generic support code from v2016.03 as the base for converting to use DTB OF_CONTROL. Signed-off-by: Juan Gutierrez <juan.gutierrez@nxp.com>
* MLK-14752 common/console.c: remove CONFIG_IS_ENABLED()Fugang Duan2017-04-26-19/+19
| | | | | | | | | | | | | | | Remove CONFIG_IS_ENABLED() macro in the driver, it seems the macro don't work in the config build for mx6sxsabreauto_config platform. And CONFIG_IS_ENABLED(FOO) evaluates to * 1 if CONFIG_SPL_BUILD is undefined and CONFIG_FOO is set to 'y' or 'm', * 1 if CONFIG_SPL_BUILD is defined and CONFIG_SPL_FOO is set to 'y' or 'm' If enable CONFIG_SPL_BUILD, then CONFIG_FOO doesn't work. Now remove the CONFIG_IS_ENABLED() in the driver. Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
* MLK-14750 mxc_fec: Add compatible string for i.mx6slYe Li2017-04-25-0/+1
| | | | | | | The compatible string "fsl,imx6sl-fec" is missed for i.mx6sl in u-boot FEC driver, so that FEC can't be recognized. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-13141 mx6qpsabresd: Do not touch VGEN3 and VGEN5Robin Gong2017-04-21-23/+28
| | | | | | | | | | VGEN3 and VGEN5 have been fused the right value in PF0100 on i.mx6qp board, so software didn't need to change their voltage output anymore. Otherwise, VGEN3 will be wrongly updated from 1.8v to 2.8v. Signed-off-by: Robin Gong <yibin.gong@nxp.com> (cherry picked from commit 6f7f185664a401f03f6ce6c81b996c1f27fdbe73) Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14698 imx: lpi2c: fix clock issue when NACK detectedGao Pan2017-04-20-4/+9
| | | | | | | | | | For LPI2C IP, NACK is detected by the rising edge of the ninth clock. In current uboot driver, once NACK is detected, it will reset and then disable LPI2C master. As a result, we can never see the falling edge of the ninth clock. Signed-off-by: Gao Pan <pandy.gao@nxp.com> (cherry picked from commit dd139ee52b709c95af3e0c968bcbc3cf42cca408)
generated by cgit v1.1 at 2024-12-19 04:12:03 +0000