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| * | tegra: gpio: Show the GPIO value for outputsSimon Glass2016-02-16-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The tegra GPIO controller has two ways of reading the value of a GPIO. It can supply the 'input' value (which is the value read from the pin) and the 'output' value (which is the value being driven from the pin. With a GPIO set to output mode, the 'input' value is always low which is not very useful. This has the unfortunate result that setting a GPIO high still leaves it showing as low in the 'gpio status' command. Adjust the driver to check which direction the GPIO is set to, then read the value from the appropriate register: 'input' for input GPIOs, 'output' for output GPIOs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | tegra: dts: Sync up nyan-big files with LinuxSimon Glass2016-02-16-356/+2038
| | | | | | | | | | | | | | | | | | | | | | | | Sync up these files with Linux v4.4. Some differences remain, principally that the addresses are still 32-bit in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | tegra: dts: Sync up the tegra124 device tree files with LinuxSimon Glass2016-02-16-468/+994
| | | | | | | | | | | | | | | | | | | | | Sync up these files with Linux v4.4. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | tegra: mmc: Fix comments in the MMC driver initSimon Glass2016-02-16-2/+2
| | | | | | | | | | | | | | | | | | | | | Fix the SoC names in two comments. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | dm: video: Flush the cache after a puts()Simon Glass2016-02-16-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This helps keep the display consistent. puts() is used when printing the prompt, so is a useful way to make sure the current display contents is visible. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | tegra: keyboard: Fix the init orderSimon Glass2016-02-16-1/+1
| |/ | | | | | | | | | | | | | | We need to add the base tables before adding the function tables. Fix the init order so the keyboard scans keys correctly. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | net: phy: marvell: Fix problem with phy_reset() clearing BMCRStefan Roese2016-02-18-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With commit a058052c [net: phy: do not read configuration register on reset], phy_reset() will clear the BMCR register. Resulting in bit 12 being cleared (A/N enable). This leads to autonegotiation link problems, at least on the Marvell Armada ClearFog board. I suspect that other boards using this driver will be affected as well. At the of m88e1111s_config(), phy_reset() is called. This is not needed for the PHY to load the changed configuration, as phy_reset() is called a few lines before already. So lets call genphy_restart_aneg() here instead to start the AN correctly. Tested on clearfog. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Stefan Agner <stefan@agner.ch> Cc: Hao Zhang <hzhang@ti.com> Cc: Michal Simek <monstr@monstr.eu> Cc: Andy Fleming <afleming@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | net: phy: marvell: Call phy_reset() where possibleStefan Roese2016-02-18-21/+2
|/ | | | | | | | | | | | | Instead of coding the soft PHY reset function multiple times in marvell.c, lets call the common phy_reset() function from phy.c. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Stefan Agner <stefan@agner.ch> Cc: Hao Zhang <hzhang@ti.com> Cc: Michal Simek <monstr@monstr.eu> Cc: Andy Fleming <afleming@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* Prepare v2016.03-rc2Tom Rini2016-02-15-1/+1
| | | | Signed-off-by: Tom Rini <trini@konsulko.com>
* test/py: put "Starting U-Boot" into separate log sectionStephen Warren2016-02-15-1/+3
| | | | | | | | | | | | | | | | | The initial boot of U-Boot happens within the context of the first test that needs to access the U-Boot console when there is no existing connection. This keeps all activity nestled within test execution, which fits well into the pytest model. However, this mingles the U-Boot startup logs with the execution of some test(s), which hides find the boundary between the two. To solve this, wrap the "Starting U-Boot" logic into a separate log section. If the user wishes, they can simply collapse this log section when viewing the HTML log, to concentrate purely on the test's own interaction. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
* test/py: handle exceptions in console creationStephen Warren2016-02-15-7/+15
| | | | | | | | | | | | | | | | | | | | | | | | u_boot_console.exec_attach.get_spawn() performs two steps: 1) Spawn a process to communicate with the serial console. 2) Reset the board so that U-Boot starts running from scratch. Currently, if an exception happens in step (2), no cleanup is performed on the process created in step (1). That process stays running and may e.g. hold serial port locks, or simply continue to read data from the serial port, thus preventing it from reaching any other process that attempts to read from the same serial port later. While there is error cleanup code in u_boot_console_base.ensure_spawned(), this is not triggered since the exception prevents assignment to self.p there, and hence the exception handler has no object to operate upon in cleanup_spawn(). Solve this by enhancing u_boot_console.exec_attach.get_spawn() to clean up any objects it has created. In theory, u_boot_spawn.Spawn's constructor has a similar issue, so fix this too. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
* test/py: print summary in test orderStephen Warren2016-02-15-8/+8
| | | | | | | | | | | | Use lists rather than sets to record the status of tests. This causes the test summary in the HTML file to be generated in the same order as the tests are (or would have been) run. This makes it easier to locate the first failed test. The log for this test might have interesting first clues re: interaction with the environment (e.g. hardware flashing, serial console, ...) and may help tracking down external issues. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
* test/py: fix CONFIG_SPL testStephen Warren2016-02-15-1/+1
| | | | | | | | | | The Python ini file parser that's used to parse .config converts all keys to lower-case. Hence, all queries against the results must use lower-case. Fix u_boot_console.ensure_spawned() to test CONFIG_SPL correctly, or the connection will fail for boards that have SPL. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
* Enable test/py for sandbox in Travis CIStephen Warren2016-02-15-0/+8
| | | | | | | | | | This provides runtime test coverage in Travis, in addition to the existing build coverage. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Roger Meier <r.meier@siemens.com> Reviewed-by: Heiko Schocher <hs@denx.de> Acked-by: Simon Glass <sjg@chromium.org>
* test/py: don't import pexpectStephen Warren2016-02-15-1/+0
| | | | | | | | The code replaced pexpect with custom code long ago. Don't import the unused module so it doesn't need to be installed. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
* test/py: add docs for gdbserver and pytest optionsStephen Warren2016-02-15-4/+56
| | | | | | | | Add documentation describing the new --gdbserver feature, and some common pytest options. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
* test/py: run all "ut" subtestsStephen Warren2016-02-15-40/+108
| | | | | | | | | | | Invoke each "ut"-based unit test as a separate pytest. Now that the DM unit test runs under test/py, remove the manual shell script that invokes it. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> # v2, on sandbox
* Makefile: generate symbol list from u-bootStephen Warren2016-02-15-1/+6
| | | | | | | | | This information may be useful for both debugging, and processes that want to perform simple forms of introspection on the U-Boot binary, such as determining the set of "ut" subtests that are compiled in. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
* gpio: Correct handling of 'gpio status'Simon Glass2016-02-15-1/+1
| | | | | | | | | | | | This is broken - we need to look at the first two characters to distinguish 'gpio status' from 'gpio set'. Fixes: 0ffe6ab5 (gpio: Allow 's' as an abbreviation for 'status') Reported-by: Soeren Moch <smoch@web.de> Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Soeren Moch <smoch@web.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Hannes Schmelzer <oe5hpm@oevsv.at>
* tools: fix env_flags buildLubomir Rintel2016-02-15-0/+1
| | | | | | | | | | | | | | | | | $ make tools-all ... In file included from tools/env/env_flags.c:1:0: tools/env/../../common/env_flags.c: In function ‘env_flags_parse_varaccess_from_binflags’: tools/env/../../common/env_flags.c:156:18: warning: implicit declaration of function ‘ARRAY_SIZE’ [-Wimplicit-function-declaration] for (i = 0; i < ARRAY_SIZE(env_flags_varaccess_mask); i++) ^ Seems like the other utilities just add a copy of ARRAY_SIZE since there's nowhere to include it from (tools/imagetool.h, tools/mxsimage.h). Let's do the same here. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
* ARM: rpi: set initrd_highLubomir Rintel2016-02-15-0/+1
| | | | | | | | | | | | | | | | | | | The kernel gets much too sad when the ramdisk is loaded too high into the 1GiB of memory on Raspberry Pi 2: ## Flattened Device Tree blob at 00000100 Booting using the fdt blob at 0x000100 Loading Ramdisk to 39c14000, end 3ab45067 ... OK Using Device Tree in place at 00000100, end 000045ea ... [ 0.599346] Unpacking initramfs... [ 0.602924] Unable to handle kernel paging request at virtual address f9c14000 Placement of the device tree was fixed in 89ca1000 (ARM: rpi: set fdt_high in the default environment). Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Acked-by: Stephen Warren <swarren@wwwdotorg.org>
* Makefile: remove BUILD_TAG from KBUILD_CFLAGSStephen Warren2016-02-15-4/+1
| | | | | | | | | | | | | | | | | | | | | | | If BUILD_TAG is part of KBUILD_CFLAGS, then any time the value changes, all files get rebuilt. In a continuous integration environment, the value will change every build. This wastes time, assuming that incremental builds would otherwise occur. To solve this, remove BUILD_TAG from KBUILD_CFLAGS and add it to CFLAGS for just the one file that uses it. This does have the disadvantage that if any other files want to use the flag, we'll need to duplicate this custom CFLAGS setup logic. However, it seems unlikely we'll need this. An alternative would be to add BUILD_TAG to the "local version" and remove the special case code from display_options.c. However, that would affect the format of the U-Boot signon message, which may negatively affect people looking for specific data there. The approach of using file-specific CFLAGS was suggested by Masahiro Yamada. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
* OMAP3_logic: Add NAND args to boot UBIFSAdam Ford2016-02-15-0/+6
| | | | | | | | | | With the recent addition of UBI support, this patch will add the preset parameters to allow for mouting an UBIFS from the 'fs' partition in NAND. -V2: ubi.mtd=fs instead of ubi.mtd=4 Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* am43xx: qspi: Fix config to select SPI modeVignesh R2016-02-15-1/+1
| | | | | | | | | | CONFIG_SF_DEFAULT_MODE is used to select default SPI mode when using sf commands. Therefore fix am43xx to use CONFIG_SF_DEFAULT_MODE instead of CONFIG_DEFAULT_SPI_MODE. Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
* ARM : DRA7: Switch QSPI to use MODE-0 at 64MHzVignesh R2016-02-15-9/+25
| | | | | | | | | | According to Data Manual(SPRS915P) of AM572x, TI QSPI controller on DRA74 EVM(rev 1.1+) can support up to 64MHz in MODE-0, whereas MODE-3 is limited to 48MHz. Hence, switch to MODE-0 for better throughput. Also, add IODelay parameters for the same. Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* arm: VCMA9: because of NOR flash space constrains, activate THUMB build modeDavid Müller (ELSOFT AG)2016-02-15-0/+2
| | | | Signed-off-by: David Müller <d.mueller@elsoft.ch>
* arm: build some file(s) as ARM mode onlyDavid Müller (ELSOFT AG)2016-02-15-0/+6
| | | | Signed-off-by: David Müller <d.mueller@elsoft.ch>
* arm: the ARM920T is THUMB capable, so select the appropriate ISADavid Müller (ELSOFT AG)2016-02-15-1/+1
| | | | Signed-off-by: David Müller <d.mueller@elsoft.ch>
* arm: make sure board_init_r() is being called using the right mode (ARM / THUMB)David Müller (ELSOFT AG)2016-02-15-1/+5
| | | | Signed-off-by: David Müller <d.mueller@elsoft.ch>
* Fix variable documented in README.distro for PXE address.Vagrant Cascadian2016-02-15-1/+1
| | | | | | | Fixes typo of pxe_addr_r with pxefile_addr_r. Signed-off-by: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Stephen Warren <swarren@wwwdotorg.org>
* OMAP3LOGIC: Update maintainerAdam Ford2016-02-15-1/+1
| | | | | | | | I will take this over from Peter Barada, since I work with it daily at Logic PD. Signed-off-by: Adam Ford <aford173@gmail.com> Acked-by: Peter Barada <peter.barada@logicpd.com>
* OMAP3: omap3_logic: Grow SPL to 64K from 54KAdam Ford2016-02-15-0/+6
| | | | | | | | Based on the work done by Overo, this seems to help some compilers that have a hard time fitting all the code into the allocated space. Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* OMAP3: am3517_evm: SD/MMC boot with uEnv.txt, zImage, and FDTDerald D. Woods2016-02-15-11/+37
| | | | | | | | | | | | | | | | | | | | | Boot with the Linux zImage and am3517-evm.dtb pair, when SD/MMC media is present. This behavior can be overridden by creating a 'uEnv.txt' file with 'uenvcmd' defined. To boot an existing 'uImage', create the following 'uEnv.txt': [start]----------------------------------------------------------------- loaduimage=fatload mmc 0:1 ${loadaddr} ${bootfile} uenvcmd=run loaduimage; run mmcargs; bootm ${loadaddr} [end]------------------------------------------------------------------- Inspired by similar patches, for other OMAP3 boards, from EEWiki - https://github.com/eewiki/u-boot-patches/tree/master/v2016.01 Signed-off-by: Derald D. Woods <woods.technical@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* Merge branch 'master' of git://git.denx.de/u-boot-uniphierTom Rini2016-02-14-227/+1033
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| * ARM: uniphier: add support for PH1-Pro4 Ace and Sanji boardsMasahiro Yamada2016-02-14-0/+223
| | | | | | | | | | | | | | | | | | | | Initial commit for PH1-Pro4 Ace and Sanji boards. Note: There are two variants for the Ace board in terms of the amount of DDR memory; 1GB or 2GB. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * ARM: dts: uniphier: enable I2C channel 2 of ProXstream2 Gentil boardMasahiro Yamada2016-02-14-0/+5
| | | | | | | | | | | | This is used for on-board inter-connection. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * ARM: dts: uniphier: add EEPROM node for ProXstream2 Gentil boardMasahiro Yamada2016-02-14-0/+6
| | | | | | | | | | | | | | This board has an EEPROM connected to the I2C channel 0 of the SoC. Its slave address is 0x54. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * ARM: uniphier: drop unnecessary "bootm_low" environment defineMasahiro Yamada2016-02-14-1/+0
| | | | | | | | | | | | | | | | | | | | | | This environment define has been here to work around the LMB allocation error introduced by commit 9c11135ce053 ("image: fix getenv_bootm_size() function"). It is no longer needed because the root cause was fixed by commit 0cb389dd1a38 ("image: fix getenv_bootm_size() function again"). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * ARM: uniphier: adjust DDR clock delay line for ProXstream2Masahiro Yamada2016-02-14-2/+10
| | | | | | | | | | | | | | | | It turned out that DDR channel 2 was not working on ProXstream2 Vodka board. Add the missing ACBLDR0 register setting to adjust the delay between the clock lines and the address/command lines. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * ARM: uniphier: move cmd_ddrmphy.c to fix build errorMasahiro Yamada2016-02-14-0/+0
| | | | | | | | | | | | | | If CONFIG_CMD_DDRMPHY_DUMP is enabled, the build fails. Fixes: 93d92d46cd01 ("ARM: uniphier: add dump command for DDR Multi PHY registers") Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * ARM: uniphier: fix makefiles to build cmd_ddr(m)phy.cMasahiro Yamada2016-02-14-1/+8
| | | | | | | | | | | | | | | | The U-Boot proper building needs to descend arch/arm/mach-uniphier/dram to build these commands. Fixes: 93d92d46cd01 ("ARM: uniphier: add dump command for DDR Multi PHY registers") Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * ARM: uniphier: remove unused header mio-regs.hMasahiro Yamada2016-02-14-20/+0
| | | | | | | | | | | | | | | | | | This header is no longer used. This is the last file in arch/arm/mach-uniphier/include/mach/. At last, I've succeeded in eliminating the mach directory. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * ARM: uniphier: drop unneeded EHCI pin mux settingsMasahiro Yamada2016-02-14-25/+0
| | | | | | | | | | | | | | These pin mux settings are cared by the pinctrl drivers. Remove the ad-hoc code. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * usb: remove UniPhier EHCI driverMasahiro Yamada2016-02-14-83/+0
| | | | | | | | | | | | | | | | | | | | Now, all this driver does can be covered by the generic EHCI driver (drivers/usb/host/ehci-generic.c). UniPhier SoCs have switched to use it. Delete this driver rather than bothering to convert it to Driver Model. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Marek Vasut <marex@denx.de>
| * ARM: uniphier: switch over to generic EHCI driverMasahiro Yamada2016-02-14-8/+12
| | | | | | | | | | | | | | | | | | | | | | | | The UniPhier EHCI driver (drivers/usb/host/ehci-uniphier.c) does nothing special but set the base address and handle reset/clock. Since commit 4feefdcfe916 ("usb: add clock support for generic EHCI"), the generic one (drivers/usb/host/ehci-generic.c) can do those, too. We no longer need to stick to the dedicated driver. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * ARM: dts: uniphier: add clocks properties to EHCI nodesMasahiro Yamada2016-02-14-0/+12
| | | | | | | | | | | | This allows the EHCI driver to get clocks from device tree. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * ARM: dts: uniphier: add device nodes for MIO control blockMasahiro Yamada2016-02-14-0/+44
| | | | | | | | | | | | | | This block provides clock and reset control for MIO (Media I/O) hardware blocks such as USB2.0, SD card, eMMC, etc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * ARM: dts: uniphier: add device nodes for Peripheral control blockMasahiro Yamada2016-02-14-0/+36
| | | | | | | | | | | | | | This block provides clock and reset control for peripherals such as UART, I2C, IC card, etc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * ARM: dts: uniphier: add device nodes for System Control blocksMasahiro Yamada2016-02-14-0/+36
| | | | | | | | | | | | These are mainly used for controlling clocks and resets. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * ARM: dts: uniphier: add reference clock nodesMasahiro Yamada2016-02-14-0/+33
| | | | | | | | | | | | | | | | | | | | Add master clock nodes generated by crystal oscillators. PH1-sLD3, PH1-LD4: 24.576 MHz PH1-Pro4, ProXstream2: 25.000 MHz PH1-Pro5: 20.000 MHz Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
generated by cgit v1.1 at 2024-11-10 05:53:12 +0000