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* ENGR00244769-3 [NOR FLASH]-Improve WEIM NOR speedOliver Brown2013-02-13-3/+3
| | | | | | | | Improvements for WEIM NOR read performance. Changed burst and page size to 8 words. Changed read wait states to 10 and page read wait states to 4. Signed-off-by: Oliver Brown <oliver.brown@freescale.com>
* ENGR00243038: make get_mmc_env_devno to be a generic functionJason Liu2013-02-04-96/+14
| | | | | | | | | | | | | Currently, each board has one same function called get_mmc_env_devno, this will make the code a little bit duplication. We can make the get_mmc_env_devno to be a generic function, thus we can remove all the scattered function definition in each board file. And the patch also remove the boot check. Firstly, this check is needless, secondly, this will break the second boot support,for example: first boot from SPI, then switch to SD/MMC boot. Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00242042 MX6DQ/DL: fix boot fail issue on mx6dl boardsjb4.2.1_1.0.0-alphaLin Fuzhen2013-01-28-10/+35
| | | | | | | | MX6DQ and MX6DL share the common board file, but only MX6DQ has built-in SATA, for the SATA PDDQ should be enabled default, so it needs to add code to distinguish different chip ID. Signed-off-by: Lin Fuzhen <fuzhen.lin@freescale.com>
* ENGR00241595-4 mx6q-hdmidongle:Enable SATA PHY PDDQ defaultLin Fuzhen2013-01-25-20/+29
| | | | | | | | | | | | | | | | The SATA PHY PDDQ configuration is depended on the CONFIG_CMD_SATA defined or not in board config file. If SATA feature is not config, then the PDDQ will not be set, SATA PHY will not entry in Low Power Mode, and it will consume some power even there is no sata devices on board. This patch: 1 Enable SATA PHY PDDQ default no matter the SATA is enabled or not in board config file, SATA module will disable PDDQ first when used phy, so default enable PDDQ will not affect SATA feature. 2 It needs a delay to wait for SATA PHY initialize after enable it, otherwise write the phy registers will fail. Signed-off-by: Lin Fuzhen <fuzhen.lin@freescale.com>
* ENGR00241595-3 mx6q-sabreauto:Enable SATA PHY PDDQ defaultLin Fuzhen2013-01-25-16/+18
| | | | | | | | | | | | | | | | The SATA PHY PDDQ configuration is depended on the CONFIG_CMD_SATA defined or not in board config file. If SATA feature is not config, then the PDDQ will not be set, SATA PHY will not entry in Low Power Mode, and it will consume some power even there is no sata devices on board. This patch: 1 Enable SATA PHY PDDQ default no matter the SATA is enabled or not in board config file, SATA module will disable PDDQ first when used phy, so default enable PDDQ will not affect SATA feature. 2 It needs a delay to wait for SATA PHY initialize after enable it, otherwise write the phy registers will fail. Signed-off-by: Lin Fuzhen <fuzhen.lin@freescale.com>
* ENGR00241595-2 mx6q-arm2:Enable SATA PHY PDDQ defaultLin Fuzhen2013-01-25-18/+18
| | | | | | | | | | | | | | | | The SATA PHY PDDQ configuration is depended on the CONFIG_CMD_SATA defined or not in board config file. If SATA feature is not config, then the PDDQ will not be set, SATA PHY will not entry in Low Power Mode, and it will consume some power even there is no sata devices on board. This patch: 1 Enable SATA PHY PDDQ default no matter the SATA is enabled or not in board config file, SATA module will disable PDDQ first when used phy, so default enable PDDQ will not affect SATA feature. 2 It needs a delay to wait for SATA PHY initialize after enable it, otherwise write the phy registers will fail. Signed-off-by: Lin Fuzhen <fuzhen.lin@freescale.com>
* ENGR00241595-1 mx6q-sabresd:Enable SATA PHY PDDQ defaultLin Fuzhen2013-01-25-29/+32
| | | | | | | | | | | | | | | | The SATA PHY PDDQ configuration is depended on the CONFIG_CMD_SATA defined or not in board config file. If SATA feature is not config, then the PDDQ will not be set, SATA PHY will not entry in Low Power Mode, and it will consume some power even there is no sata devices on board. This patch: 1 Enable SATA PHY PDDQ default no matter the SATA is enabled or not in board config file, SATA module will disable PDDQ first when used phy, so default enable PDDQ will not affect SATA feature. 2 It needs a delay to wait for SATA PHY initialize after enable it, otherwise write the phy registers will fail. Signed-off-by: Lin Fuzhen <fuzhen.lin@freescale.com>
* ENGR00240261 support fastboot for nand boot in sabreauto_androidb022472013-01-16-0/+6
| | | | | | Add partition table for nand boot. Signed-off-by: b02247 <b02247@freescale.com>
* ENGR00239610: Enhance the quick fastboot stabilityLiGang2013-01-11-28/+24
| | | | | | | 1. Correct oversight of setup and endpoint complete irq handler sequence 2. Add check to string descriptor index Signed-off-by: LiGang <b41990@freescale.com>
* ENGR00239607 add nand config for android sabreautob022472013-01-10-11/+404
| | | | | | Add nand config for android sabreauto Signed-off-by: b02247 <b02247@freescale.com>
* ENGR00239366: Add support for nand storage in quick fastbootLiGang2013-01-09-25/+76
| | | | | | | 1. Add more check before writing image to storage 2. Fix failure when using nand storagea Signed-off-by: LiGang <b41990@freescale.com>
* ENGR00230437: mx6: epdc: EPDC I/O setup after V3p3 is enableFugang Duan2013-01-08-243/+380
| | | | | | | | | | EPDC will be used when splash screen is shown, EPDC io setup is done before 3V3 digitial power, which cause critical chip burn-out for all platforms. To follow the E-Ink specification, setup EPDC I/O after V3p3 is enable. Signed-off-by: Fugang Duan <B38611@freescale.com>
* ENGR00238363: mx6dl: epdc: remove epdc macro redefinition in config fileFugang Duan2013-01-08-4/+0
| | | | | | | Remove mx6dl_arm2 and mx6dl_sabresd config file epdc macro redefinition to avoid build warning. Signed-off-by: Fugang Duan <B38611@freescale.com>
* ENGR00238834: mx6solo: add MFG support for mx6solo sabresd boardJason Liu2013-01-04-0/+304
| | | | | | add MFG support for mx6solo sabresd board Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00238371: mx6solo: sabresd: make system prompt indicate solo configJason Liu2012-12-27-1/+1
| | | | | | | make system prompt indicate solo config when using mx6solo_sabresd: "MX6Solo SABRESD U-Boot > " Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00238300: enhance the download speed for fastbootLiGang2012-12-27-2/+1044
| | | | | | | | | | 1. the new fastboot is an add-on feature, the original fastboot is reserved 2. the new fastboot is a subset of original fastboot, only support "download" and "flash" command 3. type "fastboot" in uboot to launch the original fastboot utility, type "fastboot q" in uboot to launch the new fastboot utility Signed-off-by: LiGang <b41990@freescale.com>
* ENGR00238048: Add support for processor serial ATAG in uboot for iMX53Nitin Garg2012-12-21-0/+31
| | | | | | | Add support for Processor UID ATAG in uboot for iMX53. The UID is present in Fuses bank 0 at offset 0x20. Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
* ENGR00235540 add sabreauto_6q config for androidb022472012-12-18-0/+130
| | | | | | Support fastboot and recovery Signed-off-by: b02247 <b02247@freescale.com>
* ENGR00236472 Update DDR script of ARD solo emulationAlejandro Sierra2012-12-13-77/+56
| | | | | | | | Update DDR script of ARD solo emulation, the ddr script based on the following commit from ddr-scripts-rel git: dfde48e Added MX6Solo ARD DDR3 init. Signed-off-by: Alejandro Sierra <b18039@freescale.com>
* ENGR00236902: mx6solo_sabresd: update the DDR script for solo-sabresdJason Liu2012-12-13-107/+71
| | | | | | | | | This patch update the DDR script for mx6solo_sabresd board. The DDR script based on the following commit from ddr-scripts-rel.git 9d4e11a Added MX6Solo SabreSD DDR3 script Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00235821 mx6: correct work flow of PFDsAnson Huang2012-12-13-0/+31
| | | | | | | | | | PFDs need to be gate/ungate after PLL lock to reset PFDs to right state. Otherwise PFDs may lose correct state in state-machine, then no output clock. For i.MX6DL and i.MX6SL, ROM have taken care of PFD396 already since the bus clock needs it. Signed-off-by: Anson Huang <b20788@freescale.com>
* ENGR00236620: Add Android fastboot and recovery reboot supportNitin Garg2012-12-11-92/+53
| | | | | | | Add support for Android fastboot and recovery reboot commands for iMX5. Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
* ENGR00235817 mx6: use SNVS LPGPR register to store boot mode value.Zhang Jiejing2012-12-11-4/+7
| | | | | | | | | | | | | | | | | After using POR reset, the content in SRC will be reset. See RM: 63.5.1.2.3 IPP_RESET_B(POR) Because POR reset will reset most of register in IC, so use SNVS_LP General Purpose Register (LPGPR) to store the boot mode value. Below copy from SNVS_BlockGuide.pdf: The SNVS_LP General Purpose Register provides a 32 bit read write register, which can be used by any application for retaining 32 bit data during a power-down mode This Patch will use [7,8] bits of this register. Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
* ENGR00236337: mx6/clock: emi_slow clock rate is not printed out correctlyJason Liu2012-12-10-1/+1
| | | | | | | This issue due to PODF is not used correcly, need use the following instead: ACLK_EMI_SLOW_PODF_OFFSET, the original used ACLK_EMI_PODF_OFFSET was wrong. Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR000234991 MX6DL/ARD: Two boards met kernel dump during boot upjb4.1.2_1.0.0-betaJason Liu2012-12-05-8/+8
| | | | | | | | | | | | The issue is caused by DDR script changed io pads to DDR differential mode but forget to do the calibration data update. This patch updated the DDR script on MX6DL ARD board based on the commit on the ddr-scripts-rel: 53121e0 Updated MX6DL and MX6DQ ARD and SabreSD scripts with new calibration values for IO pads set to differential mode; Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00235564: i.mx6 u-boot: change plugin to use ROM API table for code jumpEric Sun2012-12-03-12/+21
| | | | | | | | | | | | | | The original plugin code uses hard coded assembly address for the code jump to "pu_irom_hwcnfg_setup", it can only works for specific chip version, for a new TO, the assembly address will change, and the plugin code simply fails. In fact there is an API entry table in a fixed ROM location, it contains the entry to the "pu_irom_hwcnfg_setup". This patch retrieve the jump address from this API table, thus avoid the limitation for current implementation. Apply to all plugin enabled platforms, MX6Q/DL ARM2, MX6SL ARM2/EVK Signed-off-by: Eric Sun <jian.sun@freescale.com>
* ENGR00223037 fsl: Add new board HDMI dongle for imx6 Q/DL.Zhang Xiaodong2012-11-28-0/+4911
| | | | | | Add HDMIdongle board for imx6Q/DL under board/freescale. Signed-off-by: Zhang Xiaodong <B39117@freescale.com>
* ENGR00233168 - U-Boot fails to boot from eMMCOliver Brown2012-11-27-197/+81
| | | | | | Aligning the flash header to remove the boot plugin as in previous release. Signed-off-by: Oliver Brown <oliver.brown@freescale.com>
* ENGR00233928 i.mx6q/sabresd: update the DDR script for i.MX6Q sabresd boardJason Liu2012-11-26-108/+102
| | | | | | | | This commit update the DDR script for i.MX6Q sabresd board based on the top of the following commit on ddr-scripts-rel: 02b8a73 removed some verbage (comments) from init, no changes to actual init Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00234353-3: mx6q_sabreauto remove EIM_A24 nor padsAdrian Alonso2012-11-20-2/+0
| | | | | | | | | | * Remove EIM_A24 nor pads as this are used for io steer control and are not connectted to NOR flash memory. * Fix conflict access when it's used as io control gpio. Signed-off-by: Adrian Alonso <aalonso@freescale.com>
* ENGR00234353-2: mx6q_sabreauto_weimnor fix redundant env offsetAdrian Alonso2012-11-20-6/+9
| | | | | | | | | | | | | | | | | | | | * Fix redundant enviroment offset * Disable I2C support as they share pads * Enable flash empty information * weim-nor partition layout +-----------------+ 0x08000000 + u-boot + +-----------------+ 0x08040000 (256k) + u-boot env + +-----------------+ 0x08060000 (128k) + u-boot redundat + +-----------------+ 0x08080000 (128k) + Kernel + +-----------------+ 0x08480000 (4M) + Rootfs + +-----------------+ (~27M) Signed-off-by: Adrian Alonso <aalonso@freescale.com>
* ENGR00234353-1: mx6_sabreauto fix weim-nor bootAdrian Alonso2012-11-20-21/+27
| | | | | | | | | | | | | * Fix weim-nor boot failure * Group weim-nor conflict modules If not defined CONFIG_CMD_WEIMNOR enable SPI-NOR and I2C (default) else enable weim-nor * Remove FLASH_SIZE macro, size is query by CFI driver * Enable flash empty information Signed-off-by: Adrian Alonso <aalonso@freescale.com>
* ENGR00233366-5 Anatop PFUZE: move LDO bypass code to kernelRobin Gong2012-11-19-125/+3
| | | | | | | move LDO bypass code and one PFUZE1.0 workaround code to kernel. Remove CONFIG_MX6_INTER_LDO_BYPASS in u-boot Signed-off-by: Robin Gong <b38343@freescale.com>
* ENGR00233933 i.mx6dl/sabresd: update the DDR script for i.MX6DL sabresd boardJason Liu2012-11-16-96/+90
| | | | | | | | This patch update the DDR script for the i.MX6DL sabresd board The script is based on top the commit on ddr-scripts-rel: 02b8a73 removed some verbage (comments) from init, no changes to actual init Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00233709-2 i.mx6q/sabreauto: update the DDR script for i.mx6q AI board:Jason Liu2012-11-16-110/+105
| | | | | | | | | This commit update the DDR script for i.MX6Q Sabreauto(AI) board. The script is based on top the commit on ddr-scripts-rel: 02b8a73 removed some verbage (comments) from init, no changes to actual init Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00233709-1 i.mx6dl/sabreauto: update the DDR script for i.mx6dl AI board:Jason Liu2012-11-16-18/+17
| | | | | | | | | This commit update the DDR script for i.MX6DL Sabreauto(AI) board. The script is based on top the commit on ddr-scripts-rel: 02b8a73 removed some verbage (comments) from init, no changes to actual init Signed-off-by: Jason Liu <r64343@freescale.com>
* ENGR00233881 Camera mx6q_sabresd:swap VGEN5&VGEN3 to fix camera streaks issueRobin Gong2012-11-16-0/+27
| | | | | | | | | On mx6q_sabresd RevC board, there is camera streaks issue, after HW check, they think there is current limit risk because VDDHIGH_IN and camera 2.8V power share the same VGEN5, they suggest seprate them, so we use VGEN5 as VDDHIGH_IN and use VGEN3 as camera 2.8V power supply. Also increase VDDHIG_IN from 2.8V to 3.0V to align with latest datasheet Signed-off-by: Robin Gong <B38343@freescale.com>
* ENGR00233716-2: mx6q_sabreauto flash u-boot into spi-nor fails to bootAdrian Alonso2012-11-15-28/+24
| | | | | | | | | | * Fix spi-nor boot failure * Fix unconfigured gpio pad setting when spi-nor or weim-nor on steer control gpios * Group gpio access only when I2C is enabled and restore route paths to avoid conflicts on shared pads Signed-off-by: Adrian Alonso <aalonso@freescale.com>
* ENGR00233716-1: mx6q_sabreauto aling spi-nor environment offssetAdrian Alonso2012-11-15-12/+12
| | | | | | | | | | | | | | | * Aling spi-nor environment offsset to 256k this allows a partition layout +-----------------+ 0x0 + bootloader + +-----------------+ 0x40000 (256k) + boot env + +-----------------+ 0x42000 (8k) + kernel + +-----------------+ Remaining space (~3.7M) Signed-off-by: Adrian Alonso <aalonso@freescale.com>
* ENGR00233730 PFUZE mx6q_sabresd: remove extra increase for PFUZE toleranceRobin Gong2012-11-15-14/+0
| | | | | | | There is no more tolerance issue on PFUZE, it will be only 25mV, so that we no need increase VDDSOC_IN from 1.375V to 1.425V. Signed-off-by: Robin Gong <B38343@freescale.com>
* ENGR00233307 Need secure/encrypted boot for Widevine support.Dan Douglass2012-11-12-12/+107
| | | | | | | | | | | | | | | | | | | | * Adding the config option CONFIG_SECURE_BOOT to the SabreSD board, but defaulting it to be disabled. Removed the CONFIG_SECURE_BOOT key from mx6q_arm2_android.h so that it is only in one file, include/configs/mx6q_arm2.h * Fixed up an address alignment check in authenticate_image(). The test would fail in the event the address is already aligned. Also, added some debug code which can be enabled to assist in testing secure images. * Added support for authenticating an image when using booti. * Adding support for secure boot to the Sabre SD board. * Added support for encrypted boot to mx6q arm2 board linker script. Signed-off-by: Dan Douglass <dan.douglass@freescale.com>
* ENGR00232682 mx6sl snvs: fix long press ONOFF failed issue in u-bootLin Fuzhen2012-11-09-0/+27
| | | | | | | | | the same as TKT104835 reported on MX6Q/DL Need set Power Supply Glitch to 0x41736166 and clear Power Supply Glitch Detect bit when POR or reboot or power on, otherwise system could not be power off anymore, it will power up auto agian. Signed-off-by: Lin Fuzhen <fuzhen.lin@freescale.com>
* ENGR00230364 - imx6sl: FEC: fix cycle reboot fail in EVK platform for bootp.Fugang Duan2012-11-08-2/+9
| | | | | | | | | | | In some imx6sl evk boards, fec cannot work fine while doing cycle reboot via to execute command "reboot" in kernel. The root cause: phys clock source is closed when reboot system, and LAN8720 status machine is in disorder. So it needs to do phy hardware reset to make phy enter normal state machine. Signed-off-by: Fugang Duan <B38611@freescale.com>
* ENGR002232258 MX6Q-ARM2: add a NAND boot config for ubootHuang Shijie2012-11-02-0/+273
| | | | | | add a new config for NAND boot in the mx6q-arm2 board. Signed-off-by: Huang Shijie <b32955@freescale.com>
* ENGR00231891-2 gpmi: fix the 4k page size limitHuang Shijie2012-10-31-2/+2
| | | | | | | We may use the 8K page nand now. So expand the page size from 4k to 8K. Also expand the oobsize to 1K size. Signed-off-by: Huang Shijie <b32955@freescale.com>
* ENGR00231891-1 gpmi: replace the hardcodeHuang Shijie2012-10-31-9/+3
| | | | | | | We have get the right infomation when we call the set_geometry(). So we replace the hardcode with the proper gpmi_info's values. Signed-off-by: Huang Shijie <b32955@freescale.com>
* ENGR00231781 fsl common:Align reversed color logo to standardLiu Ying2012-10-31-612/+612
| | | | | | | | | This patch removes the 'semiconductor' word in the freescale reversed color logo to align with the standard(preferred) one which can be found at the link: http://media.freescale.com/phoenix.zhtml?c=196520&p=irol-logosdisclaim Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
* ENGR00231581 BCH: fix the wrong data size macros in BCHimx-android-13.5.0-gaHuang Shijie2012-10-30-3/+8
| | | | | | | | | | | | | In the mx23/mx28, the DATA0_SIZE/DATAN_SIZE of the BCH's HW_BCH_FLASH1LAYOUT0/HW_BCH_FLASH0LAYOUT1 should be the real bytes length of the data chunk 0 and data chunk 1. But in the mx6q/mx50, the DATA0_SIZE/DATAN_SIZE of the BCH's HW_BCH_FLASH1LAYOUT0/HW_BCH_FLASH0LAYOUT1 should be multiple of 4 bytes. this patch fixes the wrong macros. Signed-off-by: Huang Shijie <b32955@freescale.com>
* ENGR00230967 Enable recovery mode by keys when bootLiGang2012-10-30-23/+92
| | | | | | | | | | 1. Add matrix key support 2. Add recovery mode support by pressing power key and volume down key when boot SW10 on MX6SL-EVK board configed as volume down key. SW1 on MX6SL-EVK board configed as power key Signed-off-by: LiGang <b41990@freescale.com>
* ENGR00231553: MX6SL: Uncovered an issue for I2C parent clockTerry Lv2012-10-30-2/+7
| | | | | | We need to check reg bit to decide I2C parent clock. Signed-off-by: Terry Lv <r65388@freescale.com>
generated by cgit v1.1 at 2024-11-25 16:23:18 +0000