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| * | net: tsec: Fix and cleanup tsec_mcast_addr()Claudiu Manoil2013-11-22-16/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are several implementation issues for tsec_mcast_addr() addressed by this patch: * unmanaged, not portable r/w access to registers; fixed with setbits_be32()/ clrbits_be32() * use of volatile pointers * unnecessary forced cast to u8 for the ether_crc() result * removed redundant parens * corrected some comment slips Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com> Patch: 279000
| * | net: Fix mcast function pointer prototypeClaudiu Manoil2013-11-22-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes the following compiler warnings when activating CONFIG_MCAST_TFTP: tsec.c: In function 'tsec_mcast_addr': tsec.c:130:2: warning: passing argument 2 of 'ether_crc' makes pointer from integer without a cast [enabled by default] In file included from /work/u-boot-net/include/common.h:874:0, from tsec.c:15: /work/u-boot-net/include/net.h:189:5: note: expected 'const unsigned char *' but argument is of type 'u8' tsec.c: In function 'tsec_initialize': tsec.c:646:13: warning: assignment from incompatible pointer type [enabled by default] eth.c: In function 'eth_mcast_join': eth.c:358:2: warning: passing argument 2 of 'eth_current->mcast' makes integer from pointer without a cast [enabled by default] eth.c:358:2: note: expected 'u32' but argument is of type 'u8 *' In the eth_mcast_join() implementation, eth_current->mcast() takes a u8 pointer to the multicast mac address and not a ip address value as implied by its prototype. Fix parameter type mismatch for tsec_macst_addr() (tsec.c): ether_crc() takes a u8 pointer not a u8 value. mcast() is given a u8 pointer to the multicats mac address. Update parameter type for the rest of mcast() instances. Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com> Patch: 278989
| * | net: designware: Fix alignment of buffer descriptorsAlexey Brodkin2013-11-22-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It's important that buffer descriptors are aligned in accordance to GMAC data bus width (32/64/128-bit). It's safe to align to 128-bit (16-bytes) for every bus width type. If buffer descriptor is improperly aligned GMAC discards lower bits of provided address and as a result reads from improper location that doesn't match expected fields. Commit ef76025a99247cdb8f927a2c9f15400678dfb599 "net: Multiple updates/enhancements to designware.c" introduced another structure member "link_printed" right before buffer descriptors while "padding" member was left untouched. This together with alignment of structure itself to 16-byte boundary forces buffer descriptoprs always to be 4-byte aligned that causes driver complete disfunction if GMAC bus width is 64 or 128-bit. Proposed change makes sure all buffer descriptors are 16-byte (128-bit) aligned. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Patch: 277902
| * | net: designware: Respect "bus mode" register contents on SW resetAlexey Brodkin2013-11-22-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | "bus mode" register contains lots of fields and some of them don't expect to be written with 0 (zero). So since we're only interested in resetting MAC (which is done with setting the least significant bit of this register with "0") I believe it's better to modify only 1 bit of the register. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Acked-by: Vipin Kumar <vipin.kumar@st.com> Patch: 277864
| * | net: sh-eth: Add support R8A7791Nobuhiro Iwamatsu2013-11-22-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | R8A7791 has the same sh-ether IP core as other SH/rmobile. This patch adds support of R8A7791. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> CC: Joe Hershberger <joe.hershberger@gmail.com>
| * | net, phy: fix AR8031 phy_maskHeiko Schocher2013-11-22-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | AR8035 driver will be never applied because of wrong mask for AR8031 driver. Fix this. Signed-off-by: Heiko Schocher <hs@denx.de> Reported-by: Pavel Nakonechny <pavel.nakonechny@skitlab.ru> Cc: Andy Fleming <afleming@freescale.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Patch: 276944
| * | net: rtl8169: Add support for RTL8168evl/8111evlThierry Reding2013-11-22-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | This chip is compatible with other RTL8168 chips and can be found on the NVIDIA Cardhu and Beaver boards. Signed-off-by: Thierry Reding <treding@nvidia.com> Patch: 276475
| * | net: rtl8169: Fix format stringThierry Reding2013-11-22-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | currticks() is defined as get_timer(0), which returns an unsigned long, so use %lu instead of %d to print the result. Signed-off-by: Thierry Reding <treding@nvidia.com> Patch: 276473
| * | net: add support for extended registers to mdio commandStefano Babic2013-11-22-16/+59
| | | | | | | | | | | | | | | | | | | | | | | | Some phys (Micrel) have additional registers that can be accessed using a special sequence. This patch allows to use standard "mdio" command to accesss these registers. Signed-off-by: Stefano Babic <sbabic@denx.de>
| * | net: add function to read/write extended registers in Micrel PhyStefano Babic2013-11-22-0/+32
| | | | | | | | | | | | Signed-off-by: Stefano Babic <sbabic@denx.de>
| * | net: add extended function to phy APIStefano Babic2013-11-22-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | Some phys (Micrel) has extended registers that must be accessed in a special way. Add pointers to the phy driver structure to allow to use these functions with mdio command. Signed-off-by: Stefano Babic <sbabic@denx.de>
| * | net: fix mask for phy Micrel KSZ9031Stefano Babic2013-11-22-1/+1
| | | | | | | | | | | | Signed-off-by: Stefano Babic <sbabic@denx.de>
| * | phy: add missing constants for Micrel KSZ9031Stefano Babic2013-11-22-0/+5
| | | | | | | | | | | | Signed-off-by: Stefano Babic <sbabic@denx.de>
| * | net/phy: realtek: Fix the PHY ID mask to ensure the correct Realtek PHY is ↵Bhupesh Sharma2013-11-22-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | detected The 'get_phy_driver' code in 'drivers/net/phy/phy.c' uses the following method to determine which driver is to be loaded for a particular PHY module: list_for_each(entry, &phy_drivers) { drv = list_entry(entry, struct phy_driver, list); if ((drv->uid & drv->mask) == (phy_id & drv->mask)) return drv; } This means that a drv->mask of 0xfffff0 will return incorrect phy driver for the logic above, even if the drv->uid is anything other than something ending with a 0x0. For e.g. if the RTL8211E drv->uid is 0x1cc915 and drv->mask is 0xffffff and the RTL8211B drv->uid is 0x1cc910 and drv->mask is 0xffffff0, then the phy driver selected will always be RTL8211B even though the underlying phy connected on the board is a 8211E module. This patch fixes this issue. Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
| * | net: phy/vitesse: Add support for VSC8514 phy moduleArpit Goel2013-11-22-1/+68
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for VSC8514 PHY module which can be found on Freescale's T1040RDB boards. Signed-off-by: Arpit Goel <B44344@freescale.com> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
| * | net: sh-eth: Add support R8A7790Nobuhiro Iwamatsu2013-11-22-1/+11
| | | | | | | | | | | | | | | | | | | | | | | | R8A7790 has the same sh-ether IP core as other SH/rmobile. This patch adds support of R8A7790. Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
| * | net: sh-eth: Add invalidate cache control for rmobile (ARM SoC)Nobuhiro Iwamatsu2013-11-22-5/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | The sh-eth of rmobile needs to use invalidate_cache* function. This patch adds invalidate_cache* function. Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Patch: 268948
| * | net: sh-eth: Add control for padding size of packet descriptorNobuhiro Iwamatsu2013-11-22-10/+30
| | | | | | | | | | | | | | | | | | | | | | | | sh-eth can change the alignment size of a packet descriptor according to BUS size. This patch adds this function. Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
| * | net: sh-eth: Change cache API of SHNobuhiro Iwamatsu2013-11-22-1/+2
| | | | | | | | | | | | | | | | | | | | | The cache API of SH was changed from dcache_wback_range to flush_dcache_range. sh-eth uses dcache_wback_range. This patch changes to flush_dcache_range. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
| * | NET: mvgbe: avoid unused variable warning when used without phylib supportSascha Silbe2013-11-22-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | Avoid a recently introduced unused variable warning for boards that use mvgbe but not phylib. Signed-off-by: Sascha Silbe <t-uboot@infra-silbe.de> Patch: 266334
| * | net: trivial: Fix typos in mii field descriptionsStephan Bauroth2013-11-22-2/+2
| | | | | | | | | | | | | | | Signed-off-by: Stephan Bauroth <stephan.bauroth@iav.de> Patch: 265707
| * | phylib: update atheros ar803x phyShengzhou Liu2013-11-22-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | As AR8031 and AR8033 have same PHY ID 0x4dd074, they use the common driver. Currently AR8031_driver didn't work for AR8033, hence updated it to have it work on AR8031/AR8033. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
| * | net: tftp: Make sure timeout will not effect wrap offsetrockly2013-11-22-1/+1
| |/ | | | | | | | | | | | | | | | | | | When the block 0 store to the memory of client and timeout at this moment. Because of no ACK packet, the server will send block 0 again, if this client reconnect to the server at this time, TftpBlockWrapOffset will become larger than it should be. Signed-off-by: Rockly <rocklygnome@gmail.com> Patch: 264417
* | Merge branch 'master' of git://git.denx.de/u-boot-nand-flashTom Rini2013-11-25-220/+532
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| * | am335x: fix GPMC config for NAND and NOR SPL bootpekon gupta2013-11-21-41/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | GPMC controller is common IP to interface with both NAND and NOR flash devices. Also, it supports max 8 chip-selects, which can be independently connected to any of the devices. But ROM code expects the boot-device to be connected to only chip-select[0]. Thus to resolve conflict between NOR and NAND boot. This patch: - combines NOR and NAND configs spread in board files to common gpmc_init() - configures GPMC based on boot-mode selected for SPL boot. Signed-off-by: Pekon Gupta <pekon@ti.com>
| * | mtd: nand: omap: add CONFIG_NAND_OMAP_ECCSCHEME for selection of ecc-schemepekon gupta2013-11-21-15/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds new CONFIG_NAND_OMAP_ECCSCHEME, replacing other distributed CONFIG_xx used for selecting NAND ecc-schemes. This patch aims at solving following issues. 1) Currently ecc-scheme is tied to SoC platform, which prevents user to select other ecc-schemes also supported in hardware. like; - most of OMAP3 SoC platforms use only 1-bit Hamming ecc-scheme, inspite the fact that they can use higher ecc-schemes like 8-bit ecc-schemes with software based error detection (OMAP_ECC_BCH4_CODE_HW_DETECTION_SW). - most of AM33xx SoC plaforms use 8-bit BCH ecc-scheme for now, but hardware supports BCH16 ecc-scheme also. 2) Different platforms use different CONFIG_xx to select ecc-schemes, which adds confusion for user while migrating platforms. - *CONFIG_NAND_OMAP_ELM* which enables ELM hardware engine, selects only 8-bit BCH ecc-scheme with h/w based error-correction (OMAP_ECC_BCH8_CODE_HW) whereas ELM hardware engine supports other ecc-schemes also like; BCH4, and BCH16 (in future). - *CONFIG_NAND_OMAP_BCH8* selects 8-bit BCH ecc-scheme with s/w based error correction (OMAP_ECC_BCH8_CODE_HW_DETECTION_SW). - *CONFIG_SPL_NAND_SOFTECC* selects 1-bit Hamming ecc-scheme using s/w library Thus adding new *CONFIG_NAND_OMAP_ECCSCHEME* de-couples ecc-scheme dependency on SoC platform and NAND driver. And user can select ecc-scheme independently foreach board. However, selection some hardware based ecc-schemes (OMAP_ECC_BCHx_CODE_HW) still depends on presence of ELM hardware engine on SoC. (Refer doc/README.nand) Signed-off-by: Pekon Gupta <pekon@ti.com>
| * | mtd: nand: omap: enable BCH ECC scheme using ELM for generic platformpekon gupta2013-11-21-125/+228
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | BCH8_ECC scheme implemented in omap_gpmc.c driver has following favours +-----------------------------------+-----------------+-----------------+ |ECC Scheme | ECC Calculation | Error Detection | +-----------------------------------+-----------------+-----------------+ |OMAP_ECC_BCH8_CODE_HW |GPMC |ELM H/W engine | |OMAP_ECC_BCH8_CODE_HW_DETECTION_SW |GPMC |S/W BCH library | +-----------------------------------+-----------------+-----------------+ Current implementation limits the BCH8_CODE_HW only for AM33xx device family. (using CONFIG_AM33XX). However, other SoC families (like TI81xx) also have ELM hardware module, and can support ECC error detection using ELM. This patch - removes CONFIG_AM33xx Thus this driver can be reused by all devices having ELM h/w engine. - adds omap_select_ecc_scheme() A common function to handle ecc-scheme related configurations. This can be used both during device-probe and via user-space u-boot commads to change ecc-scheme. During device probe ecc-scheme is selected based on CONFIG_NAND_OMAP_ELM or CONFIG_NAND_OMAP_BCH8 - enables CONFIG_BCH S/W library (lib/bch.c) required by OMAP_ECC_BCHx_CODE_HW_DETECTION_SW is enabled by CONFIG_BCH. - enables CONFIG_SYS_NAND_ONFI_DETECTION for auto-detection of ONFI compliant NAND devices - updates following README doc doc/README.nand board/ti/am335x/README doc/README.omap3 Signed-off-by: Pekon Gupta <pekon@ti.com> [scottwood@freescale.com: fixed unused variable warning] Signed-off-by: Scott Wood <scottwood@freescale.com>
| * | mtd: nand: omap: make am33xx/elm.c as common driver for all OMAPx and AMxxxx ↵pekon gupta2013-11-21-5/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | platforms ELM hardware engine which is used for ECC error detection, is present on all latest OMAP SoC (like OMAP4xxx, OMAP5xxx, DRA7xxx, AM33xx, AM43xx). Thus ELM driver should be moved to common drivers/mtd/nand/ folder so that all SoC having on-chip ELM hardware engine can re-use it. This patch has following changes: - mv arch/arm/include/asm/arch-am33xx/elm.h arch/arm/include/asm/omap_elm.h - mv arch/arm/cpu/armv7/am33xx/elm.c drivers/mtd/nand/omap_elm.c - update Makefiles - update #include <asm/elm.h> - add CONFIG_NAND_OMAP_ELM to compile driver/mtd/nand/omap_elm.c and include in all board configs using AM33xx SoC platform. Signed-off-by: Pekon Gupta <pekon@ti.com>
| * | mtd: atmel_nand: use dev_xxx instead of printkWu, Josh2013-11-21-11/+11
| | | | | | | | | | | | Signed-off-by: Josh Wu <josh.wu@atmel.com>
| * | mtd: atmel_nand: don't print bit correction message in driverWu, Josh2013-11-21-2/+2
| | | | | | | | | | | | | | | | | | | | | Since for some MLC nand, bit errors happened too often. Just disable it to avoid noise Signed-off-by: Josh Wu <josh.wu@atmel.com>
| * | sama5d3xek: support larger than 4G nand flashWu, Josh2013-11-21-2/+3
| | | | | | | | | | | | Signed-off-by: Josh Wu <josh.wu@atmel.com>
| * | mtd: atmel_nand: enable PMECC support for 8k bytes page NAND flashWu, Josh2013-11-21-1/+9
| | | | | | | | | | | | | | | | | | increase the delay to 75us to support the 8k bytes page nand flash Signed-off-by: Josh Wu <josh.wu@atmel.com>
| * | board/c29xpcie: Add support of 8K page size NAND flashPrabhakar Kushwaha2013-11-21-4/+6
| | | | | | | | | | | | | | | | | | Defines constants required to support 8K page size NAND flash. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
| * | mtd/ifc: Add support of 8K page size NAND flashPrabhakar Kushwaha2013-11-21-2/+109
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current IFC driver supports till 4K page size NAND flash. Add support of 8K NAND flash - Program Spare region size in csor_ext - Add nand_ecclayout for 4 bit & 8 bit ecc - Defines constants - Add support of 8K NAND boot. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> CC: Liu Po <po.liu@freescale.com>
| * | mtd: move & update nand_ecclayout structure (plus board changes)Prabhakar Kushwaha2013-11-21-17/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | nand_ecclayout is present in mtd.h at Linux. Move this structure to mtd.h to comply with Linux. Also, increase the ecc placement locations to 640 to suport device having writesize/oobsize of 8KB/640B. This means that the maximum oobsize has gone up to 640 bytes and consequently the maximum ecc placement locations have also gone up to 640. Changes from Prabhabkar's version (squashed into one patch to preserve bisectability): - Added _LARGE to MTD_MAX_*_ENTRIES This makes the names match current Linux source, and resolves a conflict between http://patchwork.ozlabs.org/patch/280488/ and http://patchwork.ozlabs.org/patch/284513/ The former was posted first and is closer to matching Linux, but unlike Linux it does not add _LARGE to the names. The second adds _LARGE to one of the names, and depends on it in a subsequent patch (http://patchwork.ozlabs.org/patch/284512/). - Made max oobfree/eccpos configurable, and used this on tricorder, alpr, ASH405, T4160QDS, and T4240QDS (these boards failed to build for me without doing so, due to a size increase). On tricorder SPL, this saves 2576 bytes (and makes the SPL build again) versus the new default of 640 eccpos and 32 oobfree, and saves 336 bytes versus the old default of 128 eccpos and 8 oobfree. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> CC: Vipin Kumar <vipin.kumar@st.com> [scottwood@freescale.com: changes as described above] Signed-off-by: Scott Wood <scottwood@freescale.com> Cc: Thomas Weber <weber@corscience.de> Cc: Matthias Fuchs <matthias.fuchs@esd-electronics.com> Cc: Stefan Roese <sr@denx.de> Cc: York Sun <yorksun@freescale.com> Cc: Tom Rini <trini@ti.com> Reviewed-by: Stefan Roese <sr@denx.de>
| * | driver/mtd/ifc: Read Status while programming NAND flashPrabhakar Kushwaha2013-11-13-5/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | as per controller description, "While programming a NAND flash, status read should never skipped. Because it may happen that a new command is issued to the NAND Flash, even when the device has not yet finished processing the previous request. This may result in unpredictable behaviour." IFC controller never polls for R/B signal after command send. It just return control to software. This behaviour may not occur with NAND flash access. because new commands are sent after polling R/B signal. But it may happen in scenario where GPCM-ASIC and NAND flash device are working simultaneously. Update the controller driver to take care of this requirement Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
| * | MTD: atmel_nand: support for software BCH ECCBo Shen2013-11-13-0/+4
| | | | | | | | | | | | | | | | | | Add possible to use software BCH ECC for atmel nand driver Signed-off-by: Bo Shen <voice.shen@gmail.com>
* | | Merge branch 'buildpatman' of http://git.denx.de/u-boot-x86Tom Rini2013-11-25-14/+69
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| * | | buildman: make board selector argument a regexStephen Warren2013-11-21-5/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A common use-case is to build all boards for a particular SoC. This can be achieved by: ./tools/buildman/buildman -b mainline_dev tegra20 However, when the SoC is a member of a family of SoCs, and each SoC has a different name, it would be even more useful to build all boards for every SoC in that family. This currently isn't possible since buildman's board selection command-line arguments are compared to board definitions using pure string equality. To enable this, compare using a regex match instead. This matches MAKEALL's handling of command-line arguments. This enables: (all Tegra) ./tools/buildman/buildman -b mainline_dev tegra (all Tegra) ./tools/buildman/buildman -b mainline_dev '^tegra.*$' (all Tegra20, Tegra30 boards, but not Tegra114) ./tools/buildman/buildman -b mainline_dev 'tegra[23]' Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | | buildman: fix READMEAndreas Bießmann2013-11-21-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a trivial fix for c'n'p error. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | | patman: add Commit-notes tag and sectionAlbert ARIBAUD2013-11-21-8/+47
| | |/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sometimes a commit should have notes enclosed with it rather than withing the cover letter -- possibly even because there is no cover letter. Add a 'Commit-notes' tag, similar to the 'Series-notes' one; lines between this tag and the next END line are inserted in the patch right after the '---' commit delimiter. Change-Id: I01e99ae125607dc6dec08f3be8a5a0b37f0a483d Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Simon Glass <sjg@chromium.org> (Updated README)
* | | sparc: Correct arch/sparc/cpu/leon3/start.S from SPDX conversionTom Rini2013-11-25-29/+37
| | | | | | | | | | | | | | | | | | | | | The SPDX tag conversion ate part of this file, put things back to the way they should be. Signed-off-by: Tom Rini <trini@ti.com>
* | | blackfin: don't use 'bool' when it causes problemsWolfgang Denk2013-11-25-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The use of 'bool' data types in globally used header files cases build errors like this: In file included from arch/blackfin/include/asm/blackfin.h:13:0, from include/common.h:92, from cmd_test.c:17: arch/blackfin/include/asm/blackfin_local.h:54:1: error: unknown type name 'bool' Use plain 'int' instead to avoid such kind of trouble. Signed-off-by: Wolfgang Denk <wd@denx.de>
* | | MAKEALL: add -b (--board) optionMasahiro Yamada2013-11-25-2/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some board have multiple configurations. For example, the board "m54455evb" has many configurations: M54455EVB, M54455EVB_a66, M54455EVB_i66, M54455EVB_intel, ... When we modify board-related files, we need to test all configurations based on such a board. In such a case, the new option -b is useful. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | bios_emulator: delete an unnecessary include pathMasahiro Yamada2013-11-25-1/+1
| | | | | | | | | | | | | | | | | | -I$(TOPDIR)/include is defined in the top config.mk. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | nand_spl: trivial refactoring of makefilesMasahiro Yamada2013-11-25-284/+242
| | | | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | Makefile: descend into subdirectories only when CONFIG_API is definedMasahiro Yamada2013-11-25-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All objects under api/ and examples/api/ directories are selected by CONFIG_API. So we can move CONFIG_API switch to the top Makefile. In order to use CONFIG_API, the definition of SUBDIR_EXAMPLES-y must be moved after "sinlude $(obj)include/autoconf.mk". Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | common: Delete unnecessary rules.Masahiro Yamada2013-11-25-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | The directory tools/ is always built before common/. So when envcrc tool is necessary in common/Makefile, it already exists. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | drivers: delete unnecessary HOSTCFLAGSMasahiro Yamada2013-11-25-2/+0
| | | | | | | | | | | | | | | | | | | | | HOSTCFLAGS is meaningless because no host programs are compiled there. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | Makefile: move some libraries to lib/MakefileMasahiro Yamada2013-11-25-5/+7
| | | | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
generated by cgit v1.1 at 2024-11-09 08:15:54 +0000