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* net: phy: micrel: add support for KSZ886x switches in MIIM modeAlexey Firago2016-06-21-0/+26
| | | | | | | | | | | | | | | | | | | | | | | This patch adds a phy driver for the Micrel KSZ886x switches. Similarly to the KSZ8895, SoC MAC is directly connected to the switch MAC on the switch CPU port, so the link to the switch is always up. KSZ886x switches can be used in the following configuration modes: - Unmanaged mode with config stored in external EEPROM - Managed mode over SPI - Managed mode over I2C - Managed mode over mdio/mdc (aka MIIM or SMI) This patch supports only unmanaged and MIIM modes. Based on Micrel KSZ886x driver from Linux kernel and Micrel KSZ8895 driver from U-Boot. Verified with the KSZ8863MLL. Signed-off-by: Alexey Firago <alexey_firago@mentor.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* net: rtl8169: fix switching between adaptersStephen Warren2016-06-21-4/+9
| | | | | | | | | | | | | | | | | | | | | | | | The rtl8169 driver uses a global variable to store the register address of the adapter being operated upon. This is updated to point at the correct adapter when sending or receiving a packet, or shutting down the adapter, but not when initializing the adapter. Consequently, switching between different adapters within the same U-Boot runtime does not work correctly since the driver programs the wrong registers during rtl8169_eth_start() -> rtl8169_common_start() -> rtl8169_hw_start(). Note that since rtl8169_eth_stop() does set the global variable, the second consecutive attempt to use the "new" adapter did work even before this patch, because each time network usage is shut down, the network core calls stop, which sets the variable so that the next start does actually initialize the hardware, and the adapter works. Equally, rtl8169_eth_probe() calls rtl_init() which sets the global, so if using only a single device, or if picking the "right" device (based on probe order) when multiple devices are present, ioaddr will already be set correctly from the get-go, so the issue does not occur. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* Kconfig: Add a new DISTRO_DEFAULTS Kconfig optionHans de Goede2016-06-20-9/+23
| | | | | | | | | | | | | | | | | | | | | | DISTRO_DEFAULTS is intended to mirror / replace include/config_distro_defaults.h. The intend is for boards which include this file to select this from their Kconfig files and when moving setting to Kconfig which are #define-ed in config_distro_defaults.h to select this from DISTRO_DEFAULTS so that boards which have selected DISTRO_DEFAULTS will keep the same configuration as before without needing any defconfig file changes. The initial list of selected things matches all settings recently removed from config_distro_defaults.h because they have been converted to Kconfig, with the exception of CMD_ELF and CMD_NET, which have a default of y, if the default of these ever changes they should be selected by DISTRO_DEFAULTS too. For testing and example purposes this commit also converts ARCH_SUNXI to use DISTRO_DEFAULT instead of selecting everything it needs itself. Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* sunxi: Add PSCI implementation in CChen-Yu Tsai2016-06-20-504/+341
| | | | | | | | | | | | | | To make the PSCI backend more maintainable and easier to port to newer SoCs, rewrite the current PSCI implementation in C. Some inline assembly bits are required to access coprocessor registers. PSCI stack setup is the only part left completely in assembly. In theory this part could be split out of psci_arch_init into a separate common function, and psci_arch_init could be completely in C. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* sunxi: Add base address for GICChen-Yu Tsai2016-06-20-4/+6
| | | | | | | | | Instead of hardcoding the GIC addresses in the PSCI implementation, provide a base address in the cpu header. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* sunxi: Add CPUCFG debug lock and sun7i cpu power controlsChen-Yu Tsai2016-06-20-1/+6
| | | | | | | | | | | | CPUCFG has an unlisted debug control register, which is used to disable external debug access. Also, sun7i secondary core power controls are in CPUCFG, as there's no separate PRCM block. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* sunxi: Group cpu core related controls togetherChen-Yu Tsai2016-06-20-24/+16
| | | | | | | | | | | | | Instead of listing individual registers for controls to each processor core, list them as an array of registers. This makes accessing controls by core index easier. Also rename "cpucfg_sun6i.h" (which was unused anyway) to the more generic "cpucfg.h", and add packed attribute to struct sunxi_cpucfg. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* sunxi: Add missing linux/types.h header for cpucfg_sun6i.hChen-Yu Tsai2016-06-20-0/+2
| | | | | | | | | cpucfg_sun6i.h includes a register definition for the CPUCFG register block. The types used are u32 and u8, which are defined in linux/types.h. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* sunxi: Add packed attribute to struct sunxi_prcm_regChen-Yu Tsai2016-06-20-1/+3
| | | | | | | | | struct sunxi_prcm_reg is a representation of the PRCM registers. Add the packed attribute to prevent the compiler from doing funny things. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* sunxi: Make CPUCFG_BASE macro names the same across familiesChen-Yu Tsai2016-06-20-14/+25
| | | | | | | | | Use SUNXI_CPUCFG_BASE across all families. This makes writing common PSCI code easier. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* ARM: allocate extra space for PSCI stack in secure section during link phaseChen-Yu Tsai2016-06-20-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | The PSCI implementation expects at most 2 pages worth of space reserved at the end of the secure section for its stacks. If PSCI is relocated to secure SRAM, then everything is fine. If no secure SRAM is available, and PSCI remains in main memory, the reserved memory space doesn't cover the space used by the stack. If one accesses PSCI after Linux has fully booted, the memory that should have been reserved for the PSCI stacks may have been used by the kernel or userspace, and would be corrupted. Observed after effects include the system hanging or telinit core dumping when trying to reboot. It seems the init process gets hit the most on my test bed. This fix allocates the space used by the PSCI stacks in the secure section by skipping pages in the linker script, but only when there is no secure SRAM, to avoid bloating the binary. This fix is only a stop gap. It would be better to rework the stack allocation mechanism, maybe with proper usage of CONFIG_ macros and an explicit symbol. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* ARM: PSCI: export common PSCI function declarations for C codeChen-Yu Tsai2016-06-20-0/+7
| | | | | | | | | | | Some common PSCI functions are written in assembly, but it should be possible to use them from C code. Add function declarations for C code to consume. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* ARM: PSCI: save and restore clobbered registers in v7_flush_dcache_allChen-Yu Tsai2016-06-20-0/+2
| | | | | | Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* ARM: PSCI: use only r0 and r3 in psci_get_cpu_stack_top()Chen-Yu Tsai2016-06-20-9/+9
| | | | | | | | | | | For psci_get_cpu_stack_top() to be usable in C code, it must adhere to the ARM calling conventions. Since it could be called when the stack is still unavailable, and the entry code to linux also expects r1 and r2 to remain unchanged, stick to r0 and r3. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* sunxi: Revert "sunxi: make SoC variant choice mandatory"Hans de Goede2016-06-20-0/+1
| | | | | | | | | | | | | | | | | This reverts commit 1a5f0de08e86("sunxi: make SoC variant choice mandatory"). With the optional marking in the Kconfig "make savedefconfig" will drop CONFIG_MACH_SUN4I=y from all the A10 boards, making it hard to see at a glance which family of sunxi chips the defconfig is for. This commit therefore restores the optional, and restores CONFIG_MACH_SUN4I=y to all defconfig's which had it dropped because of this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: Add defconfig and dts file for inet86dz boardHans de Goede2016-06-20-0/+319
| | | | | | | | | | | | | | | The inet86dz board is a board used in 7" tablets from various oems. These tablets are a23 based 7" tablets featuring a 1024x600 LCD, 512MB RAM, 4G NAND, rtl8188etv usb wifi, gsl1680 touchschreen, micro-sd slot, 3.5mm headphone jack and a micro-usb otg connector which doubles as charging port. The dts file this commit adds is identical to the one submitted to the upstream kernel. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: Add defconfig and dts file for Polaroid MID2407PXE03 tabletHans de Goede2016-06-20-0/+328
| | | | | | | | | | | | The Polaroid MID2407PXE03 is an a23 based 7" tablet based on a M86_MB V2.0 PCB, featuring a 800x480 LCD, 512MB RAM, 4G NAND, esp8089 wifi, gsl1680 touchschreen, micro-sd slot, 3.5mm headphone jack and a micro-usb otg connector which doubles as charging port. The dts file is identical to the one submitted to the upstream kernel. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* sunxi: Select USE_TINY_PRINTFHans de Goede2016-06-20-0/+1
| | | | | | | | This gives us a bit more breathing room wrt our SPL size. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> Reviewed-by: Simon Glass <sjg@chromium.org>
* tinyprintf: Add vprintf implementationHans de Goede2016-06-20-0/+5
| | | | | | | | | vprintf is used by panic() which is used in various SPL paths on some boards. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk> Reviewed-by: Simon Glass <sjg@chromium.org>
* Prepare v2016.07-rc2Tom Rini2016-06-20-1/+1
| | | | Signed-off-by: Tom Rini <trini@konsulko.com>
* autoboot: add CONFIG_AUTOBOOT to allow to not compile autoboot.cMasahiro Yamada2016-06-20-5/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | Since commit bb597c0eeb7e ("common: bootdelay: move CONFIG_BOOTDELAY into a Kconfig option"), CONFIG_BOOTDELAY is defined for all boards. Prior to that commit, it was allowed to unset CONFIG_BOOTDELAY to not compile common/autoboot.c, as described in common/Makefile: # This option is not just y/n - it can have a numeric value ifdef CONFIG_BOOTDELAY obj-y += autoboot.o endif It was a bit odd to enable/disable code with an integer type option, but it was how this option worked before that commit, and several boards actually unset it to opt out of the autoboot feature. This commit adds a new bool option, CONFIG_AUTOBOOT, and makes CONFIG_BOOTDELAY depend on it. I chose "default y" for this option because most boards use the autoboot. I added "# CONFIG_AUTOBOOT is not set" for the boards that had not set CONFIG_BOOTDELAY prior to the bad commit. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* Merge git://git.denx.de/u-boot-nand-flashTom Rini2016-06-20-190/+383
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| * mtd: nand: Patch remaining places where nand_to_mtd() should be usedBoris Brezillon2016-06-19-6/+6
| | | | | | | | | | | | | | Some drivers are still directly accessing the chip->mtd field. Patch them to use nand_to_mtd() instead. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| * nand: doc: fix example ecc scheme calculationFabian Mewes2016-06-19-1/+1
| | | | | | | | Signed-off-by: Fabian Mewes <architekt@coding4coffee.org>
| * nand: extend nand tortureMax Krummenacher2016-06-19-7/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | nand torture currently works on exactly one nand block which is specified by giving the byteoffset to the beginning of the block. Extend this by allowing for a second parameter specifying the byte size to be tested. e.g. ==> nand torture 1000000 NAND torture: device 0 offset 0x1000000 size 0x20000 (block size 0x20000) Passed: 1, failed: 0 ==> nand torture 1000000 40000 NAND torture: device 0 offset 0x1000000 size 0x40000 (block size 0x20000) Passed: 2, failed: 0 Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com> [scottwood: fix usage to show size as optional, and add misssing braces] Signed-off-by: Scott Wood <oss@buserror.net>
| * nand: nand torture: follow sync with linux v4.6Max Krummenacher2016-06-19-1/+1
| | | | | | | | | | | | follow parameter name change (nand to mtd) to fix compiler error. Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
| * common: fb_nand: won't compileSergey Kubushyn2016-06-19-1/+1
| | | | | | | | | | | | | | | | | | Somehow this got overlooked when getting rid of nand_info. Small patch, won't affect anything else, no reason to wait for the next cycle. Signed-off-by: Sergey Kubushyn <ksi@koi8.net>
| * spl: nand: sunxi: add support for NAND config auto-detectionBoris Brezillon2016-06-19-58/+204
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | NAND chips are supposed to expose their capabilities through advanced mechanisms like READID, ONFI or JEDEC parameter tables. While those methods are appropriate for the bootloader itself, it's way to complicated and takes too much space to fit in the SPL. Replace those mechanisms by a dumb 'trial and error' mechanism. With this new approach we can get rid of the fixed config list that was used in the sunxi NAND SPL driver. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com>
| * spl: nand: sunxi: split 'load page' and 'read page' logicBoris Brezillon2016-06-19-71/+114
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Split the 'load page' and 'read page' logic in 2 different functions so we can later load the page and test different ECC configs without the penalty of reloading the same page in the NAND cache. We also move common setup to a dedicated function (nand_apply_config()) to avoid rewriting the same values in NFC registers each time we read a page. These new functions are passed a pointer to an nfc_config struct to limit the number of parameters. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com>
| * spl: nand: sunxi: rework status polling loopBoris Brezillon2016-06-19-16/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | check_value_xxx() helpers are using a 1ms delay between each test, which can be quite long for some operations (like a page read on an SLC NAND). Since we don't have anything to do but to poll this register, reduce the delay between each test to 1us. While we're at it, rename the max_number_of_retries parameters and the MAX_RETRIES macro into timeout_us and DEFAULT_TIMEOUT_US to reflect that we're actually waiting a given amount of time and not only a number of retries. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com>
| * spl: nand: sunxi: stop guessing the redundant u-boot offsetBoris Brezillon2016-06-19-20/+0
| | | | | | | | | | | | | | | | | | | | | | | | Use CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND value instead of trying to guess where the redundant u-boot image is based on simple (and most of the time erroneous) heuristics. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com> # Conflicts: # drivers/mtd/nand/sunxi_nand_spl.c
| * spl: nand: support redundant u-boot imageBoris Brezillon2016-06-19-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On modern NAND it's more than recommended to have a backup copy of the u-boot binary to recover from corruption: bitflips are quite common on MLC NANDs, and the read-disturbance will corrupt your u-boot partitition more quickly than what you would see on an SLC NAND. Add an extra Kconfig option to specify the offset of the redundant u-boot image. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com> [scottwood: added ifdef to fix build break] Signed-off-by: Scott Wood <oss@buserror.net>
| * spl: nand: rework SYS_NAND_U_BOOT_OFFS Kconfig option dependencyBoris Brezillon2016-06-19-4/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | The SYS_NAND_U_BOOT_OFFS is quite generic, but the Kconfig entry is forced to explicitly depend on platforms that are not already defining it in their include/configs/<board>.h header. Add the SYS_NAND_U_BOOT_LOCATIONS option, make the SYS_NAND_U_BOOT_OFFS depends on it, remove the dependency on NAND_SUNXI and make it dependent on SPL selection. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com>
| * spl: nand: sunxi: remove support for so-called 'syndrome' modeBoris Brezillon2016-06-19-42/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The sunxi SPL NAND controller driver supports use 'BootROM'-like configs, that is, configs where the ECC bytes and real data are interleaved in the page instead of putting ECC bytes in the OOB area. Doing that has several drawbacks: - since you're interleaving data and ECC bytes you can't use the whole page otherwise you might override the bad block marker with non-FF bytes. - to solve the bad block marker problem, the ROM code supports partially using the page, but this introduces a huge penalty both in term of read speed and NAND memory usage. While this is fine for rather small binaries(like the SPL one which is at maximum 24KB large), it becomes non-negligible for the bootloader image (several hundred of KB). - auto-detection of the page size is not reliable (this is in my opinion the biggest problem). If you get the page size wrong, you'll end up reading data at a different offset than what was specified by the caller and the reading may succeed (if valid data were written at this address). For all those reasons I think it's wiser to completely remove support for 'syndrome' configs. If we ever need to support it again, then I'd recommend specifying all the config parameters through Kconfig options. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com>
* | mmc: add MMC_VERSION_5_1Stefan Wahren2016-06-20-0/+4
| | | | | | | | Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
* | dragonboard410c: Increase default environment size.Mateusz Kulikowski2016-06-20-1/+1
| | | | | | | | | | | | | | Due to changes in distro environment, ENV_SIZE limit was reached on Dragonboard. This patch increases environment size to 8KiB. Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
* | Merge git://git.denx.de/u-boot-dmTom Rini2016-06-20-687/+2028
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| * | clk: convert API to match reset/mailbox styleStephen Warren2016-06-19-570/+985
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following changes are made to the clock API: * The concept of "clocks" and "peripheral clocks" are unified; each clock provider now implements a single set of clocks. This provides a simpler conceptual interface to clients, and better aligns with device tree clock bindings. * Clocks are now identified with a single "struct clk", rather than requiring clients to store the clock provider device and clock identity values separately. For simple clock consumers, this isolates clients from internal details of the clock API. * clk.h is split so it only contains the client/consumer API, whereas clk-uclass.h contains the provider API. This aligns with the recently added reset and mailbox APIs. * clk_ops .of_xlate(), .request(), and .free() are added so providers can customize these operations if needed. This also aligns with the recently added reset and mailbox APIs. * clk_disable() is added. * All users of the current clock APIs are updated. * Sandbox clock tests are updated to exercise clock lookup via DT, and clock enable/disable. * rkclk_get_clk() is removed and replaced with standard APIs. Buildman shows no clock-related errors for any board for which buildman can download a toolchain. test/py passes for sandbox (which invokes the dm clk test amongst others). Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | reset: implement a reset testStephen Warren2016-06-19-4/+251
| | | | | | | | | | | | | | | | | | | | | | | | | | | This adds a sandbox reset implementation (provider), a test client device, instantiates them both from Sandbox's DT, and adds a DM test that excercises everything. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | Add a reset driver framework/uclassStephen Warren2016-06-19-0/+446
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A reset controller is a hardware module that controls reset signals that affect other hardware modules or chips. This patch defines a standard API that connects reset clients (i.e. the drivers for devices affected by reset signals) to drivers for reset controllers/providers. Initially, DT is the only supported method for connecting the two. The DT binding specification (reset.txt) was taken from Linux kernel v4.5's Documentation/devicetree/bindings/reset/reset.txt. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | mailbox: add Tegra186 HSP driverStephen Warren2016-06-19-0/+200
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tegra186's HSP module implements doorbells, mailboxes, semaphores, and shared interrupts. This patch provides a driver for HSP, and hooks it into the mailbox API. Currently, only doorbells are supported. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
| * | mailbox: rename headersStephen Warren2016-06-19-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | Rename mailbox*.h to match the naming convention requested during review of the new reset subsystem. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | sandbox: gpio: doc: Fix parameter documentationmario.six@gdsys.cc2016-06-19-6/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The documentation of parameters in arch/sandbox/include/asm/gpio.h is either missing or faulty. This patch corrects the documentation. Signed-off-by: Mario Six <mario.six@gdsys.cc> Acked-by: Simon Glass <sjg@chromium.org>
| * | lib/libfdt/: General aesthetic/style fixes.Robert P. J. Day2016-06-19-97/+109
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A number of style fixes across the files in this directory, including: * Correct invalid kernel-doc content. * Tidy up massive comment in fdt_region.c. * Use correct spelling of "U-Boot". * Replace tests of "! <var>" with "!<var>". * Replace "libfdt_env.h" with <libfdt_env.h>. Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca> Acked-by: Simon Glass <sjg@chromium.org>
| * | gpio: pca953x: Fix register reading past 8th GPIOmario.six@gdsys.cc2016-06-19-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A bug in the pca953x driver prevents correct reading of GPIO input values beyond the 8th GPIO; all values are reported as zero. Setting of GPIO output values is not affected. This patch fixes the reading behavior. Signed-off-by: Mario Six <mario.six@gdsys.cc> Reviewed-by: Peng Fan <van.freenix@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | dm: add manual relocation for devicesAngelo Dureghello2016-06-19-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | Some architectures as m68k still need to use CONFIG_NEEDS_MANUAL_RELOC, and are not still using the device tree. Signed-off-by: Angelo Dureghello <angelo@sysam.it> Acked-by: Simon Glass <sjg@chromium.org>
* | | ARM: uniphier: use the default CONFIG_BOOTDELAY=2Masahiro Yamada2016-06-20-6/+0
| | | | | | | | | | | | | | | | | | | | | I do not insist on CONFIG_BOOTDELAY=3. The default value in Kconfig, CONFIG_BOOTDELAY=2, is just fine for these boards. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | ARM: uniphier: reserve memory for DRAM PHY training on PH1-LD20Masahiro Yamada2016-06-20-0/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DRAM PHY layer on PH1-LD20 is able to calibrate PHY parameters periodically. This compensates for the voltage and temperature deviation and improves the PHY parameter adjustment. Instead, it requires 64 byte scratch memory in each DRAM channel for the dynamic training. The memory regions must be reserved in DT before jumping to the kernel. The scratch area can be anywhere in each DRAM channel, but the DRAM init code in SPL currently assigns it at the end of each channel. So, it makes sense to reserve the regions on run-time by U-Boot instead of statically embedding it in the DT in Linux. Anyway, a boot-loader should know much more about memory initialization than the kernel. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | ARM: uniphier: move CONFIG_ARMV8_MULTIENTRY to KconfigMasahiro Yamada2016-06-20-1/+1
| | | | | | | | | | | | | | | | | | I just did not notice this option had an entry in Kconfig. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | ARM: uniphier: introduce CONFIG_ARM_UNIPHIER_{32, 64}BITMasahiro Yamada2016-06-20-8/+15
| | | | | | | | | | | | | | | | | | | | | This will make it easier to select config options specific to particular ARM processor generation. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
generated by cgit v1.1 at 2024-11-09 22:23:19 +0000