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* ARM: uniphier: remove unused argument of ph1_ld4_ddrphy_init()Masahiro Yamada2016-02-29-16/+10
| | | | | | | The DDR PHY settings no longer depend on the DRAM size. Drop the argument from the init function. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: merge DDR PHY init code for 3 SoCsMasahiro Yamada2016-02-29-167/+14
| | | | | | | | Now these three are almost the same. The only difference is the DTPR1 register dependency on the DRAM size, but it can be ignored. (It has already been ignored in PH1-sLD8 and PH1-Pro4.) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: add a field to specify DDR3+Masahiro Yamada2016-02-29-35/+44
| | | | | | | | | | | | | Add a field to distinguish DDR3+ from (standard) DDR3. It also allows to delete CONFIG_DDR_STANDARD (this is not a software configuration, but a board attribute). Default DDR3 spec for each SoC: PH1-LD4, PH1-sLD8: DDR3+ Others: DDR3 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: disable debug circuit clocks for PH1-Pro4Masahiro Yamada2016-02-29-2/+2
| | | | | | | These settings control the clocks around the memory controller. The debug ability is unneeded once it works properly. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: remove UMC_INITCTL* and UMC_DRMR* settingsMasahiro Yamada2016-02-29-60/+0
| | | | | | | | These settings were used only for the PH1-sLD3 and older SoCs. The PH1-LD4 and newer one just ignore them because their DDR-PHY take care of such timing parameters instead. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: refactor UMC init code for ProXstream2Masahiro Yamada2016-02-29-45/+64
| | | | | | | | | | | | | | | | | Currently, a dummy value is defined for the UMC_SPCCTLA register when the DRAM size is zero. This seems weird because the controller does not need setting in the first place if the size is zero. Also, redefine enum dram_size to represent the DRAM size per 16-bit unit. This makes things simpler because the channel 0 and 1 are connected with 32-bit width DRAM, while the channel 2 is connected with 16-bit width one. I am renaming SIZE_* into DRAM_SZ_* (and also FREQ_* to DRAM_FREQ_* for consistency) while I am here because SIZE_* might be easily mixed-up with the macros in include/linux/sizes.h. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: use pr_err() where possibleMasahiro Yamada2016-02-29-5/+5
| | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: optimize ProXstream2 UMC init code with "for" loopMasahiro Yamada2016-02-29-22/+11
| | | | | | | Now this code can be re-written with a "for" statement instead of calling the same function multiple times. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: rework struct uniphier_board_dataMasahiro Yamada2016-02-29-114/+161
| | | | | | | | This commit reworks "struct uniphier_board_data" with an array of DRAM channel data in it. It will allow further cleanups by means of "for" statements that iterate over the DDR channels. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: remove unused umc_polling()Masahiro Yamada2016-02-29-9/+0
| | | | | | This function is unused. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: default to environment in eMMCMasahiro Yamada2016-02-29-6/+11
| | | | | | | Of the several boot devices supported, it looks like the eMMC is the most commonly used. Enable CONFIG_ENV_IS_IN_MMC by default. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: add emmcupdate commandMasahiro Yamada2016-02-29-0/+21
| | | | | | | | | | | | The Boot ROM expects the boot image (SPL) in the Boot Partition 1. So, updating images involves the hardware partition switch. It might be a bit advanced for some users. To be user-friendly, this commit adds a useful command to update the images; just put SPL and U-Boot proper into the public directory of the TFTP server and execute "run emmcupdate" from the command line. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: add a command to find the first MMC (non-SD) deviceMasahiro Yamada2016-02-29-0/+34
| | | | | | | | | | | UniPhier SoC family supports both (e)MMC boot and SD card boot; however, both of them are handled in the same uclass. When booting from the eMMC, we want to know the device number of the (e)MMC, not SD. This command is useful to find the first MMC (non-SD) device. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: add eMMC boot supportMasahiro Yamada2016-02-29-0/+64
| | | | | | | | Export device nodes needed for eMMC boot (eMMC node, pinctrl, and clock) to the SPL DTB. CONFIG_SUPPORT_EMMC_BOOT is also necessary to use "mmc partconf" command. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: add SD/MMC host controller nodesMasahiro Yamada2016-02-29-0/+217
| | | | | | This host controller is available for all UniPhier SoCs. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: enable UniPhier SD/MMC host driverMasahiro Yamada2016-02-29-0/+10
| | | | | | | Enable the driver in all UniPhier defconfig files and add some needed defines to the common files. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* mmc: uniphier: add driver for UniPhier SD/MMC host controllerMasahiro Yamada2016-02-29-0/+759
| | | | | | | Add a driver for the on-chip SD/eMMC host controller used by UniPhier SoC family. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: dts: uniphier: add GPIO controller nodesMasahiro Yamada2016-02-29-0/+938
| | | | | | Make the GPIO driver really active. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: enable GPIO command and driver for UniPhier SoCsMasahiro Yamada2016-02-29-0/+11
| | | | | | | This allows to use the "gpio" command. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
* gpio: do not include <asm/arch/gpio.h> for UniPhierMasahiro Yamada2016-02-29-0/+2
| | | | | | | | | I implemented a GPIO driver based on Driver Model for the UniPhier SoC family, but I could not find any good reason why such SoC specific GPIO headers are needed. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
* gpio: uniphier: add driver for UniPhier GPIO controllerMasahiro Yamada2016-02-29-0/+155
| | | | | | | This GPIO controller device is used on UniPhier SoCs. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
* ARM: dts: uniphier: rework System Bus nodesMasahiro Yamada2016-02-29-19/+20
| | | | | | Follow the changes of DTS in Linux. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* Merge git://git.denx.de/u-boot-usbTom Rini2016-02-26-1/+1
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| * usb: ehci: Fix warning on aarch64Marek Vasut2016-02-26-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the following warning on aarch64 introduced by using p2v/v2p functions in the code: In file included from ./arch/arm/include/asm/byteorder.h:29:0, from include/compiler.h:125, from include/image.h:19, from include/common.h:88, from drivers/usb/host/ehci-hcd.c:10: drivers/usb/host/ehci-hcd.c: In function ‘ehci_td_buffer’: drivers/usb/host/ehci-hcd.c:250:49: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] td->qt_buffer[idx] = cpu_to_hc32(virt_to_phys((void *)addr)); ^ include/linux/byteorder/little_endian.h:34:51: note: in definition of macro ‘__cpu_to_le32’ #define __cpu_to_le32(x) ((__force __le32)(__u32)(x)) ^ drivers/usb/host/ehci-hcd.c:250:24: note: in expansion of macro ‘cpu_to_hc32’ td->qt_buffer[idx] = cpu_to_hc32(virt_to_phys((void *)addr)); Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Tom Rini <trini@konsulko.com>
* | Merge git://git.denx.de/u-boot-dmTom Rini2016-02-26-43/+138
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| * | pci: Fix compiler warnings in dm_pciauto_setup_device()Bin Meng2016-02-26-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the following compiler warnings when DEBUG is on. warning: 'bar_res' may be used uninitialized in this function. drivers/pci/pci_auto.c:101:21: if (!enum_only && pciauto_region_allocate(bar_res, bar_size, ^ Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | spi: Re-enable the SPI flash testsSimon Glass2016-02-26-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | These are working correctly again, so re-enable them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jteki@openedev.com> Tested-by: Jagan Teki <jteki@openedev.com>
| * | spi: Correct two error return valuesSimon Glass2016-02-26-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When an error number is provided we should use it, not change it. This fixes the SPI and SPI flash tests. One of these is long-standing. The other seems to have been introduced by commit 1e90d9fd (sf: Move read_id code to sf_ops). Signed-off-by: Simon Glass <sjg@chromium.org> Fixes: 1e90d9fd (sf: Move read_id code to sf_ops) Reviewed-by: Jagan Teki <jteki@openedev.com> Tested-by: Jagan Teki <jteki@openedev.com>
| * | sandbox: spi: Remove an incorrect free()Simon Glass2016-02-26-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We must not free data that is managed by driver mode. Remove this line, which is a hangover from the pre-driver-model code. This fixes a problem where 'sf probe' crashes U-Boot if the backing file for the SPI flash cannot be found. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jteki@openedev.com> Tested-by: Jagan Teki <jteki@openedev.com> Reviewed-by: Tom Rini <trini@konsulko.com>
| * | sandbox: spi: Add more debugging to SPI emulationSimon Glass2016-02-26-3/+10
| | | | | | | | | | | | | | | | | | | | | | | | Add a little more debugging to help when things go wrong. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jteki@openedev.com> Tested-by: Jagan Teki <jteki@openedev.com>
| * | sandbox: Enable the early timerSimon Glass2016-02-26-0/+1
| | | | | | | | | | | | | | | | | | | | | Enable this so that tracing works with sandbox. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | sandbox: Correct ordering of defconfigSimon Glass2016-02-26-5/+5
| | | | | | | | | | | | | | | | | | This has got out of order: fix it. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | sandbox: timer: Support the early timerSimon Glass2016-02-26-3/+15
| | | | | | | | | | | | | | | | | | Add support for the early timer so we can use tracing with sandbox again. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | timer: Set up the real timer after driver model is availableSimon Glass2016-02-26-2/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | When using the early timer, we need to manually trigger setting up the real timer. This will not happen automatically. Do this immediately after starting driver model. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | timer: Provide an early timerSimon Glass2016-02-26-7/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In some cases the timer must be accessible before driver model is active. Examples include when using CONFIG_TRACE to trace U-Boot's execution before driver model is set up. Enable this option to use an early timer. These functions must be supported by your timer driver: timer_early_get_count() and timer_early_get_rate(). Signed-off-by: Simon Glass <sjg@chromium.org>
| * | timer: Support tracing fullySimon Glass2016-02-26-3/+3
| | | | | | | | | | | | | | | | | | | | | A few of the functions in the timer uclass are not marked with 'notrace'. Fix this so that tracing can be used with CONFIG_TRACE. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | trace: Improve the trace test number recognitionSimon Glass2016-02-26-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | The awk tool can be confused by return character (ASCII 13) in its input since it thinks there is a separate field. These can appear if the terminal is in raw mode, perhaps due to a previous U-Boot crash with sandbox. This is very confusing. Remove these so that the trace test passes. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | lib: Don't instrument the div64 functionSimon Glass2016-02-26-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | This function can be called from the timer code on instrumented functions. Mark it as 'notrace' so that it doesn't cause infinite recursion. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | trace: Fix compiler warnings in traceSimon Glass2016-02-26-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | With min() we must use the same type for each parameter. Fix two problems in trace.c which produce compiler warnings. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | image: Fix FIT and vboot tests to exit sandbox correctlySimon Glass2016-02-26-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | When used with a device tree, sandbox now requires a 'reset' controller. Add this to the device trees so that reset works and the tests can complete. Signed-off-by: Simon Glass <sjg@chromium.org> Fixes: 5010d98f (sandbox: Use the reset driver to handle reset)
| * | Revert "image-fit: Fix signature checking"Simon Glass2016-02-26-3/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit 84ca65aa4bd0d03867e9e49805201d0564d3ffb0. On signature verification failures fit_image_verify() should NOT exit with error. Only keys marked 'required' can cause image verification failure. This logic is already there and works correctly. Add a comment to make this clear. Fixes: 84ca65aa (image-fit: Fix signature checking) Signed-off-by: Simon Glass <sjg@chromium.org>
| * | image: Correct the OS location code to work on sandboxSimon Glass2016-02-26-5/+7
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | A recent change broke the 'bootm' command on sandbox. The root cause is using a pointer as an address. Conversion from pointer to address needs to use map_to_sysmem() so that sandbox can do the right thing. The problem was pre-existing but uncovered by a recent commit. Fix this. Also move fit_get_end() to the C file to avoid needing to include mapmem.h (and thus asm/io.h) everywhere. Fixes: 1fec3c5d (common/image.c: Make boot_get_ramdisk() perform a check for Android images) Signed-off-by: Simon Glass <sjg@chromium.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-netTom Rini2016-02-26-1/+19
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| * | net: bootp: Add environment variable for timeout periodAlexandre Messier2016-02-26-1/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is currently one config option (CONFIG_NET_RETRY_COUNT) that is available to tune the retries of the network stack. Unfortunately, it is global to all protocols, and the value is interpreted differently in all of them. Add a new environment variable that directly sets the retry period for BOOTP timeouts. If this new value is not set, the period is still derived from the default number of retries, or from CONFIG_NET_RETRY_COUNT if defined. When both the new variable is set and CONFIG_NET_RETRY_COUNT is defined, the variable has precedence. Signed-off-by: Alexandre Messier <amessier@tycoint.com>
| * | net: phy: atheros: Fix problem with phy_reset() clearing BMCRAlison Wang2016-02-26-0/+3
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | In commit <a058052c358c> [net: phy: do not read configuration register on reset], phy_reset() will clear the BMCR register. Bit 12(AUTO_NEGOTIATION) is cleared too. It causes auto-negotiation timeout error on Atheros's PHY AR8033. To fix this problem, genphy_config_aneg() and genphy_restart_aneg() needs to be called in ar8035_config() to enable and restart auto-negotiation. Signed-off-by: Alison Wang <alison.wang@nxp.com> Acked-by: Stefan Agner <stefan@agner.ch> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | powerpc/t208xqds: fix esdhc peripheral clock supportYangbo Lu2016-02-26-1/+1
|/ | | | | | | | | | | The patch that enabled eSDHC peripheral clock support had an obvious error as below. This patch is used to fix it. +#define define CONFIG_FSL_ESDHC_USE_PERIPHERAL_CLK Fixes: 3285e6cbcc1b ("powerpc/t2080qds: enable eSDHC peripheral clock support") Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* test/py: skip tests that require large CONFIG_SYS_MAXARGSStephen Warren2016-02-26-0/+8
| | | | | | | | | | | | | | | | | test_hush_if_test.py executes commands that require large values of CONFIG_SYS_MAXARGS. Detect cases where the configured value is too low and skip those tests. Ideally, this would be implemented inside console.run_command(). However, the command passed to that function is already a completely formed string, and determining its argument count usage would require splitting commands at ;, handling quoting to deal with arguments containing spaces, etc. Even passing the command as a list wouldn't solve all these issues, since we'd still need to split commands on ; and deal with cases like "if test ..." which consumes 0 of the argument count. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Simon Glass <sjg@chromium.org>
* test/py: use space to interrupt autobootStephen Warren2016-02-26-1/+1
| | | | | | | | | | | | | | | Sending CTRL-C to QEMU's stdin aborts the process, even if stdin is being used as a serial port (at least in the raspi2 machine with "qemu -serial stdin"). Avoid sending CTRL-C to U-Boot to prevent it exiting. I'd originally used CTRL-C to make sure that if the character used to abort autoboot ended up being treated as part of a command as well, it'd abort command entry and return the prompt to a known state. However, this is not needed, since aborting the autoboot eats the character used to do that. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Simon Glass <sjg@chromium.org>
* ARM: rpi: increase CONFIG_SYS_MAXARGSStephen Warren2016-02-26-1/+1
| | | | | | | | This allows all the hush tests implemented in test/py to pass, under qemu at least. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: zynq: zynqmp: Enable DCC serial driver by defaultMichal Simek2016-02-25-12/+5
| | | | | | Compile DCC serial driver by default. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
generated by cgit v1.1 at 2024-11-06 07:25:21 +0000