summaryrefslogtreecommitdiff
Commit message (Collapse)AuthorAgeLines
...
| * ARM64: zynqmp: Use C pre-processor for includes in dtsAlistair Francis2016-04-13-2/+2
| | | | | | | | | | | | | | | | | | | | Change the dtsi include code to use the C pre-processor #include instead of the device tree /include/. This brings all ZynqMP device trees inline with each other. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Sören Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Move kernel and fdt offsets and sizes to board config fileSiva Durga Prasad Paladugu2016-04-13-2/+8
| | | | | | | | | | | | | | | | Move kernel and fdt offsets and sizes to board config file as the flash size varies across boards Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq: Do not perform reset at the end of thorMichal Simek2016-04-13-0/+1
| | | | | | | | | | | | Setup reset off for lthor. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq: Support systems with more memory banksMichal Simek2016-04-13-13/+123
| | | | | | | | | | | | | | This is example how to change u-boot to support more memory banks read from DT. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq: Use memory initialization based on DTS fileMichal Simek2016-04-13-5/+5
| | | | | | | | | | | | Remove hardcoded memory sizes. Use information from DT memory node. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq: Fix usb phy node for ZyboMichal Simek2016-04-13-1/+1
| | | | | | | | | | | | Compatible property should be the first. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq: Extend microzed board supportMichal Simek2016-04-13-1/+43
| | | | | | | | | | | | | | Add missing DT nodes and enable USB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Nathan Rossi <nathan@nathanrossi.com>
| * ARM: zynq: Add missing qspi for xm013Michal Simek2016-04-13-1/+6
| | | | | | | | | | | | Add missing qspi node and make qspi as spi0. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq: Create empty line below headersMichal Simek2016-04-13-0/+1
| | | | | | | | | | | | Sync with others zynq DTS files. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq: Align spi and qspi node locationsMichal Simek2016-04-13-37/+37
| | | | | | | | | | | | | | Keep nodes alphabelitally sorted. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Nathan Rossi <nathan@nathanrossi.com>
| * ARM: zynq: zc706: Add adv7511 on i2c busChristian Kohn2016-04-13-0/+15
| | | | | | | | | | | | | | | | Add missing adv7511 and configure to match Base TRD. Signed-off-by: Christian Kohn <christian.kohn@xilinx.com> Reviewed-by: Nathan Rossi <nathan@nathanrossi.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq: zc702: Add adv7511 on i2c busChristian Kohn2016-04-13-0/+15
| | | | | | | | | | | | | | Add bindings for adv7511. Signed-off-by: Christian Kohn <christian.kohn@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq: DT: Add ethernet phy reset informationPunnaiah Choudary Kalluri2016-04-13-0/+2
| | | | | | | | | | | | | | Added phy reset gpio information for gem0. Signed-off-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq: Fix bootargs in board dtsiMichal Simek2016-04-13-8/+8
| | | | | | | | | | | | | | | | - Sync with Linux kernel - Remove rootfs - Remove earlyprintk Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq: Align devcfg nodeMichal Simek2016-04-13-0/+4
| | | | | | | | | | | | | | | | - Have compatible string as the first property - Sync with Linux kernel dtsi - Add missing interrupt properties Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: dts: Updated devicetree bindings for Zynq 7000 platformMoritz Fischer2016-04-13-0/+1
| | | | | | | | | | | | | | | | Added addtional bindings required for FPGA Manager operation of the Xilinx Zynq Devc configuration interface. Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: dts: zynq: Add devicetree entry for Xilinx Zynq reset controller.Moritz Fischer2016-04-13-0/+7
| | | | | | | | | | | | Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com> Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq: Add interrupt-controller property to gpio nodesMichal Simek2016-04-13-0/+2
| | | | | | | | | | | | | | | | GPIO driver supports an input interrupt that's why gpio node itself can be labeled as interrupt controller. Reported-by: John Linn <linnj@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | Merge git://www.denx.de/git/u-boot-cfi-flashTom Rini2016-04-13-1/+1
|\ \
| * | mtd: cfi: Unlock current sector instead of sector 0 before buffered writeRouven Behr2016-04-13-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Unlock current sector instead of sector 0 before buffered write. [Patch subject and commit text slightly reworded, Stefan] Signed-off-by: Rouven Behr <u-boot@behr-iss.de> Signed-off-by: Stefan Roese <sr@denx.de>
* | | Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2016-04-13-92/+2442
|\ \ \ | |/ / |/| |
| * | mx6slevk: imximage.cfg: update to fix tINIT3 and tIH-CA violationsTom Rini2016-04-03-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Having had a similar board and memory part under logic analyzer, a tINIT3 violation was measured. The fix was involved keeping tXPR and SDE_to_RST at the power-on defaults and setting RST_to_CKE the JEDEC value for LPDDR2. There was also a tIH-CA violation and this was resolved by writing the default value in rather than what the script here uses. Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
| * | mx6qarm2: imximage_mx6dl.cfg update to fix tINIT3 violationTom Rini2016-04-03-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Having had a similar board and memory part under logic analyzer, a tINIT3 violation was measured. The fix was involved keeping tXPR and SDE_to_RST at the power-on defaults and setting RST_to_CKE the JEDEC value for LPDDR2. Cc: Jason Liu <jason.hui.liu@nxp.com> Cc: Ye Li <ye.li@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com>
| * | mx7_common: Define CONFIG_SYS_MALLOC_LEN in the board fileFabio Estevam2016-04-03-3/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Having CONFIG_SYS_MALLOC_LEN in mx7_common.h is not a good idea, because the malloc() pool size is board dependent. For example: if a certain board has support for splashscreen or DFU, it may be necessary to adjust CONFIG_SYS_MALLOC_LEN to a larger value. So define CONFIG_SYS_MALLOC_LEN in each board config file. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
| * | warp7: Pass the UART base definitionFabio Estevam2016-04-03-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | Since commit 5d69269deed0 ("mx7dsabresd: Define serial port locally") we need to specify the UART base address in each board config file, so do this to avoid a build error. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
| * | mx6sabresd: Remove unneeded enable_lvds() functionFabio Estevam2016-04-03-11/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | enable_lvds() function only set bits IOMUXC_GPR2_DATA_WIDTH_CH0_18BIT and IOMUXC_GPR2_DATA_WIDTH_CH1_18BIT, but these bits were already set previously inside setup_display(). We can safely remove enable_lvds() then. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
| * | arm: mxs: Update MX28EVK configMarek Vasut2016-04-03-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | Enable FIT image support, EXT4 support and generic FS support. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
| * | imx: mx7d: move MX7D to Kconfig entryPeng Fan2016-03-26-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If including MX7D in CONFIG_SYS_EXTRA_OPTIONS, CONFIG_ROM_UNIFIED_SECTIONS will not effect.So move MX7D to Kconfig entry from CONFIG_SYS_EXTRA_OPTIONS to "select MX7D" to boards using i.MX7 Dual. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
| * | imx: mx6sx: move MX6SX to Kconfig entryPeng Fan2016-03-26-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If including MX6SX in CONFIG_SYS_EXTRA_OPTIONS, CONFIG_ROM_UNIFIED_SECTIONS will not effect.So move MX6SX to Kconfig entry from CONFIG_SYS_EXTRA_OPTIONS to "select MX6SX" to boards using i.MX6 SoloX. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
| * | arm: mx6: Add CCV xPress board supportStefan Roese2016-03-26-0/+837
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch add support for the CCV xPress board which is equipped with the i.MX6UL. And provides the following interfaces: - 128MiB DDR - UART - I2C - eMMC (with booting) - Ethernet - USB This patch adds two build targets. One with and one without SPL. The non-SPL version is used for loading U-Boot via USB (imx_usb_loader). Signed-off-by: Stefan Roese <sr@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
| * | arm: mx6: Add UART8 base address for i.MX6ULStefan Roese2016-03-26-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add the base address for the i.MX6UL so that this UART can be used. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Ye Li <ye.li@nxp.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
| * | warp7: Add initial supportFabio Estevam2016-03-26-0/+386
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the basic support for Warp7 board. For more information about this reference design, please visit: https://www.element14.com/community/docs/DOC-79058/l/warp-7-the-next-generation-wearable-reference-platform Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
| * | mx7_common: Put early/late init configs into board fileFabio Estevam2016-03-26-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_BOARD_EARLY_INIT_F and CONFIG_BOARD_LATE_INIT should not be placed into mx7_common because not all boards need these options. Move them to the board file instead. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
| * | mx6sabresd: Use VESA 1024x768 timingsFabio Estevam2016-03-25-14/+14
| | | | | | | | | | | | | | | | | | | | | | | | VESA 1024x768 results in much more accurate timings. Based on the patch from Soeren Moch for the tbs2910 board. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
| * | mx27: 16-bit wide watchdog registersLeonid Iziumtsev2016-03-25-7/+7
| | | | | | | | | | | | | | | | | | | | | Make the watchdog registers 16-bit wide, as they are according to TRM. Signed-off-by: Leonid Iziumtsev <leonid.iziumtsev@se.atlascopco.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
| * | mx6sabre_common: Fix U-Boot corruption after 'saveenv'Fabio Estevam2016-03-25-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Booting mx6qp sabreauto board and then doing: => saveenv => reset , causes a system hang. This happens because the size of the U-Boot binary is larger than CONFIG_ENV_OFFSET. Fix this problem by increasing CONFIG_ENV_OFFSET, so that the U-boot binary and the environment variables region do not overlap. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
| * | arm: imx6: Switch DDR3 calibration to wait_for_bit()Marek Vasut2016-03-25-32/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | Switch the DDR3 calibration from ad-hoc implementation of wait_for_bit() to generic implementation of wait_for_bit(). Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de>
| * | arm: mx5: Enable NAND TrimFFS on M53EVKMarek Vasut2016-03-25-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Enable NAND TrimFFS support in M53EVK, since it is convenient when installing UBI images to NAND. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| * | imx: print ARM clock for clocks commandPeng Fan2016-03-25-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Default print ARM clock for clocks command. Test on i.MX6UL 14x14 evk board: " => clocks PLL_SYS 792 MHz PLL_BUS 528 MHz PLL_OTG 480 MHz PLL_NET 50 MHz ARM 396000 kHz " Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Stefano Babic <sbabic@denx.de>
| * | imx: mx6ul configure the PMIC_STBY_REQ pin as open drainPeng Fan2016-03-25-1/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | Configure the PMIC_STBY_REQ pin as open drain 100K according to the design team's requirement for the PMIC_STBY_REQ pin for i.MX 6UltraLite TO1.0. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Stefano Babic <sbabic@denx.de>
| * | imx: mx6ul: skip setting ahb ratePeng Fan2016-03-25-7/+12
| | | | | | | | | | | | | | | | | | | | | | | | To i.MX6UL, default ARM rate and AHB rate is 396M and 198M, no need to set them. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Stefano Babic <sbabic@denx.de>
| * | imx: mx6: Fix incorrect clear mmdc_ch0 handshake maskYe Li2016-03-25-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since the MX6UL/SL/SX only has one DDR channel, in CCM_CCDR register the bit[17] for mmdc_ch0 is reserved and its proper state should be 1. When clear this bit, the periph_clk_sel cannot be set and that CDHIPR[periph_clk_sel_busy] handshake never clears. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <van.freenix@gmail.com> Acked-by: Stefano Babic <sbabic@denx.de>
| * | Merge branch 'next'Stefano Babic2016-03-20-4/+1127
| |\ \
| | * | mx7: Distinguish between dual and solo versionsFabio Estevam2016-03-09-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Read the number of cores in the fuses to distinguish between the dual and solo versions. Tested on a mx7d sabresd and on a mx7solo warp7. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
| | * | mx7dsabresd: Define serial port locallyFabio Estevam2016-03-09-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_MXC_UART_BASE should not be defined in mx7_common.h as the console port can vary from board to board. Define CONFIG_MXC_UART_BASE locally instead. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
| | * | mx7_common: Remove unexisting optionsFabio Estevam2016-03-09-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_IMX_FIXED_IVT_OFFSET and CONFIG_FSL_CLK are not used anywhere, so just remove them. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
| | * | arm: imx: Add support for GE Bx50v3 boardsAkshay Bhat2016-03-09-0/+1104
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for GE B450v3, B650v3 and B850v3 boards. The boards are based on Advantech BA16 module which has a i.MX6D processor. The boards support: - FEC Ethernet - USB Ports - SDHC and MMC boot - SPI NOR - LVDS and HDMI display Basic information about the module: - Module manufacturer: Advantech - CPU: Freescale ARM Cortex-A9 i.MX6D - SPECS: Up to 2GB Onboard DDR3 Memory; Up to 16GB Onboard eMMC NAND Flash Supports OpenGL ES 2.0 and OpenVG 1.1 HDMI, 24-bit LVDS 1x UART, 2x I2C, 8x GPIO, 4x Host USB 2.0 port, 1x USB OTG port, 1x micro SD (SDHC),1x SDIO, 1x SATA II, 1x 10/100/1000 Mbps Ethernet, 1x PCIe X1 Gen2 Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
* | | | Merge git://www.denx.de/git/u-boot-marvellTom Rini2016-04-12-2/+116
|\ \ \ \
| * | | | arm: mvebu: theadorable: Remove Board name output in checkboardStefan Roese2016-04-12-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This line is not needed, as the board supports DT based probing. And here the "Model:" is already printed: Model: Marvell Armada XP theadorable Board: theadorable One line for the board name is enough. Signed-off-by: Stefan Roese <sr@denx.de>
| * | | | arm: mvebu: theadorable: Add PEX-switch detection and reset codeStefan Roese2016-04-12-0/+70
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sometimes the PCIe link for the PEX-switch will not come-up. In this case, the board is not in a usable state. This patch makes sure that in this case a soft-reset is issued. If this soft-reset does not result in the PEX-switch being detected after some soft-reset cycles, an I2C message is sent to the uC to issue a complete power-cycle of the board. Signed-off-by: Stefan Roese <sr@denx.de>
generated by cgit v1.1 at 2024-11-10 09:19:52 +0000