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* eth: asix88179: Add support for the driver modelAlban Bedel2016-08-09-0/+184
| | | | | | Adjust this driver to support driver model for Ethernet. Signed-off-by: Alban Bedel <alban.bedel@avionic-design.de>
* eth: asix88179: Prepare supporting the driver modelAlban Bedel2016-08-09-28/+47
| | | | | | | Change the prototype of a few functions to allow resuing the code for the driver model. Signed-off-by: Alban Bedel <alban.bedel@avionic-design.de>
* eth: asix88179: Fix receiving on big endian systemAlban Bedel2016-08-07-1/+1
| | | | | | | | | In asix_recv() the call to convert the endianess of the receive header was applied on the wrong variable. Instead of converting rx_hdr it converted pkt_hdr which is a pointer, and not yet initialiazed at this point. Signed-off-by: Alban Bedel <alban.bedel@avionic-design.de>
* eth: asix88179: Add VID:DID for Cypress GX3 USB Ethernet AdapterAlban Bedel2016-08-07-0/+2
| | | | | | | Added support for the Cypress GX3 SuperSpeed to Gigabit Ethernet Bridge Controller (VID_04b4/PID_3610). Signed-off-by: Alban Bedel <alban.bedel@avionic-design.de>
* arm: ls1021a: Enable CONFIG_DM_USB in defconfigsRajesh Bhagat2016-08-07-0/+4
| | | | | | | Enables driver model flag CONFIG_DM_USB for LS1021A platform defconfigs. Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
* dm: ls1021a: dts: Update USB 3.0 node to support DM USBRajesh Bhagat2016-08-07-1/+1
| | | | | | Update USB 3.0 controller dts node in ls1021a.dtsi. Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
* usb: xhci: fsl: Add code to use CONFIG_DM_USBRajesh Bhagat2016-08-07-1/+82
| | | | | | Adds code to use driver model for USB XHCI FSL driver Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
* usb: ehci: fsl: Add code to use CONFIG_DM_USBRajesh Bhagat2016-08-07-4/+127
| | | | | | Adds code to use driver model for USB EHCI FSL driver Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
* drivers: usb: fsl: Make function for initialization to use in CONFIG_DM_USBRajesh Bhagat2016-08-07-27/+36
| | | | | | | Moves code from ehci_hcd_init to new function ehci_fsl_init which can be re-used in CONFIG_DM_USB. Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
* usb: add (move) CONFIG_USB_HOST to KconfigMasahiro Yamada2016-08-07-8/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | The meaning of CONFIG_USB in U-Boot is different from that in Linux. As you see in drivers/usb/Kconfig of Linux, CONFIG_USB enables the USB host controller support, while CONFIG_USB_SUPPORT is used to enable the whole of the USB sub-system. When I added CONFIG_USB into Kconfig by commit 6e7e9294d321 ("usb: add basic USB configs in Kconfig"), I planned to follow the Linux's convention, i.e. CONFIG_USB to enable/disable the USB host support. Then, commit 68f7c5db2d1e ("usb: Generic USB Kconfig option, that fits both host and gadget and comments") changed the logic of the CONFIG_USB to point to the whole of the USB sub-system. As a result, currently we do not have an option for USB host. This commit adds CONFIG_USB_HOST, which will be useful to compile in the USB host support code. CONFIG_USB_HOST is not referenced at all, but strangely some boards define it in board headers. I removed them because USB_HOST will be selected in Kconfig going forward. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* usb: add CONFIG_USB_UHCI_HCD in KconfigMasahiro Yamada2016-08-07-0/+17
| | | | | | | | | | There is no UHCI driver entry in Kconfig for now, but we have some UHCI drivers, for example, LEON. This is a placeholder in case we want to move them to Kconfig in the future. The help message was copied from Linux. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* usb: add CONFIG_USB_OHCI_HCD in KconfigMasahiro Yamada2016-08-07-10/+26
| | | | | | | | | | | Add this option as a common config for all OHCI controllers. Its help message was copied from Linux. Also, I moved it below EHCI to respect the order in Linux's Kconfig. Add CONFIG_USB_OHCI_HCD=y to axs103_defconfig, which is the only user of OHCI_GENERIC. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* net: usb: r8152: Add DM supportStefan Roese2016-08-07-22/+221
| | | | | | | | | | | | | | Add support for driver model, so that CONFIG_DM_ETH can be defined and used with this driver. This patch also adds the read_rom_hwaddr() callback so that the ROM MAC address will be used to the DM part of this driver. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Stephen Warren <swarren@nvidia.com> Cc: Ted Chen <tedchen@realtek.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Joe Hershberger <joe.hershberger@ni.com>
* dm: ehci-mx6: support driver modelPeng Fan2016-08-07-14/+130
| | | | | | | | | | | | | | | | Support driver model for ehci mx6 driver. Consolidate code to be shared between DM and non-DM, such as introducing ehci_mx6_common_init. For simplicity, some old fasion code are keeped for DM usage, such as board_ehci_power and board_usb_phy_mode. And 'dr-mode', usbphy and vbus handling code for DM is not added now. These will be added in future patches. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Marek Vasut <marex@denx.de> Cc: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Cc: Stefan Agner <stefan@agner.ch> Cc: Simon Glass <sjg@chromium.org>
* Merge git://git.denx.de/u-boot-rockchipTom Rini2016-08-06-29/+1901
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| * rockchip: remove log2 reimplementation from clock driversHeiko Stübner2016-08-05-14/+6
| | | | | | | | | | | | | | | | | | The already available ilog2 function does exactly the same in the common case than the log2 function the current clock-driver reimplement. So, simply move to that one. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Simon Glass <sjg@chromium.org>
| * config: rk3399: enable dwmmc controllerKever Yang2016-08-05-0/+2
| | | | | | | | | | | | | | Enable the rockchip dwmmc driver for rk3399 and its evb. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
| * dts: rk3399: enable dwmmc for sdcardKever Yang2016-08-05-2/+6
| | | | | | | | | | | | | | | | | | rk3399 sdcard is using dwmmc controller, enable it for sdcard. SCLK_SDMMC is the clock for controller operation clock, move it to the first place. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
| * clock: rk3399: add support for dwmmc 400KKever Yang2016-08-05-8/+21
| | | | | | | | | | | | | | | | | | MMC core will use 400KHz for card initialize first and then switch to higher frequency like 50MHz, we need to support both 400KHz and about 50MHz for dwmmc controller. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
| * configs: rk3399: add gpt and fs supportKever Yang2016-08-05-0/+14
| | | | | | | | | | | | | | | | | | To compatible with distro boot, we need to add gpt and fs support, including gpt table and vfat, ext2, ext4 support. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
| * rockchip: add usb mass storage feature support for rk3288Xu Ziyuan2016-08-05-0/+4
| | | | | | | | | | | | | | | | Enable ums feature for rk3288 boards, so that we can mount the mmc device to PC. Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
| * rockchip: add basic partitions support for rk3288Xu Ziyuan2016-08-05-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For compatibility with distro boot, fastboot, and mount the mmc deivce to PC via usb mass storage feature, GPT partitions are essential. You should write the partitions to mmc device prior to use above feature. => gpt write mmc 1 $partitions GPT successfully written to block device! success! Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
| * rockchip: add support for rk3288 miniarm boardXu Ziyuan2016-08-05-6/+746
| | | | | | | | | | | | | | | | Miniarm is a rockchip rk3288 based development board, which has lots of interface such as HDMI, USB, micro-SD card, Audio etc. Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
| * move: rockchip: move clock drivers into a subdirectoryHeiko Stübner2016-08-05-3/+10
| | | | | | | | | | | | | | | | | | | | | | | | With the number of Rockchip clock drivers increasing, don't clutter up the core drivers/clk directory with them and instead move them out of the way into a separate subdirectory. Suggested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Simon Glass <sjg@chromium.org> Updated for rk3399: Signed-off-by: Simon Glass <sjg@chromium.org>
| * rk3399: add basic soc driverKever Yang2016-08-05-0/+980
| | | | | | | | | | | | | | | | | | | | This patch add driver for: - clock driver including set_rate for cpu, mmc, vop, I2C. - sysreset driver - grf syscon driver Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
| * rockchip: rockchip, sdram-channel 0xff fix remaining dtsSandy Patterson2016-08-05-2/+2
| | | | | | | | | | | | | | Add an extra byte so that this data is not byteswapped. Signed-off-by: Sandy Patterson <apatterson@sightlogix.com> Acked-by: Simon Glass <sjg@chromium.org>
| * rockchip: add fastboot support for rk3036 boardXu Ziyuan2016-08-05-3/+112
| | | | | | | | | | | | | | | | Enable fastboot feature on rk3036, please refer to doc/README.rockchip for more detailed usage. Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | zynq_sdhci.c: Fix warning in arasan_sdhci_probeTom Rini2016-08-05-2/+0
| | | | | | | | | | | | | | | | | | We no longer need to set 'caps' as it's not passed to sdhci_setup_cfg anymore. Fixes: 14bed52d276a ("mmc: sdhci: remove the unnecessary arguments for sdhci_setup_cfg") Signed-off-by: Tom Rini <trini@konsulko.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-tegraTom Rini2016-08-05-32/+1698
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| * | ARM: tegra: call tegra_board_init on Tegra186Stephen Warren2016-08-04-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce tegra_board_init() and call it from board_init(). Tegra wil use tegra_board_init() for board-specific initialization, and board_init() for SoC-specific initialization. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | ARM: tegra: add I2C controllers to Tegra186 DTBryan Wu2016-08-04-0/+104
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tegra186 has 8 I2C controllers including BPMP I2C. This patch adds the other 7 generic controllers to Tegra186's DT. Signed-off-by: Bryan Wu <pengw@nvidia.com> (swarren, fixed DT node sort order, tweak patch description) Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | ARM: tegra: add PCIe controller to Tegra186 SoC DTStephen Warren2016-08-04-0/+92
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Tegra186 PCIe DT content is almost identical to previous chips, except that the: - There are 3 ports instead of 2. - Some physical addresses have moved. - PHY programming is handled by firmware, so CCPLEX DTs don't need to reference any PHY. - The power domain is explicitly represented in DT. This change is mandatory for Tegra186 since standard power domain APIs are used, and should be made to the DT for older SoCs, although we get away without doing so since U-Boot currently uses custom APIs that hard-code power domain IDs. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | ARM: tegra: add BPMP I2C to Tegra186 device treeStephen Warren2016-08-04-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | This allows the BPMP I2C device to be instantiated, which makes it available to other drivers and the user. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | ARM: tegra: add BPMP and dependencies to Tegra186 DTStephen Warren2016-08-04-2/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | This adds the DT content that's needed to allow board DTs to enable use of BPMP, clocks, resets, GPIOs, eMMC, and SD cards. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | dt-bindings: add Tegra186 BPMP I2C bindingStephen Warren2016-08-04-0/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In Tegra186, the BPMP (Boot and Power Management Processor) owns certain HW devices, such as the I2C controller for the power management I2C bus. Software running on other CPUs must perform IPC to the BPMP in order to execute transactions on that I2C bus. This binding describes an I2C bus that is accessed in such a fashion. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | dt-bindings: allow child nodes inside the Tegra BPMPStephen Warren2016-08-04-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The BPMP implements some services which must be represented by separate nodes. For example, it can provide access to certain I2C controllers, and the I2C bindings represent each I2C controller as a device tree node. Update the binding to describe how the BPMP supports this. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | ARM: tegra: add BPMP DT bindingsStephen Warren2016-08-04-0/+1256
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Tegra BPMP (Boot and Power Management Processor) is a separate auxiliary CPU embedded into Tegra to perform power management work, and controls related features such as clocks, resets, power domains, PMIC I2C bus, etc. These bindings dictate how to represent the BPMP in device tree. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | ARM: tegra: adapt to latest HSP DT bindingStephen Warren2016-08-04-29/+113
| |/ | | | | | | | | | | | | | | | | | | The DT binding for the Tegra186 HSP module apparently wasn't quite final when I posted initial U-Boot support for it. Add the final DT binding doc and adapt all code and DT files to match it. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-mmcTom Rini2016-08-05-150/+135
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| * | mmc: sdhci: fix the compiler warning when disable CONFIG_MMC_SDMAJaehoon Chung2016-08-05-1/+1
| | | | | | | | | | | | | | | | | | | | | When disabled CONFIG_MMC_SDMA, variable caps didn't use. This patch fixes the compiler error for -Wunused-but-set-variable Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
| * | mmc: dw_mmc: fix the wrong Mask bit boundary for fifo_count bitJaehoon Chung2016-08-05-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | According to DesignWare TRM, FIFO_COUNT is bit[29:17]. If get the correct fifo_count value, it has to use the FIFO_MASK as 0x1FFF, not 0x1FF. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Ziyuan Xu <xzy.xu@rock-chips.com>
| * | mmc: dw_mmc: fix data starvation by host timeout under FIFO modeXu Ziyuan2016-08-05-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes data starvation by host timeout(HTO) error interrupt which occurred under FIFO mode transfer on rk3036 board. The former implement, the actual bytes were transmitted may be less than should be. The size will still subtract value of len in case of there is no receive/transmit FIFO data request interrupt. Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
| * | mmc: dw_mmc: transfer proper bytes to FIFOXu Ziyuan2016-08-05-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The former implement, dw_mmc will push and pop the redundant data to FIFO, we should transfer it according to the real size. Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
| * | mmc: sdhci: remove the unnecessary arguments for sdhci_setup_cfgJaehoon Chung2016-08-05-34/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some arguments don't need to pass to sdhci_setup_cfg. Generic variable can be used in sdhci_setup_cfg, and some arguments are already included in sdhci_host struct. It's enough that just pass the board specific things to sdhci_setup_cfg(). After removing the unnecessary arguments, it's more simpler than before. It doesn't consider "Version" and "Capabilities" anymore in each SoC driver. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | mmc: sdhci: remove the unused argument for sdhci_setup_cfgJaehoon Chung2016-08-05-7/+6
| | | | | | | | | | | | | | | | | | | | | | | | buswidth isn't used anywhere in sdhci_setup_cfg. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Minkyu Kang <mk7.kang@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | mmc: sdhci: revert "mmc: sdhci: Claer high speed if not supported"Jaehoon Chung2016-08-05-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This "commit 429790026021d522d51617217d4b86218cca5750" is wrong. SDHCI_QUIRK_NO_HISPD_BIT is for skipping to set CTRL_HISPD bit. For example, Exynos didn't have CTRL_HISPD. But Highspeed mode is supported. (This quirks doesn't mean that driver didn't support the Highseepd mode.) Note: If driver didn't support the Highspeed Mode, use or add the other quirks. After applied this patch, all Exynos SoCs are just running with 25MHz. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
| * | mmc: display mmc list information like mmc_legacy typeXu Ziyuan2016-08-05-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It's nicer to see this: => mmc list dwmmc@ff0c0000: 0 dwmmc@ff0f0000: 1 (eMMC) than this: => mmc list dwmmc@ff0c0000: 0dwmmc@ff0f0000: 1 (eMMC) With the former, it's much clearer which mmc devices are on. Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
| * | mmc: use the generic error numberJaehoon Chung2016-08-05-96/+95
| | | | | | | | | | | | | | | | | | | | | | | | | | | Use the generic error number instead of specific error number. If use the generic error number, it can debug more easier. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
| * | mmc: fsl_esdhc: remove the duplicated header fileJaehoon Chung2016-08-05-1/+0
| | | | | | | | | | | | | | | | | | | | | "mmc.h" is already included. It's duplicated. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | mmc: dw_mmc: remove the duplicated header fileJaehoon Chung2016-08-05-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | <asm-generic/errno.h> is already included in <errno.h>. It can use <errno.h> instead of <asm-generic/errno.h> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org>
generated by cgit v1.1 at 2024-11-07 11:57:26 +0000