summaryrefslogtreecommitdiff
Commit message (Collapse)AuthorAgeLines
* exynos: kconfig: move board select menu and common settingsMasahiro Yamada2014-08-30-117/+69
| | | | | | | | | | | Becuase the board select menu in arch/arm/Kconfig is too big, move the Exynos board select menu to exynos/Kconfig. Consolidate also common settings (CONFIG_SYS_CPU="armv7" and CONFIG_SYS_SOC="exynos"). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Minkyu Kang <mk7.kang@samsung.com>
* kirkwood: kconfig: refactor Kconfig and defconfigMasahiro Yamada2014-08-30-232/+127
| | | | | | | | | | | | Becuase the board select menu in arch/arm/Kconfig is too big, move the KirkWood board select menu to kirkwood/Kconfig. Consolidate also common settings (CONFIG_SYS_CPU="arm926ejs" and CONFIG_SYS_SOC="kirkwood"). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Prafulla Wadasdkar <prafulla@marvell.com> Cc: Luka Perkov <luka@openwrt.org>
* versatile: kconfig: move common settingsMasahiro Yamada2014-08-30-83/+30
| | | | | | Move Versatile-specific settings to versatile/Kconfig. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* rmobile: kconfig: move board select menu and common settingsMasahiro Yamada2014-08-30-64/+46
| | | | | | | | | | | Becuase the board select menu in arch/arm/Kconfig is too big, move the Rmobile board select menu to rmobile/Kconfig. Consolidate also common settings (CONFIG_SYS_CPU="armv7" and CONFIG_SYS_SOC="rmobile"). Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
* tegra: kconfig: move board select menu and common settingsMasahiro Yamada2014-08-30-246/+190
| | | | | | | | | | | | | | | | | | | | | | | | Becuase the board select menu in arch/arm/Kconfig is too big, move the Tegra board select menu to tegra/Kconfig. Insert the Tegra SoC select menu between the arch select and the board select. Architecture select |-- Tegra Platform (Tegra) |- Tegra SoC select (Tegra20 / 30 / 114 / 124) |- Board select Consolidate also common settings (CONFIG_SYS_CPU="armv7" and CONFIG_SYS_SOC="tegra*") and always "select" CONFIG_SPL as follows: config TEGRA bool select SPL Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Stephen Warren <swarren@nvidia.com> Cc: Tom Warren <twarren@nvidia.com>
* zynq: kconfig: move board select menu and common settingsMasahiro Yamada2014-08-30-118/+54
| | | | | | | | | | | | | Becuase the board select menu in arch/arm/Kconfig is too big, move the Zynq board select menu to zynq/Kconfig. Consolidate also common settings (CONFIG_SYS_CPU="armv7" and CONFIG_SYS_SOC="zynq"). Refactor board/xilinx/zynq/MAINTAINERS too. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Tested-by: Michal Simek <michal.simek@xilinx.com>
* arm: Add missing .vectors section to linker scriptsBenoît Thébaudeau2014-08-30-0/+12
| | | | | | | | | | Commit 41623c9 'arm: move exception handling out of start.S files' missed some linker scripts. Hence, some boards no longer had exception handling linked since this commit. Restore the original behavior by adding the .vectors section to these linker scripts. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
* arm/km: disable subpage write for km_kirkwood_pci and kmsuv31 targetHolger Brunck2014-08-30-1/+4
| | | | | | | | | | | | Newer FLASH types used on these boards don't allow writing of subpages. So disable subpage write in the NAND driver. Additionally we need to tell the UBI layer in the kernel that he also should only write 2048 bytes. This is done with an additional command line parameter for the kernel commandline. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com>
* arm/kirkwood/nand: allow forced disabling for subpage writesHolger Brunck2014-08-30-0/+3
| | | | | | | | | | Make it configurable to disable subpage writes like the DaVinci NAND driver already does. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Prafulla Wadaskar <prafulla@marvell.com> cc: Scott Wood <scottwood@freescale.com>
* vexpress_aemv8a.h: Enable CONFIG_CMD_BOOTI and CONFIG_CMD_UNZIPTom Rini2014-08-30-0/+2
| | | | | | Add support for booting Images and for unzipping Image.gz files. Signed-off-by: Tom Rini <trini@ti.com>
* vexpress_aemv8a.h: Clean up the configTom Rini2014-08-30-8/+5
| | | | | | | | | - Drop DEBUG - Drop defines we can use the default of. - Provide a larger malloc pool. - Correct default locations for kernel / initrd / device tree Signed-off-by: Tom Rini <trini@ti.com>
* cmd_bootm.c: Add 'booti' for ARM64 Linux kernel ImagesTom Rini2014-08-30-1/+142
| | | | | | | | | | | | | The default format for arm64 Linux kernels is the "Image" format, described in Documentation/arm64/booting.txt. This, along with an optional gzip compression on top is all that is generated by default. The Image format has a magic number within the header for verification, a text_offset where the Image must be run from, an image_size that includes the BSS and reserved fields. This does not support automatic detection of a gzip compressed image. Signed-off-by: Tom Rini <trini@ti.com>
* arm64: Correct passing of Linux kernel argsTom Rini2014-08-30-3/+5
| | | | | | | The Documentation/arm64/booting.txt document says that pass in x1/x2/x3 as 0 as they are reserved for future use. Signed-off-by: Tom Rini <trini@ti.com>
* arm: convert Cygnus and NSP boards to KconfigSteve Rae2014-08-30-0/+72
| | | | | | Convert the bcm958300k and the bcm958622hr boards from "boards.cfg" to Kconfig. Signed-off-by: Steve Rae <srae@broadcom.com>
* arm: add Cygnus and NSP boardsScott Branden2014-08-30-0/+244
| | | | | | | | | The bcm_ep board configuration is used by a number of boards including Cygnus and NSP. Add builds for the bcm958300k and the bcm958622hr boards. Signed-off-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Steve Rae <srae@broadcom.com>
* arm: bcmnsp: Add bcmnsp u-architectureScott Branden2014-08-30-0/+26
| | | | | | | | Base support for the Broadcom NSP SoC. Based on iproc-common and the SoC specific reset function. Signed-off-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Steve Rae <srae@broadcom.com>
* arm: bcmcygnus: Add bcmcygnus u-architectureScott Branden2014-08-30-0/+27
| | | | | | | | Base support for the Broadcom Cygnus SoC. Based on iproc-common and the SoC specific reset function. Signed-off-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Steve Rae <srae@broadcom.com>
* arm: iproc: Initial commit of iproc architecture codeScott Branden2014-08-30-0/+423
| | | | | | | | The iproc architecture code is present in several Broadcom chip architectures, including Cygnus and NSP. Signed-off-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Steve Rae <srae@broadcom.com>
* arm: vf610: add NFC clock supportStefan Agner2014-08-30-0/+15
| | | | | | | Add NFC (NAND Flash Controller) clock support and enable them at board initialization time. Signed-off-by: Stefan Agner <stefan@agner.ch>
* arm: vf610: add NFC pin muxStefan Agner2014-08-30-0/+38
| | | | | | | | Add pin mux for NAND Flash Controller (NFC). NAND can be connected using 8 or 16 data lines, this patch adds pin mux entries for all 16 data lines. Signed-off-by: Stefan Agner <stefan@agner.ch>
* MAINTAINERS: change the status of vexpress board to OrphanMasahiro Yamada2014-08-30-1/+1
| | | | | | | | | | The email address of Matt Waddel is no longer working. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Alexei Fedorov <alexie.fedorov@arm.com>
* ARM: Fix overflow in MMU setupMarek Vasut2014-08-30-1/+1
| | | | | | | | | | | | | | | | | | The patch fixes a corner case where adding size to DRAM start resulted in a value (1 << 32), which in turn overflew the u32 computation, which resulted in 0 and it therefore prevented correct setup of the MMU tables. The addition of DRAM bank start and it's size can end up right at the end of the address space in the special case of a machine with enough memory. To prevent this overflow, shift the start and size separately and add them only after they were shifted. Hopefully, we only have systems in tree which have DRAM size aligned to 1MiB boundary. If not, this patch would break such systems. On the other hand, such system would be broken by design anyway. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
* arm: bcm281xx: add board with Ethernet capabilitySteve Rae2014-08-30-0/+9
| | | | | | Add board which has Broadcom StarFighter2 Ethernet capability. Signed-off-by: Steve Rae <srae@broadcom.com>
* arm: bcm281xx: net: Add Ethernet DriverJiandong Zheng2014-08-30-0/+1536
| | | | | | | | | | | The Broadcom StarFighter2 Ethernet driver is used in multiple Broadcom SoC(s) and: - supports multiple MAC blocks, - provides support for the Broadcom GMAC. This driver requires MII and PHYLIB. Signed-off-by: Jiandong Zheng <jdzheng@broadcom.com> Signed-off-by: Steve Rae <srae@broadcom.com>
* arm: bcm281xx: Add Ethernet Clock supportJiandong Zheng2014-08-30-0/+181
| | | | | | | | Enable Ethernet clock when Broadcom StarFighter2 Ethernet block (CONFIG_BCM_SF2_ETH) is enabled. Signed-off-by: Jiandong Zheng <jdzheng@broadcom.com> Signed-off-by: Steve Rae <srae@broadcom.com>
* ARM: enable ARMv7 virt support for the Arndale boardAndre Przywara2014-08-30-0/+18
| | | | | | | | | | | | | To enable hypervisors utilizing the ARMv7 virtualization extension on the Arndale board, add the simple SMP pen address writer function and add the required configuration variables to switch all cores to HYP mode before launching the OS. This allows booting KVM and Xen directly from u-boot. Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Andre Przywara <andre.przywara@linaro.org> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
* arm: ep9315: Add .vectors section to lds and remove obsolete ldsSergey Kostanbaev2014-08-30-58/+1
| | | | | | | | | However ep9315 don't use interrupt vectors during startup, but _startup symbol is used inside uboot to calculate actual monitor size. Signed-off-by: Sergey Kostanbaev <sergey.kostanbaev@gmail.com> Cc: albert.u.boot@aribaud.net
* socfpga: cleanup socfpga_dw_mmcPavel Machek2014-08-30-4/+4
| | | | | | | Cleanups as suggested by wd on mailing list. Signed-off-by: Pavel Machek <pavel@denx.de> Acked-by: Chin Liang See <clsee@altera.com>
* socfpga: initialize designware ethernetPavel Machek2014-08-30-9/+51
| | | | | | | | Enable initialization fo designware ethernet controller. With this patch, ethernet works in my configuration, provided I set ethernet address in the environment. Signed-off-by: Pavel Machek <pavel@denx.de>
* socfpga: Fix SOCFPGA build error for Altera dev kitChin Liang See2014-08-29-3/+9
| | | | | | | | | | | | | To fix the build error when build for Altera dev kit, not virtual target. At same time, set the build for Altera dev kit as default instead virtual target. With that, U-Boot is booting well and SPL still lack of few drivers. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
* socfpga: fix clock manager register definitionPavel Machek2014-08-29-101/+107
| | | | | | | | | Structure defining clock manager hardware was wrong, leading to wrong registers being accessed and hang in MMC init. This fixes structure to match hardware. Signed-off-by: Pavel Machek <pavel@denx.de>
* arm: include config.h in arch/arm/lib/vectors.SChristian Riesch2014-08-29-0/+2
| | | | | | | | | | | config.h is required for CONFIG_SYS_DV_NOR_BOOT_CFG. Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Reported-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Heiko Schocher <hs@denx.de> Cc: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
* ARM:asm:io.h use static inlineJeroen Hofstee2014-08-29-6/+6
| | | | | | | | | | | When compiling u-boot with W=1 the extern inline void for read* is likely causing the most noise. gcc / clang will warn there is never a actual declaration for these functions. Instead of declaring these extern make them static inline so it is actually declared. cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
* Merge branch 'master' of git://git.denx.de/u-boot-tiTom Rini2014-08-29-392/+679
|\
| * pcm051: use ti_am335x_common.h configMatwey V. Kornilov2014-08-25-136/+4
| | | | | | | | | | | | Include general configs/ti_am335x_common.h and drop redundant #defines. Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com>
| * ARM: DRA: Enable VTT regulatorLokesh Vutla2014-08-25-0/+36
| | | | | | | | | | | | | | | | | | | | DRA7 evm REV G and later boards uses a vtt regulator for DDR3 termination and this is controlled by gpio7_11. Configuring gpio7_11. The pad A22(offset 0x3b4) is used by gpio7_11 on REV G and later boards, and left unused on previous boards, so it is safe enough to enable gpio on all DRA7 boards. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * am335x_evm: Convert CONFIG_CONS_INDEX into a menu choiceTom Rini2014-08-25-43/+27
| | | | | | | | | | | | | | | | | | | | - Drop CONFIG_SERIAL[1-6] and use CONFIG_CONS_INDEX tests instead - Add choice and help text to board/ti/am335x/Kconfig - Correct comment about IDK in board/ti/am335x/mux.c - Remove am335x_evm_uart* defconfig files as they're just variations on a config option now. Signed-off-by: Tom Rini <trini@ti.com>
| * cm-t54: convert to generic boardDmitry Lifshitz2014-08-25-0/+3
| | | | | | | | | | | | | | Use generic board setup functions by defining CONFIG_SYS_GENERIC_BOARD. Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il>
| * cm-t54: fix eMMC boot mode checkDmitry Lifshitz2014-08-25-1/+1
| | | | | | | | | | | | | | | | | | | | Boot from eMMC boot partition corresponds to BOOT_DEVICE_MMC2 omap_bootmode, while BOOT_DEVICE_MMC2_2 corresponds to the user data partition boot. Fix mmc_get_env_part() boot mode check to use a correct value. Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il>
| * cm-t54: fix EEPROM read return value checkDmitry Lifshitz2014-08-25-2/+2
| | | | | | | | | | | | | | Fix cl_eeprom_read_mac_addr() return value check. Fix long line codding style issue in board_init(). Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il>
| * ARM: DRA7: Enable software leveling for dra7Sricharan R2014-08-25-68/+32
| | | | | | | | | | | | | | | | | | | | Currently hw leveling is enabled by default on DRA7/72. But the hardware team suggested to use sw leveling as hw leveling is not characterized and seen some test case failures. So enabling sw leveling on all DRA7 platforms. Signed-off-by: Sricharan R <r.sricharan@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * SOM: tam3517: convert to generic boardJeroen Hofstee2014-08-25-0/+1
| | | | | | | | | | | | Cc: Raphael Assenat <raph@8d.com> Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
| * keystone2: use EFUSE_BOOTROM information to configure PLLsVitaly Andrianov2014-08-25-8/+173
| | | | | | | | | | | | | | | | | | This patch reads EFUSE_BOOTROM register to see the maximum supported clock for CORE and TETRIS PLLs and configure them accordingly. Acked-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| * board/ti/dra7xx: add support for parallel NORpekon gupta2014-08-25-8/+78
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for parallel NOR device (S29GL512S10) present on J6-EVM. The Flash device is connected to GPMC controller on chip-select[0] and accessed as memory-mapped device. It has data-witdh=x16, capacity-64MBytes(512Mbits) and is CFI compatible. As multiple devices are share GPMC pins on this board, so following board settings are required to detect NOR device: SW5.1 (NAND_BOOTn) = OFF (logic-1) SW5.2 (NOR_BOOTn) = ON (logic-0) /* Active-low */ SW5.3 (eMMC_BOOTn) = OFF (logic-1) SW5.4 (QSPI_BOOTn) = OFF (logic-1) And also set appropriate SYSBOOT configurations: SW3.1 (SYSBOOT[ 8])= ON (logic-1) /* selects SYS_CLK1 speed */ SW3.2 (SYSBOOT[ 9])= OFF (logic-0) /* selects SYS_CLK1 speed */ SW3.3 (SYSBOOT[10])= ON (logic-1) /* wait-pin monitoring = enabled */ SW3.4 (SYSBOOT[11])= OFF (logic-0) /* device type: Non Muxed */ SW3.5 (SYSBOOT[12])= OFF (logic-0) /* device type: Non Muxed */ SW3.6 (SYSBOOT[13])= ON (logic-1) /* device bus-width: 1(x16) */ SW3.7 (SYSBOOT[14])= OFF (logic-0) /* reserved */ SW3.8 (SYSBOOT[15])= ON (logic-1) /* reserved */ Also, following changes are required to enable NOR Flash support in dra7xx_evm board profile:
| * board/ti/dra7xx: add support for parallel NANDpekon gupta2014-08-25-0/+78
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for x16 NAND device (MT29F2G16AAD) connected to GPMC chip-select[0] on DRA7xx EVM. As GPMC pins are shared by multiple devices, so in addition to this patch following board settings are required for NAND device detection [1]: SW5.9 (GPMC_WPN) = OFF (logic-1) SW5.1 (NAND_BOOTn) = ON (logic-0) /* Active-low */ SW5.2 (NOR_BOOTn) = OFF (logic-1) SW5.3 (eMMC_BOOTn) = OFF (logic-1) SW5.4 (QSPI_BOOTn) = OFF (logic-1) And also set appropriate SYSBOOT configurations SW2.1 (SYSBOOT[0]) = ON (logic-1) /* selects NAND Boot */ SW2.2 (SYSBOOT[1]) = OFF (logic-0) /* selects NAND Boot */ SW2.3 (SYSBOOT[2]) = OFF (logic-0) /* selects NAND Boot */ SW2.4 (SYSBOOT[3]) = OFF (logic-0) /* selects NAND Boot */ SW2.5 (SYSBOOT[4]) = ON (logic-1) /* selects NAND Boot */ SW2.6 (SYSBOOT[5]) = ON (logic-1) /* selects NAND Boot */ SW2.7 (SYSBOOT[6]) = OFF (logic-0) /* reserved */ SW2.8 (SYSBOOT[7]) = OFF (logic-0) /* reserved */ SW3.1 (SYSBOOT[ 8])= ON (logic-1) /* selects SYS_CLK1 speed */ SW3.2 (SYSBOOT[ 9])= OFF (logic-0) /* selects SYS_CLK1 speed */ SW3.3 (SYSBOOT[10])= ON (logic-1) /* wait-pin monitoring = enabled */ SW3.4 (SYSBOOT[11])= OFF (logic-0) /* device type: Addr/Data Muxed */ SW3.5 (SYSBOOT[12])= ON (logic-1) /* device type: Addr/Data Muxed */ SW3.6 (SYSBOOT[13])= ON (logic-1) /* device bus-width: 1(x16) */ SW3.7 (SYSBOOT[14])= OFF (logic-0) /* reserved */ SW3.8 (SYSBOOT[15])= ON (logic-1) /* reserved */ Following changes are required in board.cfg to enable NAND on J6-EVM:
| * board/ti/am43xx: add support for parallel NANDpekon gupta2014-08-25-1/+107
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for NAND device connected to GPMC chip-select on following AM43xx EVM boards. am437x-gp-evm: On this board, NAND Flash signals are muxed with eMMC, thus at a time either eMMC or NAND can be enabled. Selection between eMMC and NAND is controlled by: (a) Statically using Jumper on connecter (J89) present on board. (a) If Jumper on J89 is NOT used, then selection can be dynamically controlled by driving SPI2_CS0[MUX_MODE=GPIO] pin via software: SPI2_CS0 == 0: NAND (default) SPI2_CS0 == 1: eMMC am43x-epos-evm: On this board, NAND Flash control lines are muxed with QSPI, Thus only one of the two can be used at a time. Selection is controlled by: (a) Dynamically driving following GPIO pin from software GPMC_A0(GPIO) == 0 NAND is selected (default) NAND device (MT29F4G08AB) on these boards has: - data-width=8bits - blocksize=256KB - pagesize=4KB - oobsize=224 bytes For above NAND device, ROM code expects the boot-loader to be flashed in BCH16 ECC scheme for NAND boot, So by default BCH16 ECC is enabled for AM43xx EVMs. Signed-off-by: Pekon Gupta <pekon@ti.com>
| * board/ti/am335x: add support for beaglebone NOR Capepekon gupta2014-08-25-60/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support of NOR cape[1] for both Beaglebone (white) and Beaglebone(Black) boards. NOR Flash on this cape is connected to GPMC chip-select[0] and accesses as external memory-mapped device. This cape has 128Mbits(16MBytes), x16, CFI compatible NOR Flash device. As GPMC chip-select[0] can be shared by multiple capes so NOR profile is not enabled by default in boards.cfg. Following changes are required to enable NOR cape detection when building am335x_boneblack board profile. Signed-off-by: Tom Rini <trini@ti.com>
| * board/ti/am335x: add support for beaglebone NAND capepekon gupta2014-08-25-20/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Beaglebone Board can be connected to expansion boards to add devices to them. These expansion boards are called 'capes'. This patch adds support for following versions of Beaglebone(AM335x) NAND capes (a) NAND Device with bus-width=16, block-size=128k, page-size=2k, oob-size=64 (b) NAND Device with bus-width=16, block-size=256k, page-size=4k, oob-size=224 Further information and datasheets can be found at [1] and [2] * How to boot from NAND using Memory Expander + NAND Cape ? * - Important: As BOOTSEL values are sampled only at POR, so after changing any setting on SW2 (DIP switch), disconnect and reconnect all board power supply (including mini-USB console port) to POR the beaglebone. - Selection of ECC scheme for NAND cape(a), ROM code expects BCH8_HW ecc-scheme for NAND cape(b), ROM code expects BCH16_HW ecc-scheme - Selction of boot modes can be controlled via DIP switch(SW2) present on Memory Expander cape. SW2[SWITCH_BOOT] == OFF follow default boot order MMC-> SPI -> UART -> USB SW2[SWITCH_BOOT] == ON boot mode selected via DIP switch(SW2) So to flash NAND, first boot via MMC or other sources and then switch to SW2[SWITCH_BOOT]=ON to boot from NAND Cape. - For NAND boot following switch settings need to be followed SW2[ 1] = OFF (SYSBOOT[ 0]==1: NAND boot mode selected ) SW2[ 2] = OFF (SYSBOOT[ 1]==1: -- do -- ) SW2[ 3] = ON (SYSBOOT[ 2]==0: -- do -- ) SW2[ 4] = ON (SYSBOOT[ 3]==0: -- do -- ) SW2[ 5] = OFF (SYSBOOT[ 4]==1: -- do -- ) SW2[ 6] = OFF (SYSBOOT[ 8]==1: 0:x8 device, 1:x16 device ) SW2[ 7] = ON (SYSBOOT[ 9]==0: ECC done by ROM ) SW2[ 8] = ON (SYSBOOT[10]==0: Non Muxed device ) SW2[ 9] = ON (SYSBOOT[11]==0: -- do -- ) [1] http://beagleboardtoys.info/index.php?title=BeagleBone_Memory_Expansion [2] http://beagleboardtoys.info/index.php?title=BeagleBone_4Gb_16-Bit_NAND_Module *IMPORTANT NOTE* As Beaglebone board shares the same config as AM335x EVM, so following changes are required in addition to this patch for Beaglebone NAND cape. (1) Enable NAND in am335x_beaglebone board profile (2) Add CONFIG_SYS_NAND_BUSWIDTH_16BIT to board config because: - AM335x EVM has NAND device with datawidth=8, whereas - Beaglebone NAND cape has NAND device with data-width=16
| * board/ti/am335x: update configs for parallel NANDpekon gupta2014-08-25-24/+29
| | | | | | | | | | | | | | | | | | | | This patch - consolidate CONFIG_SYS_NAND_xx and CONFIG_SPL_NAND_xx from various configuration files into single file. - update MTD Partition table to match AM335x_EVM DT in linux-kernel - segregate CONFIGs based on different boot modes (like SPL and U-Boot) Signed-off-by: Pekon Gupta <pekon@ti.com>
| * am335x_evm: Enable CONFIG_SPL_ENV_SUPPORT on EMMC_BOOTTom Rini2014-08-25-0/+1
| | | | | | | | | | | | | | When we're using EMMC_BOOT that means we have environment on eMMC so we can make use of CONFIG_SPL_ENV_SUPPORT within Falcon Mode. Signed-off-by: Tom Rini <trini@ti.com>
generated by cgit v1.1 at 2024-11-23 16:53:26 +0000