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| | * Revert "SBC8548: fix address mask to allow 64M flash"Paul Gortmaker2012-01-11-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit ccf1ad535ae1c0dc2d466235c668adbdfe3a55b7. The commit "SBC8548: fix address mask to allow 64M flash" essentially made this change: * OR6: - * Addr Mask = 64M = OR6[0:16] = 1111 1100 0000 0000 0 + * Addr Mask = 64M = OR6[0:16] = 1111 1000 0000 0000 0 But this makes no sense, as section 13.3.1.2.1 in the MPC8548ERM v2 clearly indicates the masks: 1111_1111_1000_0000_0 8 Mbytes 1111_1100_0000_0000_0 64 Mbytes 1111_1000_0000_0000_0 128 Mbytes So the original value was correct, and the commit was invalid, causing a 128MB mapping for a 64MB flash device. The problem rears its head when trying to configure u-boot to have access to both flash, since the default memory map is: FB80_0000 – FF7F_FFFF 32-bits 64MB FLASH SODIMM FF80_0000 – FFFF_FFFF 8-bits 8MB FLASH By extending the mapping of the 64MB flash to 128MB, it now conflicts with the normal 8MB boot flash, causing issues. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * MPC85xxCDS: Fix missing LCRR_DBYP bits for 66-133MHz LBCPaul Gortmaker2012-01-11-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These boards were meaning to deploy this value: #define LCRR_DBYP 0x80000000 but were missing a zero, and hence toggling a bit that lands in an area marked as reserved in the 8548 reference manual. According to the documentation, LCRR_DBYP should be used as: PLL bypass. This bit should be set when using low bus clock frequencies if the PLL is unable to lock. When in PLL bypass mode, incoming data is captured in the middle of the bus clock cycle. It is recommended that PLL bypass mode be used at frequencies of 83 MHz or less. So the impact would most likely be undefined behaviour for LBC peripherals on boards that were running below 83MHz LBC. Looking at the actual u-boot code, the missing DBYP bit was meant to be deployed as follows: Between 66 and 133, the DLL is enabled with an override workaround. In the future, we'll convert all boards to use the symbolic DBYP constant to avoid these "count the zeros" problems, but for now, just fix the impacted boards. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * eXMeritus HWW-1U-1A: Add support for the AT24C128N I2C EEPROMKyle Moffett2012-01-11-2/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This EEPROM is hardware-write-protected and used to persist key information such as the serial number and MAC addresses even if the primary environment sector in NOR FLASH is overwritten. During manufacturing, the environment is initialized from Linux and then the key parameters copied to the EEPROM via U-Boot: env export -c -s 0x2000 $loadaddr serial# macaddr mac1addr mac2addr eeprom write $loadaddr 0x0000 0x2000 The chip is then locked via hardware for delivery. When doing a field U-Boot upgrade, the environment is erased and reset to the defaults to avoid problems with "hwconfig" changes, etc. After loading the new U-Boot image, the hardware data is reloaded: i2c dev 0 eeprom read $loadaddr 0x0000 0x2000 env import -c $loadaddr 0x2000 saveenv The first three commands are saved in the "restore_eeprom" variable for user convenience. (EG: "run restore_eeprom && saveenv") Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com> Cc: Andy Fleming <afleming@gmail.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| | * eXMeritus HWW-1U-1A: Minor environment variable tweaksKyle Moffett2012-01-11-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Most of the ethernet connections are internal links with specialized hardware and are not useful for "dhcp" or general-purpose networking; U-Boot should not be cycling through them. Force the primary external network interface in "ethprime" and disable the interface cycling with "ethrotate=no". Additionally, the environment variable "preboot" has its own config option and means something entirely different from what the HWW-1U-1A variable was intended for. Rename the board variable to "setbootargs" to avoid potential confusion. Finally, fix an incorrect address for the kernel in FLASH memory. Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com> Cc: Andy Fleming <afleming@gmail.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | | Merge branch 'master' of /home/wd/git/u-boot/custodiansWolfgang Denk2012-01-13-1/+1
|\ \ \ | |/ / | | | | | | | | | * 'master' of /home/wd/git/u-boot/custodians: fix: error ATMEL_FIO_BASE undeclared, if use I2C_Soft on AT91
| * | Merge branch 'master' of git://git.denx.de/u-boot-i2cWolfgang Denk2012-01-13-1/+1
| |\ \ | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-i2c: fix: error ATMEL_FIO_BASE undeclared, if use I2C_Soft on AT91
| | * | fix: error ATMEL_FIO_BASE undeclared, if use I2C_Soft on AT91esw@bus-elektronik.de2012-01-11-1/+1
| | |/ | | | | | | | | | | | | | | | | | | | | | * Since AT91 name schema was changed to ATMEL_BASE_xxx, I2C_SOFT on AT91 devices fails with 'error: ATMEL_FIO_BASE undeclared' * change ATMEL_PIO_BASE to ATMEL_BASE_PIOA will fix this Signed-off-by: Jens Scharsig <esw@bus-elektronik.de>
* | | Merge branch 'master' of /home/wd/git/u-boot/custodiansWolfgang Denk2012-01-13-922/+287
|\ \ \ | |/ / | | | | | | | | | | | | | | | | | | | | | * 'master' of /home/wd/git/u-boot/custodians: board/mpl/pati: use the CFI driver for the PATI board board/mpl/mip405: use the CFI driver for the MIP405/MIP405T board board/mpl/pip405: use the CFI driver for the PIP405 board board/mpl/common: remove the old legacy flash ppc4xx: Setup HICB on Io64
| * | Merge branch 'master' of git://git.denx.de/u-boot-ppc4xxWolfgang Denk2012-01-13-922/+287
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-ppc4xx: board/mpl/pati: use the CFI driver for the PATI board board/mpl/mip405: use the CFI driver for the MIP405/MIP405T board board/mpl/pip405: use the CFI driver for the PIP405 board board/mpl/common: remove the old legacy flash ppc4xx: Setup HICB on Io64
| | * | board/mpl/pati: use the CFI driver for the PATI boardDavid Müller2012-01-09-6/+11
| | | | | | | | | | | | | | | | | | | | Signed-off-by: David Mueller <d.mueller@elsoft.ch> Signed-off-by: Stefan Roese <sr@denx.de>
| | * | board/mpl/mip405: use the CFI driver for the MIP405/MIP405T boardDavid Müller2012-01-09-7/+36
| | | | | | | | | | | | | | | | | | | | Signed-off-by: David Mueller <d.mueller@elsoft.ch> Signed-off-by: Stefan Roese <sr@denx.de>
| | * | board/mpl/pip405: use the CFI driver for the PIP405 boardDavid Müller2012-01-09-12/+38
| | | | | | | | | | | | | | | | | | | | Signed-off-by: David Mueller <d.mueller@elsoft.ch> Signed-off-by: Stefan Roese <sr@denx.de>
| | * | board/mpl/common: remove the old legacy flashDavid Müller2012-01-09-896/+182
| | | | | | | | | | | | | | | | | | | | Signed-off-by: David Mueller <d.mueller@elsoft.ch> Signed-off-by: Stefan Roese <sr@denx.de>
| | * | ppc4xx: Setup HICB on Io64Dirk Eibach2012-01-09-1/+20
| | |/ | | | | | | | | | | | | | | | | | | The FPGA High-Speed Interconnect Bus (HICB) is now setup by u-boot. Signed-off-by: Dirk Eibach <eibach@gdsys.de> Signed-off-by: Stefan Roese <sr@denx.de>
* | | Merge branch 'master' of /home/wd/git/u-boot/custodiansWolfgang Denk2012-01-13-437/+590
|\ \ \ | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of /home/wd/git/u-boot/custodians: mpc8313erdb: fix mtdparts address powerpc/83xx/km: add support for 8321 based tuge1 board powerpc/83xx/km: merge tuxa and tuda1 boards to tuxx1 powerpc/83xx/km: remove obsolete defines for tuda1 powerpc/83xx/km: update SDRAM parameters for km8321 boards mpc8313erdb: Enable GPIO support on the MPC8313E RDB mpc83xx: Add a GPIO driver for the MPC83XX family gpio: Replace ARM gpio.h with the common API in include/asm-generic gpio: Modify common gpio.h to more closely match Linux
| * | Merge branch 'master' of git://git.denx.de/u-boot-mpc83xxWolfgang Denk2012-01-13-437/+590
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-mpc83xx: mpc8313erdb: fix mtdparts address powerpc/83xx/km: add support for 8321 based tuge1 board powerpc/83xx/km: merge tuxa and tuda1 boards to tuxx1 powerpc/83xx/km: remove obsolete defines for tuda1 powerpc/83xx/km: update SDRAM parameters for km8321 boards mpc8313erdb: Enable GPIO support on the MPC8313E RDB mpc83xx: Add a GPIO driver for the MPC83XX family gpio: Replace ARM gpio.h with the common API in include/asm-generic gpio: Modify common gpio.h to more closely match Linux
| | * | mpc8313erdb: fix mtdparts addressScott Wood2012-01-09-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix a copy-and-paste error when adapting mpc8315erdb mtdparts to mpc8313erdb. mtdids was already using the proper address on mpc8313erdb. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| | * | powerpc/83xx/km: add support for 8321 based tuge1 boardHolger Brunck2012-01-09-5/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This board is similar to our tuxx1 target. But on this board there is only one application specific chip select configured. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Valentin Longchamp <valentin.longchamp@keymile.com> Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| | * | powerpc/83xx/km: merge tuxa and tuda1 boards to tuxx1Holger Brunck2012-01-09-138/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These boards are from a u-boot point of view identical. So collect the two headerfiles to one, to decrease maintenance. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Valentin Longchamp <valentin.longchamp@keymile.com> cc: Heiko Schocher <hs@denx.de> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| | * | powerpc/83xx/km: remove obsolete defines for tuda1Holger Brunck2012-01-09-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_SYS_LCRR is unused and CONFIG_SYS_LBC_LBCR is already defined in the common header file, so remove them. Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Valentin Longchamp <valentin.longchamp@keymile.com> Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| | * | powerpc/83xx/km: update SDRAM parameters for km8321 boardsMarco Schmid2012-01-09-10/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Measurements during HW basic test showed, that the SDRAM timing has to be optimized. This patch adapted these timings accordingly. Signed-off-by: Marco Schmid <marco.schmid@keymile.com> Signed-off-by: Holger Brunck <holger.brunck@keymile.com> cc: Valentin Longchamp <valentin.longchamp@keymile.com> Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| | * | mpc8313erdb: Enable GPIO support on the MPC8313E RDBJoe Hershberger2012-01-09-2/+22
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| | * | mpc83xx: Add a GPIO driver for the MPC83XX familyJoe Hershberger2012-01-09-0/+240
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| | * | gpio: Replace ARM gpio.h with the common API in include/asm-genericJoe Hershberger2012-01-09-271/+249
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ARM boards should use the generic GPIO API This means changing gpio to unsigned type Remove the unused gpio_toggle() function which is not part of the API Comment that free should not modify pin state Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> fixed merge conflict in da8xx_gpio.c, tegra2_gpio.c, and extended to the new mxs_gpio.c. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
| | * | gpio: Modify common gpio.h to more closely match LinuxJoe Hershberger2012-01-09-9/+32
| | |/ | | | | | | | | | | | | | | | | | | | | | | | | Change "int gp" to "unsigned gpio" Add request and free entry-points Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | | Merge branch 'master' of /home/wd/git/u-boot/custodiansWolfgang Denk2012-01-13-172/+217
|\ \ \ | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of /home/wd/git/u-boot/custodians: fsl_esdhc: fix PIO mode transfers mmc: tegra2: Implement card-detect hook. mmc: fsl_esdhc: Implement card-detect hook. mmc: Implement card detection. mmc: Change board_mmc_getcd() function prototype. drivers/mmc/mv_sdhci.c: Fix build warning ftsdc010: improve performance and capability mmc: add host_caps checking avoid switch card improperly i.mx: fsl_esdhc: add the i.mx6q support
| * | fsl_esdhc: fix PIO mode transfersIra Snyder2012-01-08-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The pointer to the registers used to control the Freescale ESDHC MMC controller is not initialized correctly when using PIO mode. This is fixed by initializing the pointer in the same way as all other sites within the driver. Examining the commit history shows that this was broken at introduction due to a code change in upstream U-Boot to support the mx51 processor family. Reported-by: Jim Lentz <JLentz@zhone.com> Cc: Andy Fleming <afleming@freescale.com> Cc: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
| * | mmc: tegra2: Implement card-detect hook.Thierry Reding2012-01-08-19/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On Tegra2, card-detection is implemented by passing the card-detection GPIOs to the MMC driver at initialization time. Instead of implementing the board_mmc_getcd() function, use the card-detect hook and allow boards to override it by providing their own board_mmc_getcd() implementation. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
| * | mmc: fsl_esdhc: Implement card-detect hook.Thierry Reding2012-01-08-17/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This card-detect hook probably doesn't work. Perhaps somebody with more knowledge about the hardware can comment on this. I think that perhaps even the complete code from esdhc_init() could go into the getcd() function instead or mmc_getcd() needs to be called at some later time after mmc_init(), which, however, would require many other drivers to change. In addition to implementing the hook, this patch also removes the call to the board_mmc_getcd() function which is now called from the MMC framework and is no longer required here. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Tested-by: Jason Liu <jason.hui@linaro.org>
| * | mmc: Implement card detection.Thierry Reding2012-01-08-0/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Check for card detect each time an MMC/SD device is initialized. If card detection is not implemented, this code behaves as before and continues assuming a card is present. If no card is detected, has_init is reset for the MMC/SD device (to force initialization next time) and an error is returned. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Tested-by: Jason Liu <jason.hui@linaro.org>
| * | mmc: Change board_mmc_getcd() function prototype.Thierry Reding2012-01-08-50/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The new API no longer uses the extra cd parameter that was used to store the card presence state. Instead, this information is returned via the function's return value. board_mmc_getcd() returns -1 to indicate that no card-detection mechanism is implemented; 0 indicates that no card is present and 1 is returned if it was detected that a card is present. The rationale for this change can be found in the following email thread: http://lists.denx.de/pipermail/u-boot/2011-November/110180.html In summary, the old API was not consistent with the rest of the MMC API which always passes a struct mmc as the first parameter. Furthermore the cd parameter was used to mean "card absence" in some implementations and "card presence" in others. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Tested-by: Jason Liu <jason.hui@linaro.org>
| * | drivers/mmc/mv_sdhci.c: Fix build warningAnatolij Gustschin2012-01-08-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix: mv_sdhci.c: In function 'mv_sdh_init': mv_sdhci.c:47:22: warning: the comparison will always evaluate as 'true' for the address of 'mv_sdhci_writeb' will never be NULL [-Waddress] Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Lei Wen <leiwen@marvell.com> Cc: Andy Fleming <afleming@freescale.com> Acked-by: Lei Wen <leiwen@marvell.com>
| * | ftsdc010: improve performance and capabilityMacpaul Lin2012-01-08-85/+103
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch improve the performance by spliting flag examination code in ftsdc010_send_cmd() into 3 functions. This patch also reordered the function which made better capability to some high performance cards against to the next version of ftsdc010 hardware. Signed-off-by: Macpaul Lin <macpaul@andestech.com>
| * | mmc: add host_caps checking avoid switch card improperlyMacpaul Lin2012-01-08-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a host capability checking to avoid the mmc stack switch the card to HIGHSPEED mode when the card supports HIGHSPEED while the host doesn't. This patch avoid furthur transaction problem when the mmc/sd card runs different mode to the host. Signed-off-by: Macpaul Lin <macpaul@andestech.com>
| * | i.mx: fsl_esdhc: add the i.mx6q supportJason Liu2012-01-08-3/+9
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The mmc host controller on the i.mx6q is called usdhc which is redesigned based on the freescale esdhc controller. The usdhc controller is almost compatible with esdhc except it adds one mix register to support debug/SD3.0 and move the low bit 0-6 of XFERTYP register to the mix control reg low bit 0-6. Thus on i.mx6q, we have the following compared with the previous soc: (can refer to RM of chapter 56.3.3) i.mx6q: mix control: bit 31 - bit 7: Added for debug/SD3.0 support bit 6 - bit 0: move in the XFERTYP register bit 6-0 on previous soc XFERTYP register: bit 31 - bit 7: the same as before, bit 6 - bit 0: no-use previous soc mix control: no XFERTYP register: bit 31 - bit 0: xfertype information Signed-off-by: Jason Liu <jason.hui@linaro.org> Cc: Andy Fleming <afleming@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
* | Revert "common.h: remove value from bool defines"Wolfgang Denk2012-01-06-8/+8
|/ | | | | | | | | | | | | | | | This reverts commit 914c9ee971924665c9d2927fe83d8d70060b1eb8 which is causing tons of build warnings like start.S:39:0: warning: "_LINUX_CONFIG_H" redefined [enabled by default] /home/wd/git/u-boot/work/include/common.h:28:0: note: this is the location of the previous definition /work/wd/tmp-ppc/nand_spl/board/freescale/mpc8315erdb/start.S:39:0: warning: "_LINUX_CONFIG_H" redefined [enabled by default] /home/wd/git/u-boot/work/include/common.h:28:0: note: this is the location of the previous definition etc. Signed-off-by: Wolfgang Denk <wd@denx.de>
* ARM: highbank: enable networking and pxeRob Herring2012-01-05-2/+28
| | | | | | | | This enables the XGMAC ethernet driver and networking related config options. Signed-off-by: Jason Hobbs <jason.hobbs@calxeda.com> Signed-off-by: Rob Herring <rob.herring@calxeda.com>
* net: add Calxeda xgmac driverRob Herring2012-01-05-0/+558
| | | | | | | | | | This adds ethernet driver for Calxeda xgmac found on Highbank SOC. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Fix: WARNING: __aligned(size) is preferred over __attribute__((aligned(size))) Signed-off-by: Wolfgang Denk <wd@denx.de>
* Correctly handle input files beginning with several newlinesDavid Wagner2012-01-05-5/+5
| | | | | | Also, fix some comments (minor) Signed-off-by: David Wagner <david.wagner@free-electrons.com>
* FAT: update the second FAT when writing a fileDonggeun Kim2012-01-05-0/+11
| | | | | | | | | | | | After susccessful write to the FAT partition, fsck program may print warning message due to different FAT, provided that the filesystem supports two FATs. This patch makes the second FAT to be same with the first one when writing a file. Signed-off-by: Donggeun Kim <dg77.kim@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
* usb_storage: Fix EHCI "out of buffer pointers" with CD-ROMKyle Moffett2012-01-05-20/+25
| | | | | | | | | | | | | | | | | When performing large bulk reads from a CD or DVD using the U-Boot usb_storage driver, it generates requests of up to 20 blocks at a time. With a standard 512-byte block size, that is 10240 bytes and within the limit of U-Boot's EHCI driver (maximum 5 pages at 4k per page). Unfortunately CD-ROM media has a 2048-byte blocksize, resulting in a maximum transfer size of 40960 bytes, which does not fit. Since the EHCI specification is impossibly obtuse and far beyond my comprehension, I chose to dynamically compute the limit based on the blocksize. Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com>
* fs/fat: Improve error handlingKyle Moffett2012-01-05-4/+14
| | | | | | | | | | | | | | | | | | | | The FAT filesystem fails silently in inexplicable ways when given a filesystem with a block-size that does not match the device sector size. In theory this is not an unsupportable combination but requires a major rewrite of a lot of the filesystem. Until that occurs, the filesystem should detect that scenario and display a helpful error message. This scenario in particular occurred on a 512-byte blocksize FAT fs stored in an El-Torito boot volume on a CD-ROM (2048-byte sector size). Additionally, in many circumstances the ->block_read method will not return a negative number to indicate an error but instead return 0 to indicate the number of blocks successfully read (IE: None). The FAT filesystem should defensively check to ensure that it got all of the sectors that it asked for when reading. Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com>
* fs/fat: Fix FAT detection to support non-DOS partition tablesKyle Moffett2012-01-05-63/+52
| | | | | | | | | | | | | | | | | | | The FAT filesystem code currently ends up requiring that the partition table be a DOS MBR, as it checks for the DOS 0x55 0xAA signature on the partition table (which may be Mac, EFI, ISO9660, etc) before actually computing the partition offset. This fixes support for accessing a FAT filesystem in an ISO9660 boot volume (El-Torito format) by reordering the filesystem checks and reading the 0x55 0xAA "DOS boot signature" and FAT/FAT32 magic number from the first sector of the partition instead of from sector 0. Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com> Fix build warning: fat.c: In function 'fat_register_device': fat.c:66:15: warning: variable 'found_partition' set but not used [-Wunused-but-set-variable] Signed-off-by: Wolfgang Denk <wd@denx.de>
* ext2: Cache line align indirection buffersSimon Glass2012-01-05-6/+12
| | | | | | | | Make ext2 use cache line aligned buffers for reading from the filesystem. This is needed when caches are enabled because unaligned cache invalidates are not safe. Signed-off-by: Simon Glass <sjg@chromium.org>
* tools/env: allow overwrite of ethaddr on defaultGrant Erickson2012-01-05-2/+11
| | | | | | | | | | | | | This patch allows the U-Boot user space companion utility, fw_setenv, to overwrite the 'ethaddr' key/value pair if the current value is set to a per-board-configured default. This change allows 'fw_setenv' to match the behavior of 'setenv' / 'env set' on the U-Boot command line. Signed-off-by: Grant Erickson <marathon96@gmail.com> Fixed excessive white space. Signed-off-by: Wolfgang Denk <wd@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2012-01-05-134/+2687
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-arm: tegra2: Optimize out-of-tree build for Ventana. tegra: Move boards over to use arch-level board UART function tegra: Add support for UART init in cpu board.c tegra: Add a function mux feature tegra: add clock_ll_start_uart() to enable UART prior to reloc tegra: Move clock_early_init() to arch_cpu_init() tegra: Move cpu_init_cp15() to arch_cpu_init() arm: Tegra: Fix Harmony and Ventana builds in u-boot-tegra/master tegra: Fix build error in plutux, medcom tegra2: Add Avionic Design Medcom support. tegra2: Add Avionic Design Plutux support. tegra2: Add common Avionic Design Tamonten support. tegra2: Move tegra2_mmc_init() prototype to public header. tegra2: Change CONFIG_SYS_TEXT_BASE to 0x00108000. tegra2: Always build with USE_PRIVATE_LIBGCC=yes. tegra2: Plumb in SPI/UART switch code tegra2: spi: Support SPI / UART switch tegra2: Implement SPI / UART GPIO switch tegra2: Enable SPI environment on Seaboard tegra2: config: Enable SPI flash on Seaboard tegra2: spi: Add SPI driver for Tegra2 SOC tegra2: Add UARTB support tegra2: Tidy UART selection arm, davinci: Fix build warnings for cam_enc_4xx Devkit8000: Switch over to enable_gpmc_cs_config arm, davinci: Add support for generating AIS images to the Makefile mkimage: Fix variable length header support arm, da850evm: Add an SPL for SPI boot arm, davinci: Add SPL support for DA850 SoCs sf: Add spi_boot() to allow booting from SPI flash in an SPL spl: display_options.o is required for SPI flash support in SPL ARM: omap3: add support to Technexion twister board ARM: omap3: added common configuration for Technexion TAM3517 vision2: Fix checkpatch warning
| * tegra2: Optimize out-of-tree build for Ventana.Thierry Reding2011-12-24-2/+1
| | | | | | | | | | | | | | | | | | As proposed by Mike Frysinger, mkdir can take more than one argument. Instead of spawning two processes, create both the common and seaboard directories in one go. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * tegra: Move boards over to use arch-level board UART functionSimon Glass2011-12-24-121/+5
| | | | | | | | | | | | | | | | | | Now that we can set up the UART in common tegra code, make the boards use it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * tegra: Add support for UART init in cpu board.cSimon Glass2011-12-24-0/+81
| | | | | | | | | | | | | | | | | | | | We add a way of initialising the selected of UARTs prior to relocation. Boards can use the board_init_uart_f() instead of repeating this code themselves. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * tegra: Add a function mux featureSimon Glass2011-12-24-1/+100
| | | | | | | | | | | | | | | | | | | | | | | | funcmux permits selection of config options for particular peripherals, such as the pins that are used for that peripheral, if there are several options. Add UART selection to start with. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
generated by cgit v1.1 at 2024-10-26 14:17:43 +0000