| Commit message (Collapse) | Author | Age | Lines |
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Fix build warning:
common/lcd.c: In function 'lcd_clear':
common/lcd.c:166:6: warning: variable 'bg_color' set but not used [-Wunused-but-set-variable]
int bg_color;
^
common/lcd.c: In function 'lcd_setmem':
common/lcd.c:296:2: warning: format '%d' expects argument of type 'int', but argument 2 has type 'u_long' [-Wformat=]
debug("LCD panel info: %d x %d, %d bit/pix\n", panel_info.vl_col,
^
common/lcd.c:296:2: warning: format '%d' expects argument of type 'int', but argument 3 has type 'u_long' [-Wformat=]
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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Change to panel environment for display at default. Align this feature to
v2015.04 uboot.
Signed-off-by: Ye Li <ye.li@nxp.com>
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Change to panel environment for display at default. Align this feature to
v2015.04 uboot.
Signed-off-by: Ye Li <ye.li@nxp.com>
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Support two display panels, one for LVDS, another for parallel LCD. Align
the feature to v2015.04 uboot.
Signed-off-by: Ye Li <ye.li@nxp.com>
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Support two display panels, one for LVDS, another for parallel LCD. Align the
feature to the v2015.04 uboot.
Signed-off-by: Ye Li <ye.li@nxp.com>
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Update the board_video_skip to use CONFIG_VIDEO_MXS for LCD display support.
Signed-off-by: Ye Li <ye.li@nxp.com>
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The i.MX6SX uses a LVDS bridge to mux to the LCDIF interface. Implmement a
function for this muxing. So that on 6SX we can use a LVDS display.
Signed-off-by: Ye Li <ye.li@nxp.com>
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Add a new interface "mxs_lcd_panel_setup" to setup fb parameters and
specifies the LCDIF controller for multiple controllers of iMX6SX.
Pass fb parameters via "videomode" env remains work if the new interface
is not called before video initialization.
Modify LCDIF clock interface "mxs_set_lcdclk" to support multiple
LCDIF controllers on iMX6SX.
Signed-off-by: Ye.Li <B37916@freescale.com>
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
(cherry picked from commit d7f49b9378547c3a57b96bcdb907fc44616beb3d)
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Define CONFIG_BOARD_LATE_INIT for mx6qarm2/mx6slevk/mx6sxsabresd
to let mmcdev/mmcroot work as expected.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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Dynamic setting mmcdev and mmcroot for mx7dsabresd.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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Dynamic setting mmcdev and mmcroot for mx6ul evk board.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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Dynamic setting mmcdev and mmcroot for mx6slevk.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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Dynamic setting mmcdev and mmcroot for mx6sxsabresd.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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Dynamic setting mmcdev and mmcroot for mx6sxsabresd.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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Dynamic setting mmcdev and mmcroot for mx6sabresd and mx6qsabreauto.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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Dynamic setting mmcdev and mmcroot for mx6qarm2.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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Align to imx_v2015.04, dynamic setting mmcdev and mmcroot.
Then when boot linux, we can have correct "root=/dev/mmcblk[x]p2"
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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Support epdc for mx7dsabresd board.
Introduce a new configuration file mx7dsabresd_epdc_defconfig.
Add related settings.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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This EPDC/EPXP QoS setting is needed for EPDC stress test to pass.
Signed-off-by: Robby Cai <r63905@freescale.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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Introduce iox74lv_set function.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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Support epdc for mx6dlsabresd board.
Introduce a new configuration file mx6dlsabresd_epdc_defconfig.
Add related settings.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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Support epdc for mx6slevk board.
Introduce a new configuration file mx6slevk_epdc_defconfig.
Add related settings.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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Support EPDC.
E-Ink feature is supported by i.MX6DL/SL and i.MX7D.
For now this driver only supports i.MX6DL/SL, because the
i.MX7D EPDC driver needs pxp support which is not included
in U-Boot.
Support user defined logo file, if there is no logo file, it will
draw a black border around a white screen.
If need to enable EPDC, a waveform file is required to let all
work.
Since we need LCD_MONOCHROME mode for EPDC, we introduce LCD_MONOCHROME
support.
Please refer to Linux Reference Manual for how to flash WAVEFORM file.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Robby Cai <R63905@freescale.com>
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
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Introuduce more pinmux macros definitions.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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By Coverity check, the clk_set_rate function dereferences the clk pointer
without checking whether it is NULL. This may cause problem when clk is NULL.
Fix the problem by adding NULL check.
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit ded2f2958d568411274eeecd265fcc1181638335)
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As the HDMI splash screen feature is not well supported,
we should not set it to be the default display. In case,
users leave the 'panel' uboot environment variable empty
and connect the board with a HDMI monitor, the HDMI detect
funtion will work and enable the HDMI splash screen. So,
this patch disables HDMI detect function so that users
may only explicitly set the 'panel' variable to be 'HDMI'
to use HDMI splash screen.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit d482c54a9fbf458fdb2270cf990d8ec727823bb1)
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This patch adds enable/disable hooks support for ldb_di[0/1] clocks
and enables/disables them when necessary.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
(cherry picked from commit 615d4c51679a6c2ee0ed4c5e3922eec76646eef1)
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The LDB is found in MX6 variants and MX53, so this patch makes the ldb_di clock
relevant code be built only for them.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
(cherry picked from commit 3e40c7466ae7d1d6ca74011bfe69ae059d412a3b)
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-Change HDMI video mode to VGA.
-Add pixel clock fraction part setting in IPU driver,
fix video mode timing issue.
-Add overflow state clear workaround,
fix kernel hang in HDMI driver issue.
-Correct IPU clock to 264MHz.
Signed-off-by: Sandor Yu <R01008@freescale.com>
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
(cherry picked from commit 5028519b434d5dfbe53c48ac4b115ff8b69bbac7)
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The list_first_entry always assumes the list is not empty, it won't return NULL pointer when
the list is empty. So the "if (pdesc == NULL)" becomes a dead code. Fix the issue by calling
the list_empty before the list_first_entry.
(Coverity CID 29934)
Signed-off-by: Ye.Li <ye.li@nxp.com>
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The cod change updated the NAND driver BCH ECC layout algorithm to
support large oob size NAND chips(oob > 1024 bytes).
Current implementation requires each chunk size larger than oob size so
the bad block marker (BBM) can be guaranteed located in data chunk. The
ECC layout always using the unbalanced layout(Ecc for both meta and
Data0 chunk), but for the NAND chips with oob larger than 1k, the driver
cannot support because BCH doesn’t support GF 15 for 2K chunk.
The change keeps the data chunk no larger than 1k and adjust the ECC
strength or ECC layout to locate the BBM in data chunk. General idea for
large oob NAND chips is
1.Try all ECC strength from the minimum value required by NAND spec to
the maximum one that works, any ECC makes the BBM locate in data chunk
can be chosen.
2.If none of them works, using separate ECC for meta, which will add one
extra ecc with the same ECC strength as other data chunks. This extra
ECC can guarantee BBM located in data chunk, of course, we need to check
if oob can afford it.
Signed-off-by: Han Xu <b45815@freescale.com>
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enlarge the maximum nand page size and oob size to
16k byte and 1280byte.
Signed-off-by: Han Xu <b45815@freescale.com>
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For GPIO group which shared by multiple masters, it may set in RDC
to shared and semaphore required. Before access the GPIO register,
the GPIO driver must get the RDC semaphore, and release the semaphore
after the GPIO register access.
When CONFIG_MXC_RDC is set, the features related to RDC semaphores
is enabled in mxc_gpio driver.
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit 84d63e2e2ce12f714e88baad8b2325684614a7c1)
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Conflicts:
drivers/gpio/mxc_gpio.c
(cherry picked from commit c9943b9c8a78bb2c9886bfe582e82978387d8dee)
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
(cherry picked from commit faf94726cac8316c4342e19936f1e03ef283ace3)
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Need to check fuse bit 25 of bank 0 word 4 before initialize bee.
The bit: 0 means bee enabled, 1 means bee disabled.
If disabled, continuing initialize bee will cause system hang, so
need to check this bit before initialize bee.
Add macro to enable BEE in header file, default disabled.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
(cherry picked from commit ef4cb7c53418e4e1dd7cfcb7c6974cfea77ef3c0)
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This patch is to support Bus Encryption Engine(BEE) for i.MX 6UL.
Supported feature:
1. SNVS key and soft key
2. CTR and ECB mode
3. Specify address region to bee.
Two commands are included:
bee init [key] [mode] [start] [end] - BEE block initial
"Example: bee init 1 1 0x80000000 0x80010000\n"
bee test [region]
"Example: bee test 1\n"
Mapping:
[0x10000000 - (0x10000000 + size - 1)] : [start - (start + size - 1)]
[0x30000000 - (0x30000000 + IRAM_SIZE - 1)] : [IRAM_BASE_ADDR -
(IRAM_BASE_ADDR + IRAM_SIZE - 1)]
Whatever start is, start - (start + size -1) will be fixed mapping to
0x10000000 - (0x10000000 + size - 1)
Since default AES region's protected size is SZ_512M, so
on mx6ul evk board, you can not simply run 'bee init', it will
overlap with uboot execution environment, you can use
'bee init 0 0 0x80000000 0x81000000'.
If want to use bee, Need to define CONFIG_CMD_BEE in board configuration
header file, since CONFIG_CMD_BEE default is not enabled.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
(cherry picked from commit 29b9bdbbdac9678dba9b7bc2d3662598e9c548a5)
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Switch to use 2015.04 qspi driver.
Change header file to adapt to the driver.
To i.mx6sx, move config to header file.
Tested read/write/erase on 6ulevk/sxai/sxsdb.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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Update imx-regs.h to align with 2015.04
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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Add NAND pinmux settings and related macros.
Default not enabled, need hardware rework.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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define PHYS_SDRAM_SIZE future usage.
define CMA for kernel usage, default is 320MB, but we do not
have enough memory on 9x9 evk lpddr2 board, so swith to 96MB.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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Switch to default not support SPL.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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Set wdog WCR register SRS bit to turn off internal reset signal WDOG_RESET_B_DEB
for mx7d. So that the warm reset is disabled.
Signed-off-by: Ye.Li <B37916@freescale.com>
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The USDHC move the 4 clock bits CARD_CLK_SOFT_EN, IPG_PERCLK_SOFT_EN,
HCLK_SOFT_EN, and IPG_CLK_SOFT_EN from sysctl register to vendorspec
register. The community driver uses RSTA to replace the clock gate off
operation. But this is not a good solution. This is because:
1. when using RSTA, we should wait this bit to clear by itself. This is not
implemeneted in the codes.
2. After RSTA is set, it is recommended that the Host Driver reset the
external card and reinitialize it.
So in this patch, we change to use the vendorspec registers for these bits
operation.
Signed-off-by: Ye Li <ye.li@nxp.com>
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Introudce wp_enable. If want to check WPSPL, then in board code,
need to set wp_enable to 1.
Take i.MX6UL for example, to some boards, they do not use WP singal,
so they does not configure USDHC1_WP_SELECT_INPUT, and its default
value is 0(GPIO1_IO02). However GPIO1_IO02 is muxed for i2c usage and
SION bit set. So USDHC controller can always get wp signal and WPSPL
shows write protect and blocks driver continuing. This is not what
we want to see, so add wp_enable, and if set to 0, just omit the
WPSPL checking and this does not effect normal working of usdhc
controller.
Suggested-by: Ye.Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit 327dad065f6f9a2b29bd646efc7a08a4c01a4ad3)
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Clear DLL_CTRL delay line settings at USDHC initialization to eliminate the
pre-settings from boot rom. U-boot should re-init the USDHC not reply on the
value set by boot from.
On MX6DL, the ROM has set the default delay line(DLLCTRL) to 0x1000021,
when eMMC works on DDR mode in kernel, it will possibly cause data CRC errors.
Even u-boot always use eMMC in SDR mode, for safety sake, it is better to clear it too.
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit f355f117a6d735b0c3cba79f1cb24829cf8cae25)
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When booting in eMMC fast boot, the uboot v2013.04 always hangs.
The root cause is that MMC host does not exit from boot mode after
bootrom loading image. So the first command 'CMD0' sent
in uboot will pull down the CMD line to low and cause errors.
This patch cleans the MMC boot register in "mmc_init" to put the
MMC host back to normal mode.
Signed-off-by: Ye Li <b37916@freescale.com>
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
(cherry picked from commit cf77f982b9969eda4cb5af2a78d3d40e17290756)
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From temp sensor guys:
"
I confirmed the math with him(had do the accuracy study) today.
The new, final equation is:
Tmeas = (Nmeas - n1) / slope + t1 + offset
n1= fused room count
t1= 25
offset=3.580661
slope= 0.4148468 – 0.0015423*n1
"
87723f903454aaf17336e0fe9098ea7911c19f3c update the thermal with not
accurate slope parameters. This patch fix it.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
(cherry picked from commit 0d4904f5929cecd66f0b60cf8ebdcb0e6a2f733e)
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From IC guys:
"
After a thorough accuracy study of the Temp sense circuit,
we found that with our current equation, an average part can
read 7 degrees lower than a known forced temperature.
We also found out that the standard variance was around 2C;
which is the tightest distribution that we could create.
We need to change the temp sense equation to center the average
part around the target temperature.
Old Equation:
Temp = Troom,cal – slope*(Count measured – Count room fuse)
Where
Troom,cal = 25C and
Slope = 0.4297157 – (0.0015974 * Count room fuse)
New Equation:
Temp = Troom,cal – slope*(Count measured – Count room fuse) +offset
Where
Troom,cal = 25C and
Slope = 0.4445388 – (0.0016549 * Count room fuse)
Offset = 3.580661
"
According the new equation, update the thermal driver.
c1 and c2 changed to u64 type and update comments.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
(cherry picked from commit 87723f903454aaf17336e0fe9098ea7911c19f3c)
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Signed-off-by: Tom Rini <trini@konsulko.com>
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GPIO4_21 is the LAN8720 power pin, not the LAN8720 reset pin.
Fix that, so that we can have Ethernet functional again.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
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The stm_is_locked_sr() function is picked from Linux kernel. For reason
unknown, the 64bit data types used by the function and present in Linux
were replaced with 32bit unsigned ones, which causes trouble.
The testcase performed was done using ST M25P80 chip.
The command used was:
=> sf protect unlock 0 0x10000
The call chain starts in stm_unlock(), which calls stm_is_locked_sr()
with negative ofs argument. This works fine in Linux, where the "ofs"
is loff_t, which is signed long long, while this fails in U-Boot, where
"ofs" is u32 (unsigned int). Because of this signedness problem, the
expression past the return statement to be incorrectly evaluated to 1,
which in turn propagates back to stm_unlock() and results in -EINVAL.
The correction is very simple, just use the correctly sized data types
with correct signedness in the function to make it work as intended.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jteki@openedev.com>
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