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* rockchip: configs: correct partitions 'boot' sizeJacob Chen2016-11-25-1/+1
| | | | | | | It should be 112M, to make rootfs start at 0x40000 Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
* rockchip: Add support for veyron-minnie (ASUS Chromebook Flip)Simon Glass2016-11-25-1/+419
| | | | | | | | This adds support for the Asus Chromebook Flip, an RK3288-based clamshell device which can flip into 'tablet' mode. The device tree file comes from Linux v4.8. The SDRAM parameters are for 4GB Samsung LPDDR3. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: Add support for veyron-mickey (Chromebit)Simon Glass2016-11-25-1/+396
| | | | | | | | This adds support for the Asus Chromebit, and RK3288-based device designed to plug directly into an HDMI monitor. The device tree file comes from Linux v4.8. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: video: Avoid using u8 in the HDMI driverSimon Glass2016-11-25-15/+15
| | | | | | | | It makes not sense using u8 to hold a value on a 32-bit or 64-bit machine. It can only bloat the code by forcing the compiler to mask the value. Change it to uint. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: veyron: Adjust ARM clock after relocationSimon Glass2016-11-25-0/+44
| | | | | | | | Update board_init() to increase the ARM clock to the maximum speed on veyron boards. This makes quite a large difference in performance. With this change, speed goes from about 750 DMIPS to 2720 DMIPs. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: clk: Support setting ACLKSimon Glass2016-11-25-0/+7
| | | | | | | | Add basic support for setting the ARM clock, since this allows us to run at maximum speed in U-Boot. Currently only a single speed is supported (1.8GHz). Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: Move jerry SDRAM settings into its own .dts fileSimon Glass2016-11-25-8/+11
| | | | | | | The SDRAM settings are not common across all veyron models. Move the current settings into Jerry's file. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: veyron: Add a note about the SDRAM voltageSimon Glass2016-11-25-0/+6
| | | | | | | Add a comment to indicate that we are not supporting the PWM regulator yet. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: Rename jerry files to veyronSimon Glass2016-11-25-8/+8
| | | | | | | | | | | At present we have a single rk3288-based Chromebook: chromebook_jerry. But all such Chromebooks can use the same binary with only device-tree differences. The family name is 'veyron', so rename the files accordingly. Also update the device-tree filename since this currently differs from Linux. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: Move jerry to use of-platdataSimon Glass2016-11-25-4/+4
| | | | | | | Adjust jerry to use of-platdata like other rk3288 boards. This reduces the SPL size enough that it boots again. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: video: Check for device in useSimon Glass2016-11-25-5/+11
| | | | | | | | | | Check whether a display device is in use before using it. Add a comment as to why two displays cannot currently be used at the same time. This allows us to remove the device-tree change that disables vopb on jerry. Signed-off-by: Simon Glass <sjg@chromium.org>
* video: Track whether a display is in useSimon Glass2016-11-25-1/+27
| | | | | | | Mark a display as in use when display_enable() is called. This can avoid a display being used by multiple video-output devices. Signed-off-by: Simon Glass <sjg@chromium.org>
* video: Use cache-alignment in video_sync()Simon Glass2016-11-25-1/+2
| | | | | | | | Sometimes the frame buffer is not a multiple of the cache line size. Adjust the cache-flushing code to avoid cache warnings/errors in this case. Signed-off-by: Simon Glass <sjg@chromium.org>
* spi: Add a debug() on bind failureSimon Glass2016-11-25-1/+4
| | | | | | | This is an uncommon error but we may as well have a debug() message when it happens. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: spi: Honour the deactivation delaySimon Glass2016-11-25-0/+8
| | | | | | | This is not currently implemented. Add support for this so that the Chrome OS EC can be used on jerry. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: spi: Add support for of-platdataSimon Glass2016-11-25-1/+35
| | | | | | Allow this driver to be used with of-platdata on rk3288. Signed-off-by: Simon Glass <sjg@chromium.org>
* spi: Add of-platdata support to SPI and SPI flashSimon Glass2016-11-25-2/+13
| | | | | | | Some boards may want to use these subsystems with of-platdata in SPL. Add support for this by avoiding any device tree access in this case. Signed-off-by: Simon Glass <sjg@chromium.org>
* stdio: Correct numbering logic in stdio_probe_device()Simon Glass2016-11-25-2/+3
| | | | | | | | | | | The current code assumes that the devices are ordered corresponding to their alias value. But (for example) video1 can come before video0 in the device tree. Correct this, by always looking for device 0 first. After that we can fall back to finding the first available device. Signed-off-by: Simon Glass <sjg@chromium.org>
* stdio: Correct code style nitsSimon Glass2016-11-25-2/+2
| | | | | | Fix a few code style nits in stdio_get_by_name(). Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: Allow jerry to use of-platdataSimon Glass2016-11-25-0/+2
| | | | | | | This board always boots from SPI, so update the code to support that with of-platdata. The boot source is not currently available with of-platdata. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: video: Correct VOP clock selectionSimon Glass2016-11-25-6/+1
| | | | | | | | This code incorrectly uses the oscillator. It should use the clock selected in the device tree. Signed-off-by: Simon Glass <sjg@chromium.org> Fixes: 135aa95 (clk: convert API to match reset/mailbox style)
* rockchip: video: Correct HDMI data source selectionSimon Glass2016-11-25-1/+2
| | | | | | | | | | This code currently always selects the second source. It only worked because both sources are set up. With the change to only init video devices that are present in the stdout environment variable, this fails. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org>
* dts: arm: rk3036: add usb vbus nodeKever Yang2016-11-25-4/+33
| | | | | | | add fix regulator node for usb vbus power control. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
* config: rk3036: enable fix regulatorKever Yang2016-11-25-0/+1
| | | | | | | usb host vbus power is using gpio fix regulator, enable it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
* config: rk3036: enable configs for USB HOSTKever Yang2016-11-25-0/+10
| | | | | | | rk3036 using dwc2 usb controller, need enable relate configs for it. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
* config: evb-rk3399: enable PWM_ROCKCHIPKever Yang2016-11-25-0/+1
| | | | | | | | PWM_ROCKCHIP need to enable for PWM regulator, this config is missing during rebase and new patch set in previous submission. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
* evb-rk3399: deduced the dram node size when space reservedKever Yang2016-11-25-1/+1
| | | | | | | The size dram node need to be deduced by the same amount of reserved space. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
* arm: rockchip: Fix typo in ROCKCHIP_RK3288 helpAndreas Färber2016-11-25-1/+1
| | | | | | | UART,s -> UARTs, to avoid this spreading via copy&paste. Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Simon Glass <sjg@chromium.org>
* arm: dts: Fix Rockchip sort orderAndreas Färber2016-11-25-1/+1
| | | | | | | Sort rk3036 before rk3288. Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Simon Glass <sjg@chromium.org>
* power: regulator: Add limits checking while setting currentKeerthy2016-11-25-0/+7
| | | | | | | | | | Currently the specific set ops functions are directly called without any check for min/max current limits for a regulator. Check for them and proceed. Signed-off-by: Keerthy <j-keerthy@ti.com> Fixed checking of current limits: Signed-off-by: Simon Glass <sjg@chromium.org>
* power: regulator: Add limits checking while setting voltageKeerthy2016-11-25-0/+7
| | | | | | | | | | | Currently the specific set ops functions are directly called without any check for voltage limits for a regulator. Check for them and proceed. Signed-off-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Fixed checking of voltate limits: Signed-off-by: Simon Glass <sjg@chromium.org>
* power: regulator: Introduce regulator_set_value_force functionKeerthy2016-11-25-1/+28
| | | | | | | | | In case we want to force a particular value on a regulator irrespective of the min/max constraints for testing purposes one can call regulator_set_value_force function. Signed-off-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* MAINTAINERS: SUNXI: Update maintainershipJagan Teki2016-11-22-2/+4
| | | | | | | Add Jagan and Maxime as Maintainers for SUNXI Signed-off-by: Jagan Teki <jagan@openedev.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2016-11-22-460/+409
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| * sf: Add support for MX66U51235F, MX66L1G45G, MT25QU02G, MT25QL02GRadu Bacrau2016-11-22-0/+4
| | | | | | | | | | | | | | | | | | | | | | This commit adds support for the Macronix MX66U51235F, MX66L1G45G and Micron MT25QU02G, MT25QL02G flash parts. Signed-off-by: Radu Bacrau <dumitru.bacrau@intel.com> Cc: Chin Liang See <clsee@altera.com> Cc: Radu Bacrau <radu.bacrau@gmail.com> [Update proper commit header and 80-line cut on body] Reviewed-by: Jagan Teki <jagan@openedev.com>
| * drivers: SPI: sunxi SPL: fix warningAndre Przywara2016-11-21-1/+2
| | | | | | | | | | | | | | | | | | Somehow an int returning function without a return statement sneaked in, fix it. Also fix some whitespace damage on the way. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
| * sf: Fix s25fs512s id tableJagan Teki2016-11-19-1/+1
| | | | | | | | | | | | | | | | | | s25fs512s and s25fl512s_256k have common id information till 5 bytes and 6th byte have different family id like FS and FL-S as 0x81 and 0x80. Reported-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Jagan Teki <jagan@openedev.com>
| * sf: dataflash: Minor cleanupsJagan Teki2016-11-19-23/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - fix single line comments - remove unneeded spaces - ascending order of include files - rename SPI DATAFLASH to dataflash - rename SPI DataFlash to dataflash - return NULL replaced with error code Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com>
| * sf: dataflash: Fix add_dataflash return logicJagan Teki2016-11-19-66/+61
| | | | | | | | | | | | | | | | | | | | | | | | This patch fixed the add_dataflash return logic, so-that it can handle both jedec and older chips same as Linux. Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com>
| * sf: dataflash: Move flash id detection into jedec_probeJagan Teki2016-11-19-9/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Flash id detection should be the first step to enumerate the connected flash on the board, once ie done checking with respective id codes locally in the driver all this should be part of jedec_probe instead of id detection and validated through flash_info{} table separatly. Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com>
| * sf: dataflash: Remove unneeded spi dataJagan Teki2016-11-19-5/+1
| | | | | | | | | | | | | | | | | | | | | | dataflash doesn't require options, memory_map from spi. Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Simon Glass <sjg@chromium.org> Cc: York Sun <york.sun@nxp.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com>
| * spi: Remove dual flash options/flagsJagan Teki2016-11-19-15/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Dual flash code in spi are usually take the spi controller to work with dual connected flash devices. Usually these dual connection operation's are referred to flash controller protocol rather with spi controller protocol, these are still present in flash side for the usage of spi-nor controllers. So, this patch remove the dual_flash options or flags in sf which are triggered from spi controller side. Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com>
| * sf: Rename few local functionsJagan Teki2016-11-18-13/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | spi_flash_write_bar-> write_bar spi_flash_write_bar -> read_bar spi_flash_cmd_wait_ready -> spi_flash_wait_till_ready Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com>
| * sf: ids: Use small letter in ext_jedecJagan Teki2016-11-18-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Use small 'd' in s25s512s ext_jedec Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
| * sf: ids: Use small letter's with flash nameJagan Teki2016-11-18-110/+110
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For readability use small letter's with flash name. Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
| * sf: Rename sf_params.c to spi_flash_ids.cJagan Teki2016-11-18-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now the flash params table as renamed to spi_flash_ids structure, so rename the sf_params.c to spi_flash_ids.c and remove the legacy. Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
| * sf: Remove non-meaningful commentsJagan Teki2016-11-18-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove unneeded/non-meaningful commit message on params and flash. Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
| * sf: Remove spansion_s25fss_disable_4KB_eraseJagan Teki2016-11-18-86/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In spansion S25FS-S family the physical sectors are grouped as normal and parameter sectors. Parameter sectors are 4kB in size with 8 set located at the bottom or top address of a device. Normal sectors are similar to other flash family with sizes of 64kB or 32 kB. To erase whole flash using sector erase(D8h or DCh) won't effect the parameter sectors, so in order to erase these we must use 4K sector erase commands (20h or 21h) separately. So better to erase the whole flash using 4K sector erase instead of detecting these family parts again and do two different erase operations. For this: - Removed spansion_s25fss_disable_4KB_erase code - Add SECT_4K for S25FS512S chip Cc: Yunhui Cui <yunhui.cui@nxp.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@openedev.com>
| * sf: params: Add S25FS256S_64K spi flash supportJagan Teki2016-11-18-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add Spansion S25FS256S_64K spi flash to the list of spi_flash_ids. In spansion S25FS-S family the physical sectors are grouped as normal and parameter sectors. Parameter sectors are 4kB in size with 8 set located at the bottom or top address of a device. Normal sectors are similar to other flash family with sizes of 64kB or 32 kB. To erase whole flash using sector erase(D8h or DCh) won't effect the parameter sectors, so in order to erase these we must use 4K sector erase commands (20h or 21h) separately. So better to erase the whole flash using 4K sector erase instead of detecting these family parts again and do two different erase operations. Cc: Yunhui Cui <yunhui.cui@nxp.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com>
| * sf: Add INFO6 flash_info macroJagan Teki2016-11-18-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | INFO6 is for tabulating 6 byte flash parts, Ex: S25FS256S_64K Cc: Bin Meng <bmeng.cn@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Vignesh R <vigneshr@ti.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Jagan Teki <jagan@openedev.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com> Tested-by: Jagan Teki <jagan@openedev.com>
generated by cgit v1.1 at 2024-11-07 14:29:33 +0000