| Commit message (Collapse) | Author | Age | Lines |
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This patch removes compile errors introduced by
commit 9813b750f32c0056f0a35813b9a9ec0f68b664af
'fs/fat: Fix FAT detection to support non-DOS partition tables'
fat_write.c: In function 'disk_write':
fat_write.c:54: error: 'part_offset' undeclared (first use in this function)
fat_write.c:54: error: (Each undeclared identifier is reported only once
fat_write.c:54: error: for each function it appears in.)
fat_write.c: In function 'do_fat_write':
fat_write.c:950: error: 'part_size' undeclared (first use in this function)
These errors only appear when this code is enabled by
defining CONFIG_FAT_WRITE option.
This patch was originally part of
http://article.gmane.org/gmane.comp.boot-loaders.u-boot/121847
Signed-off-by: Donggeun Kim <dg77.kim@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Maximilian Schwerin <mvs@tigris.de>
Fixed patch author and added all needed SoB from the original patch
and also submitter's SoB. Extended commit log.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
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Since commit 96f5c4b the needed functions (get_ticks() and get_tbclk() )
are defined for kirkwood CPUs as well. This warning is then not relevant
anymore.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
cc: Holger Brunck <holger.brunck@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
cc: Albert Aribaud <albert.u.boot@aribaud.net>
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* 'master' of git://git.denx.de/u-boot-arm: (146 commits)
arm: Use common .lds file where possible
arm: add a common .lds link script
arm: Remove unneeded setting of LDCSRIPT
Define CPUDIR for the .lds link script
arm: Remove zipitz2 link script
Allow arch directory to contain .lds without requiring Makefile
OMAP: Remove omap1610inn-based boards
arch/arm/cpu/armv7/omap-common/clocks-common.c: Fix build warnings
board/ti/beagle/beagle.c: Fix build warnings
sdrc.c: Fix typo in do_sdrc_init() for SPL
tegra: i2c: Add I2C driver
tegra: fdt: i2c: Add extra I2C bindings for U-Boot
tegra: i2c: Select I2C ordering for Seaboard
tegra: i2c: Enable I2C on Seaboard
tegra: i2c: Select number of controllers for Tegra2 boards
tegra: i2c: Initialise I2C on Nvidia boards
tegra: Enhance clock support to handle 16-bit clock divisors
fdt: Add function to allow aliases to refer to multiple nodes
tegra: Rename NV_PA_PMC_BASE to TEGRA2_PMC_BASE
tegra: fdt: Enable FDT support for Ventana
tegra: fdt: Enable FDT support for Seaboard
tegra: usb: Enable USB on Seaboard
tegra: usb: Add common USB defines for tegra2 boards
tegra: usb: Add USB support to nvidia boards
arm: Check for valid FDT after console is up
fdt: Avoid early panic() when there is no FDT present
tegra: usb: Add support for Tegra USB peripheral
tegra: fdt: Add function to return peripheral/clock ID
usb: Add support for txfifo threshold
tegra: usb: fdt: Add USB definitions for Tegra2 Seaboard
tegra: usb: fdt: Add additional device tree definitions for USB ports
tegra: fdt: Add clock bindings for Tegra2 Seaboard
tegra: fdt: Add clock bindings
tegra: fdt: Add additional USB binding
fdt: Add tegra-usb bindings file from linux
fdt: Add staging area for device tree binding documentation
tegra: fdt: Add device tree file for Tegra2 Seaboard from kernel
tegra: fdt: Add Tegra2x device tree file from kernel
arm: fdt: Add skeleton device tree file from kernel
fdt: Add basic support for decoding GPIO definitions
fdt: Add functions to access phandles, arrays and bools
fdt: Tidy up a few fdtdec problems
fdt: Add tests for fdtdec
fdt: Add fdtdec_find_aliases() to deal with alias nodes
arm: Tegra2: Fix ELDK42 gcc failure with inline asm stack pointer load
net: fec_mxc: allow use with cache enabled
net: force PKTALIGN to ARCH_DMA_MINALIGN
i.MX28: Enable caches by default
i.MX28: Make use of the bounce buffer
i.MX28: Do data transfers via DMA in MMC driver
MMC: Implement generic bounce buffer
i.MX28: Add cache support to MXS NAND driver
i.MX28: Add cache support into the APBH DMA driver
ARM926EJS: Implement cache operations
board/vpac270/onenand.c: Fix build errors
nhk8815: fix build errors
atmel-boards: add missing atmel_mci.h
ARM: highbank: setup env from boot source register
ARM: highbank: change env config to use nvram
ARM: highbank: add reset support
ARM: highbank: Add boot counter support
ARM: highbank: change TEXT_BASE to 0x8000
ARM: highbank: fix us_to_tick calculation
ARM: highbank: add missing get_tbclk
ARM: highbank: fix warning for calxedaxgmac_initialize
net: calxedaxgmac: fix build due to missing __aligned definition
EXYNOS: Add structure for Exynos4 DMC
EXYNOS: SMDK5250: Support all 4 UARTs
ARM: fix s3c2410 timer code
ARM: davinci: fixes for cam_enc_4xx board
omap3_spi: receive transmit mode
calimain, enbw_cmc: Fix typo in comments
Davinci: ea20: use gpio framework to access gpios
OMAP3: mt_ventoux: sets its own mtdparts
OMAP3: mt_ventoux: updated timing for FPGA
twl4030: fix potential power supply handling issues
NAND: TI: fix warnings in omap_gpmc.c
cam_enc_4xx: Rename 'images' to 'imgs'
arm: Add Prep subcommand support to bootm
OMAP3: twister: add support to boot Linux from SPL
SPL: call cleanup_before_linux() before booting Linux
OMAP3: SPL: do not call I2C init if no I2C is set.
Add cache functions to SPL for armv7
devkit8000: Implement and activate direct OS boot
omap/spl: change output of spl_parse_image_header
omap-common/spl: Add linux boot to SPL
devkit8000/spl: init GPMC for dm9000 in SPL
omap-common: Add NAND SPL linux booting
devkit8000: add config for spl command
Add cmd_spl command
mx53ard: Initialize return code with error
mx53: Make PLL2 to be the parent of UART clock
configs: imx: Use CONFIG_SF_DEFAULT_CS
mx28evk: Provide default values for SPI bus and chip select
USB: ehci-mx6: Add proper IO accessors
mx6: Read silicon revision from register
i.MX28: Drop __naked function from spl_mem_init
mxs_spi: Return proper timeout error
i.MX28: Make the stabilization delays shorter
pmic_i2c: Return error in case of invalid pmic_i2c_tx_num
mx6: Remove duplicate definition of ANATOP_BASE_ADDR
mx6: Fix reset cause for Power On Reset case
i.MX6: mx6qsabrelite: add MACH_TYPE_MX6Q_SABRELITE
i.MX6: mx6q_sabrelite: add CONFIG_REVISION_TAG
i.MX28: Enable additional DRAM address bits
mx6q: mx6qsabrelite: setup_spi() should be called in board_init to allow use for environment
mx31: add "ARM11P power gating" to get_reset_cause
mx31pdk: Fix CONFIG_SYS_MEMTEST_END
efikamx: Fix CONFIG_SYS_MEMTEST_END
mx53smd: Fix CONFIG_SYS_MEMTEST_END
mx53evk: Fix CONFIG_SYS_MEMTEST_END
mx51evk: Fix CONFIG_SYS_MEMTEST_END
i.MX6: mx6qsabrelite: add ext2 support
imximage: Remove overwriting of flash_offset
IXP: Fix GPIO_INT_ACT_LOW_SET()
IXP: Fix NAND build warning on PDNB3 and SCPU
IXP: Move PDNB3 and SCPU from Makefile to boards.cfg
IXP: Squash warnings in IXP NPE
IXP: Fix missing MACH_TYPE_{ACTUX?,PNB3,DVLHOST}
IXP: Make IXP buildable with arm-linux- toolchains
Examples: Properly append LDFLAGS to LD command
SPL: Enable YMODEM support on BeagleBone and AM335x EVM
SPL: Add YMODEM over UART load support
SPL: Add README.omap3
README: document more SPL config options
spl.c: Use __noreturn decorator
config.mk: Check for -fstack-usage support
config.mk: Make cc-option create a file under include/generated
...
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Each cpu directory currently has its own .lds file. This is only needed
in most cases because the start.o file is in a different subdir.
Now that we can factor out this difference, we can move most cpus over
to the common .lds file.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Most ARM CPUs use a very similar link script. This adds a basic
script that can be used by most CPUs.
Two new symbols are introduced which are intended to eventually be
defined on all architectures to make things easier for generic relocation
and reduce special-case code for each architecture:
__image_copy_start is the start of the text area (equivalent to the
existing _start on ARM). It marks the start of the region which must be
copied to a new location during relocation. This symbol is called
__text_start on x86 and microblaze.
__image_copy_end is the end of the region which must be copied to a new
location during relocation. It is normally equal to the start of the BSS
region, but this can vary in some cases (SPL?). Making this an explicit
symbol on its own removes any ambiguity and permits common code to always
do the right thing.
This new script makes use of CPUDIR, now defined by both Makefile and
spl/Makefile, to find the directory containing the start.o object file,
which is always placed first in the image.
To permit MMU setup prior to relocation (as used by pxa) we add an area
to the link script which contains space for this. This is taken
from commit 7f4cfcf. CPUs can put the contents in there using their
start.S file. BTW, shouldn't that area be 16KB-aligned?
Signed-off-by: Simon Glass <sjg@chromium.org>
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This is set by the top level Makefile anyway, so drop it. This does
have the effect of changing the order - now the board link script will
have preference over the CPU one. But this seems more correct anyway.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Most link scripts differ only in the directory containing the start.o
file. Make this a #define to remove this last difference.
(Note that if start.o were disallowed outside the CPU start directory then
we wouldn't even need this. But that is a separate discussion.)
Signed-off-by: Simon Glass <sjg@chromium.org>
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This link script doesn't appear to do anything useful or unique, so
drop it, and rely on the CPU one.
Signed-off-by: Simon Glass <sjg@chromium.org>
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The Makefile for a CPU is in arch/($ARCH)/cpu/$(CPU). We want to support
having an .lds file in arch/$(ARCH)/cpu without requiring an additional
Makefile there. This change makes it clear that we expect a Makefile in
the same directory as the link script except in this case.
Signed-off-by: Simon Glass <sjg@chromium.org>
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The CS_AUTOBOOT configurations have been broken for a long time.
Kshitij Gupta is no longer at TI making these broken and orphaned
boards, so remove.
Signed-off-by: Tom Rini <trini@ti.com>
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Fix:
clocks-common.c: In function 'setup_non_essential_dplls':
clocks-common.c:323:6: warning: variable 'sys_clk_khz' set but not used
[-Wunused-but-set-variable]
clocks-common.c: In function 'setup_non_essential_dplls':
clocks-common.c:323:6: warning: variable 'sys_clk_khz' set but not used
[-Wunused-but-set-variable]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Tom Rini <trini@ti.com>
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Fix:
beagle.c:257:13: warning: function declaration isn't a prototype
[-Wstrict-prototypes]
beagle.c:257:13: warning: function declaration isn't a prototype
[-Wstrict-prototypes]
Also make beagle_dvi_pup() checkpatch clean, fix:
ERROR: open brace '{' following function declarations go on the
next line
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Tom Rini <trini@ti.com>
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We need to setup CS0 and CS1 not CS0 and CS0 again.
Signed-off-by: Tom Rini <trini@ti.com>
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Add basic i2c driver for Tegra2 with 8- and 16-bit address support.
The driver requires CONFIG_OF_CONTROL to obtain its configuration
from the device tree.
(Simon Glass: sjg@chromium.org modified for upstream)
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Heiko Schocher <hs@denx.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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Add U-Boot's peripheral clock information to the Tegra20 device tree file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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Select the port ordering for I2C on Seaboard.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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This enables I2C on Seaboard.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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The Tegra 2x SOC has four ports, so define TEGRA_I2C_NUM_CONTROLLERS
in the shared config file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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This enables I2C on all Nvidia boards including Seaboard and
Harmony.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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I2C ports have a 16-bit clock divisor. Add code to handle this special
case so that I2C speeds below 150KHz are supported.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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Some devices can deal with multiple compatible properties. The devices
need to know which nodes to bind to which features. For example an
I2C driver which supports two different controller types will want to
know which type it is dealing with in each case.
The new fdtdec_add_aliases_for_id() function deals with this by allowing
the driver to search for additional compatible nodes for a different ID.
It can then detect the new ones and perform appropriate processing.
Another option considered was to return a tuple (node offset, compat id)
and have the function be passed a list of compatible IDs. This is more
overhead for the common case though. We may add such a function later if
more drivers in U-Boot require it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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Change this name to fit with the current convention in the Tegra
header file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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This switches Ventana over to use FDT for run-time config instead of
CONFIG options.
At present Ventana does not have its own device tree file - it just uses
the Seaboard one.
Signed-off-by: Tom Warren <twarren@nvidia.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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This switches Seaboard over to use FDT for run-time config instead of
CONFIG options. USB is the only user at present.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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Seaboard has a top port which is USB host or device, and a side port which
is host only.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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All Tegra2 boards should include tegra2-common. This adds the required
USB config to that file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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This adds basic USB support for port 0. The other port is not supported
yet.
Tegra2 (SeaBoard) # usb start
(Re)start USB...
USB: Register 10011 NbrPorts 1
USB EHCI 1.00
scanning bus for devices... 5 USB Device(s) found
scanning bus for storage devices... 1 Storage Device(s) found
Tegra2 (SeaBoard) # ext2load usb 0:3 10000000 /boot/vmlinuz
Loading file "/boot/vmlinuz" from usb device 0:3 (ROOT-A)
2932976 bytes read
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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When using CONFIG_OF_CONTROL, add a check that we have a valid FDT
and panic() if not. This must be done after the console is ready.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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CONFIG_OF_CONTROL requires a valid device tree. However, we cannot call
panic() before the console is set up since the message does not appear,
and we get a silent failure.
Remove the panic from fdtdec_check_fdt() and provide a new function to
prepare the fdt for use. This will be called after the console is ready.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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This adds basic support for the Tegra2 USB controller. Board files should
call board_usb_init() to set things up.
Configuration is performed through the FDT, with aliases used to set the
order of the ports, like this fragment:
aliases {
/* This defines the order of our USB ports */
usb0 = "/usb@0xc5008000";
usb1 = "/usb@0xc5000000";
};
drivers/usb/host files ONLY: Acked-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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A common requirement is to find the clock ID for a peripheral. This is the
second cell of the 'clocks' property (the first being the phandle itself).
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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CONFIG_USB_EHCI_TXFIFO_THRESH enables setting of the txfilltuning
field in the EHCI controller on reset.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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We set up two USB ports, one of which can be host or device.
For some reason the kernel version does enable both ports.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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This adds clock references to the USB part of the device tree for U-Boot,
and marks USB1 as supporting legacy mode (which we disable in the driver).
The USB timing information may vary between boards sometimes, but for
now we hard-code it in C. This is because all current T2x boards use
the same values, we will deal with T3x later and we first need to agree
on the format for this timing information in the fdt and may in fact
decide that it has no place there.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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Add the definition of the oscillator clock frequency and the 32KHz clock.
The latter is provided by a PMIC on I2C which we don't actually use at
present, but we expect this definition to be used in the kernel and want
to keep our .dts the same.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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This adds a basic binding for the oscillator and peripheral clocks. The
second cell is the clock number, defined as the bit number within the clock
enable register if the peripheral clock.
This uses the RFC clock bindings from Grant Likely so may change later:
https://lkml.org/lkml/2011/12/12/498
It is taken from Stephen Warren's patch here:
http://patchwork.ozlabs.org/patch/141359/
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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This adds a property to indicate a port which can switch between host and device
mode.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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This file is taken from the Linux mailing list.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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Add a directory to hold device tree binding files, to permit easy review
of this material in U-Boot patches.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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This was taken from commit b48c54e2 at:
git://git.kernel.org/pub/scm/linux/kernel/git/olof/tegra.git
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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This was taken from commit b48c54e2 at:
git://git.kernel.org/pub/scm/linux/kernel/git/olof/tegra.git
config.mk is updated to provide this file to boards through the
built-in mechanism:
/include/ ARCH_CPU_DTS
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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This was taken from commit b48c54e2 at:
git://git.kernel.org/pub/scm/linux/kernel/git/olof/tegra.git
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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This adds some support into fdtdec for reading GPIO definitions from
the fdt. We permit up to FDT_GPIO_MAX GPIOs in the system. Each GPIO
is of the form:
gpio-function-name = <phandle gpio_num flags>;
where:
phandle is a pointer to the GPIO node
gpio_num is the number of the GPIO (0 to 223)
flags is a flag, as follows:
bit meaning
0 0=polarity normal, 1=active low (inverted)
An example is:
enable-propounder-gpios = <&gpio 43 0>;
which means that GPIO 43 is used to enable the propounder (setting the
GPIO high), or that you can detect that the propounder is enabled by
checking if the GPIO is high (the fdt does not indicate input/output).
Two main functions are provided:
fdtdec_decode_gpio() reads a GPIO property from an fdt node and decodes it
into a structure.
fdtdec_setup_gpio() sets up the GPIO by calling gpio_request for you.
Both functions can cope with the property being missing, which is taken to
mean that that GPIO function is not available or is not needed.
[For reference, from Stephen Warren <swarren@nvidia.com>. It may be that
we add this extra complexity later if needed:
The correct way to parse such a GPIO property in general is:
* Read the first cell.
* Find the node referenced by the phandle (the controller).
* Ensure property gpio-controller is present in the controller node.
* Read property #gpio-cells from the controller node.
* Extract #gpio-cells from the original property.
* Keep processing more cells from the original property; there may be
multiple GPIOs listed.
According to the binding documentation in the Linux kernel, Samsung
Exynos4 doesn't use this format, and while all other chips do have a
flags cell, about 50% of the controllers indicate the cell is unused.
]
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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Add a function to look up a property which is a phandle in a node, and
another to read a fixed-length integer array from an fdt property.
Also add a function to read boolean properties, although there is no
actual boolean type in U-Boot.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Gerald Van Baren <vanbaren@cideas.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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This fixes five trivial issues in fdtdec.c:
1. fdtdec_get_is_enabled() doesn't really need a default value
2. The fdt must be word-aligned, since otherwise it will fail on ARM
3. The compat_names[] array is missing its first element. This is needed
only because the first fdt_compat_id is defined to be invalid.
4. Added a header prototype for fdtdec_next_compatible()
5. Change fdtdec_next_alias() to only increment its 'upto' parameter
on success, to make the display error messages in the caller easier.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Gerald Van Baren <vanbaren@cideas.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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The fdtdec_find_aliases_for_id() function is complicated enough that
it really should have some tests. This does not necessarily need to be
committed to U-Boot, but it might be useful.
(note there are a few minor inconsistencies with this patch which will be
cleaned up when the USB series is applied)
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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Stephen Warren pointed out that we should use nodes whether or not they
have an alias in the /aliases section. The aliases section specifies the
order so far as it can, but is not essential. Operating without alisses
is useful when the enumerated order of nodes does not matter (admittedly
rare in U-Boot).
This is considerably more complex, and it is important to keep this
complexity out of driver code. This patch creates a function
fdtdec_find_aliases() which returns an ordered list of node offsets
for a particular compatible ID, taking account of alias nodes.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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The 4.2.2 gcc in the ELDK42 release doesn't like the direct SP
load using a constant in tegra2_start. Change it to use a load
thru another reg using mov sp, %0 : : "r"(CONST).
Tested on my Seaboard T20-A03, U-Boot loads and runs OK. Also
compiled all tegra2 builds with both gcc 4.2.2 and 4.4.1 OK.
Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
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Ensure that transmit and receive buffers are cache-line aligned.
Invalidate cache for each packet as received, update receive buffer
descriptors one cache line at a time, flush cache before transmitting.
Original patch by Marek:
http://lists.denx.de/pipermail/u-boot/2012-February/117695.html
Signed-off-by: Eric Nelson <eric.nelson at boundarydevices.com>
Acked-by: Marek Vasut <marex@denx.de>
Tested-by: Marek Vasut <marex@denx.de>
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This will prevent the need for architectures whose DMA alignment
is greater than 32 to have bounce buffers.
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
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