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* Blackfin: dont generate ldrs with --forceMike Frysinger2009-01-28-1/+1
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: pass --bmode/--initcode when creating ldrMike Frysinger2009-01-28-0/+4
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: minimize time cache is turned off when replacing cplb entriesMike Frysinger2009-01-28-22/+9
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: split cache handling out of dma_memcpy()Mike Frysinger2009-01-28-8/+17
| | | | | | | Creating a new dma_memcpy() function that skips all cache checks allows us to use the function in very early init where the cache is not yet setup. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: abort dma_memcpy() for L1 scratchpadMike Frysinger2009-01-28-1/+12
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: rename bootm.c to boot.cMike Frysinger2009-01-28-2/+2
| | | | | | | The boot file contains functions for more than just "bootm", so rename it accordingly. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: set more sane default board config valuesMike Frysinger2009-01-28-6/+71
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: convert CMD_LINE_ADDR to CONFIG_LINUX_CMDLINE_{ADDR,SIZE}Mike Frysinger2009-01-28-5/+8
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: add bit defines for DDR partsMike Frysinger2009-01-28-1/+20
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: add defines to describe active bootrom behaviorMike Frysinger2009-01-28-0/+11
| | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* mpc83xx: fix undefined reference to `flush_cache' error in simpc8313 buildKim Phillips2009-01-28-1/+5
| | | | | | | | | | | | | | extend commit c70564e6b1bd08f3230182392238907f3531a87e "NAND: Fix cache and memory inconsistency issue" to add the cache.o dependency to the simpc8313 build and fix this: ...Large Page NAND...Configuring for SIMPC8313 board... nand_boot_fsl_elbc.o: In function `nand_boot': nand_spl/board/sheldon/simpc8313/nand_boot_fsl_elbc.c:150: undefined reference to `flush_cache' make[1]: *** [/home/r1aaha/git/u-boot-mpc83xx/nand_spl/u-boot-spl] Error 1 make: *** [nand_spl] Error 2 Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* mpc8536ds.c: include sata.h to for needed function prototypesWolfgang Denk2009-01-28-0/+1
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Command usage cleanupPeter Tyser2009-01-28-352/+361
| | | | | | | | Remove command name from all command "usage" fields and update common/command.c to display "name - usage" instead of just "usage". Also remove newlines from command usage fields. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* amcc: Clean up command usage outputPeter Tyser2009-01-28-9/+9
| | | | | | | Update taihu and taishan commands to use cmd_usage() function to display usage messages. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* Standardize command usage messages with cmd_usage()Peter Tyser2009-01-28-206/+213
| | | | Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* pcs440ep: Clean up led command definitionPeter Tyser2009-01-28-1/+1
| | | | | | | The pcs440ep's led command usage formatting is non-standard. It was made standard in preparation for larger command usage updates. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* Clean up diufb command definitionsPeter Tyser2009-01-28-2/+2
| | | | | | | The diufb command usage formatting is non-standard. It was made standard in preparation for larger command usage updates. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* Update CHANGELOG, tiny coding style cleanup.Wolfgang Denk2009-01-28-1/+1228
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* SATA: do not auto-initialize during bootMike Frysinger2009-01-27-24/+15
| | | | | | | | | | | | Rather than have the board code initialize SATA automatically during boot, make the user manually run "sata init". This brings the SATA subsystem in line with common U-Boot policy. Rather than having a dedicated weak function "is_sata_supported", people can override sata_initialize() to do their weird board stuff. Then they can call the actual __sata_initialize(). Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* part_efi: Fix partition size calculation due to inclusive ending LBA.Richard Retanubun2009-01-27-1/+3
| | | | | | | | | | The ending LBA is inclusive. Hence, the partition size should be ((ending-LBA + 1) - starting-LBA) to get the proper partition size. This is confirmed against the results from the parted tool. (e.g. use parted /dev/sda -s unit S print) and observe the size. Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
* jffs2: Fix zero sector_size when not using CONFIG_JFFS2_CMDLINETomasz Figa2009-01-27-0/+92
| | | | | | | | | | | | | | | | This patch fixes a bug (?) introduced after inclusion of the new JFFS2 code. When not using CONFIG_JFFS2_CMDLINE, the code in cmd_jffs2.c doesn't fill in part->sector_size (keeping it as 0), but a correct value is needed by the code in jffs2_1pass.c. This causes all JFFS2 accesses to be in the same place of the memory, what obviously means impossibility to use the JFFS2 partition. This problem is fixed in this patch by including sector size calculation in non-CONFIG_JFFS2_CMDLINE mtdparts_init variant. Signed-off-by: Tomasz Figa <tomasz.figa_at_gmail.com>
* saveenv: standardize enablementMike Frysinger2009-01-27-18/+8
| | | | | | | | Rather than special casing each environment type for enabling the saveenv command, have them all behave the same. This avoids bitrot as new env sources are added/removed. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* soft_i2c.c add option for repeated start in i2c_read()Andrew Dyer2009-01-27-1/+20
| | | | | | | | | | | | | | | | This patch adds a #define to optionally change the behaviour of i2c_read() in soft_i2c.c to send an I2C repeated start instead of a stop-start between sending the device address pointer write and reading back the data. The current behaviour is retained as the default. While most devices will work either way, I have a smart battery(*) that requires repeated start, and someone at some point found a device that required a stop-start. (*) http://www.inspired-energy.com/Standard_Products/NL2054/NL2054%20Rev1.0%20Data%20Sheet.pdf Signed-off-by: Andrew Dyer <adyer@righthandtech.com>
* {delta,zylonite}/lowlevel_init.S: fix typoWolfgang Denk2009-01-27-2/+2
| | | | | | | | | | | Commit 9d803d8c mistakenly changed some constants from 0x300 into 300 - this patch fixes it. Pointed out by Tom Evans <tom@ceos.com.au>, see http://article.gmane.org/gmane.comp.boot-loaders.u-boot/51992 for details. Signed-off-by: Wolfgang Denk <wd@denx.de>
* drivers/net/e1000.c: missing terminator for supported devicesStefan Althoefer2009-01-27-0/+1
| | | | Signed-off-by: Stefan Althoefer <stefan.althoefer@web.de>
* fat.c: fix warning: array subscript is above array boundsWolfgang Denk2009-01-27-3/+7
| | | | | | Fix based on suggestion by David Hawkins <dwh@ovro.caltech.edu>. Signed-off-by: Wolfgang Denk <wd@denx.de>
* Fix gunzip in case of insufficient output bufferMatthias Fuchs2009-01-27-2/+3
| | | | | | | | | | | | | | U-Boot's gunzip() function does not handle the return code of zlib's inflate() function correctly. gunzip() is implemented to uncompress all input data in one run. So the correct return code for the good case is Z_STREAM_END. In case of insufficient output buffer memory inflate returns Z_OK. For gunzip() this is an error. It also makes sense to me to call inflateEnd() also in case of an error. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
* Merge branch 'master' of git://git.denx.de/u-boot-mipsWolfgang Denk2009-01-27-0/+4932
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| * MIPS: Add VCT board series support (Part 3/3)Stefan Roese2009-01-27-0/+1254
| | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
| * MIPS: Add VCT board series support (Part 2/3)Stefan Roese2009-01-27-0/+2387
| | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
| * MIPS: Add VCT board series support (Part 1/3)Stefan Roese2009-01-27-0/+1261
| | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
| * MIPS: Add flush_dcache_range() and invalidate_dcache_range()Stefan Roese2009-01-27-0/+30
| | | | | | | | | | | | | | | | | | | | This patch adds flush_/invalidate_dcache_range() to the MIPS architecture. Those functions are needed for the upcoming dcache support for the USB EHCI driver. I chose this API because those cache handling functions are already present in the PPC architecture. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
* | Merge branch 'master' of git://git.denx.de/u-boot-cfi-flashWolfgang Denk2009-01-27-10/+40
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| * | CFI: Add geometry reversal for STMicro M29W320ETRichard Retanubun2009-01-26-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Added flash_fixup_stm to fix geometry reversal on STMicro M29W320ET flash chip. Modeled after flash_fixup_amd, this patch handles the geometry reversal or erase sectors that exist for ST Micro (now Numonyx) M29W320ET flash. Since I cannot test all STM's chips, the detection is implemented as narrow as possible for now. Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | CFI: increase performance of function find_sector()Jens Gehrlein2009-01-26-7/+16
| | | | | | | | | | | | | | | | | | | | | Tested on TQM5200S-BD with Samsung K8P2815UQB Signed-off-by: Jens Gehrlein <sew_s@tqs.de> Signed-off-by: Stefan Roese <sr@denx.de>
| * | CFI: avoid redundant function call in single word programming modeJens Gehrlein2009-01-26-3/+7
| |/ | | | | | | | | | | | | | | | | The function find_sector() doesn't need to be called twice in the case of AMD command set. Tested on TQM5200S-BD with Samsung K8P2815UQB. Signed-off-by: Jens Gehrlein <sew_s@tqs.de> Signed-off-by: Stefan Roese <sr@denx.de>
* | ppc4xx: Remove compilation warning in gdppc440etc.cStefan Roese2009-01-26-2/+0
| | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
* | ppc4xx: Remove CONFIG_SYS_IGNORE_405_UART_ERRATA_59 from config filesMatthias Fuchs2009-01-26-24/+0
| | | | | | | | | | | | | | | | | | Lot's of 405 board config files use CONFIG_SYS_IGNORE_405_UART_ERRATA_59. Either they define or undef it. Because it's not used in any source files this patch removes any references to it. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com> Signed-off-by: Stefan Roese <sr@denx.de>
* | ppc4xx: Add GDsys PowerPC 440 ETX board support.Dirk Eibach2009-01-26-0/+838
| | | | | | | | | | | | | | | | Board support for the Guntermann & Drunck PowerPC 440 ETX module. Based on the AMCC Yosemite board support by Stefan Roese. Signed-off-by: Dirk Eibach <eibach@gdsys.de> Signed-off-by: Stefan Roese <sr@denx.de>
* | ppc4xx: Improve DDR autodetectDirk Eibach2009-01-26-5/+50
|/ | | | | | | | | Added support for a second memory bank to DDR autodetection for 440 platforms. Made hardcoded values configurable. Signed-off-by: Dirk Eibach <eibach@gdsys.de> Signed-off-by: Stefan Roese <sr@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2009-01-24-232/+595
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| * 85xx: Add a 36-bit physical configuration for MPC8572DSKumar Gala2009-01-23-2/+54
| | | | | | | | | | | | | | We move all IO addressed (CCSR, localbus, PCI) above the 4G boundary to allow for larger memory sizes. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * 85xx: Handle eLBC difference w/36-bit physicalKumar Gala2009-01-23-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | The eLBC only handles 32-bit physical address in systems with 36-bit physical. The previos generation of LBC handled 34-bit physical address in 36-bit systems. Added a new CONFIG option to convey the difference between the LBC and eLBC. Also added defines for XAM bits used in LBC for the extended 34-bit support. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * 85xx: Use BR_ADDR macro for NAND chipselectsKumar Gala2009-01-23-8/+8
| | | | | | | | | | | | | | | | | | Use the new BR_ADDR macro to properly setup the address field of the localbus chipselects used by NAND. This allows us to deal with 36-bit phys on these boards in the future. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * Add secondary CPUs processor frequency for e500 coreHaiying Wang2009-01-23-9/+29
| | | | | | | | | | | | | | | | | | This patch updates e500 freqProcessor to array based on CONFIG_NUM_CPUS, and prints each CPU's frequency separately. It also fixes up each CPU's frequency in "clock-frequency" of fdt blob. Signed-off-by: James Yang <James.Yang@freescale.com> Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
| * 85xx: enable the auto self refresh for wake up ARPDave Liu2009-01-23-0/+6
| | | | | | | | | | | | | | | | The wake up ARP feature need use the memory to process wake up packet, we enable auto self refresh to support it. Signed-off-by: Dave Liu <daveliu@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com>
| * fsl-ddr: use the 1T timing as default configurationDave Liu2009-01-23-1/+21
| | | | | | | | | | | | | | | | | | For light loaded system, we use the 1T timing to gain better memory performance, but for some heavily loaded system, you have to add the 2T timing options to board files. Signed-off-by: Dave Liu <daveliu@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com>
| * fsl-ddr: make the self refresh idle threshold configurableDave Liu2009-01-23-4/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | Some 85xx processors have the advanced power management feature, such as wake up ARP, that needs enable the automatic self refresh. If the DDR controller pass the SR_IT (self refresh idle threshold) idle cycles, it will automatically enter self refresh. However, anytime one transaction is issued to the DDR controller, it will reset the counter and exit self refresh state. Signed-off-by: Dave Liu <daveliu@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com>
| * fsl-ddr: clean up the ddr code for DDR3 controllerDave Liu2009-01-23-11/+16
| | | | | | | | | | | | | | | | - The DDR3 controller is expanding the bits for timing config - Add the DDR3 32-bit bus mode support Signed-off-by: Dave Liu <daveliu@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com>
| * fsl-ddr: update the bit mask for DDR3 controllerDave Liu2009-01-23-4/+8
| | | | | | | | | | | | | | | | According to the latest 8572 UM, the DDR3 controller is expanding the bit mask, and we use the extend ACTTOPRE mode when tRAS more than 19 MCLK. Signed-off-by: Dave Liu <daveliu@freescale.com>
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