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| * | ARM: tegra: fix clock_get_periph_rate() for UART clocksStephen Warren2016-09-27-2/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make clock_get_periph_rate() return the correct value for UART clocks. This change needs to be applied before the patches that enable CONFIG_CLK for Tegra SoCs before Tegra186, since enabling that option causes ns16550_serial_ofdata_to_platdata() to rely on clk_get_rate() for UART clocks, and clk_get_rate() eventually calls clock_get_periph_rate(). This change is a rather horrible hack, as explained in the comment added to the clock driver. I've tried fixing this correctly for all clocks as described in that comment, but there's too much fallout elsewhere. I believe the clock driver has a number of bugs which all cancel each-other out, and unravelling that chain is too complex at present. This change is the smallest change that fixes clock_get_periph_rate() for UART clocks while guaranteeing no change in behaviour for any other clock, which avoids other regressions. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | clock: implement a driver for the Tegra CARStephen Warren2016-09-27-0/+111
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement a clock uclass driver for the Tegra CAR. This allows clients to use standard clock APIs on Tegra. This device is intended to be instantiated by the core Tegra CAR driver, rather than being instantiated directly from DT. The implementation uses the existing custom Tegra- specific clock APIs to avoid coupling the series with significant refactoring of the existing Tegra clock/clock code. The driver currently only supports peripheral clocks, and avoids support for other clocks such as PLLs and external clocks. This should be sufficient to convert over all Tegra peripheral drivers, and avoids a complex implementation which calls different Tegra-specific clock APIs based on the type of clock being manipulated. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | reset: implement a driver for the Tegra CARStephen Warren2016-09-27-0/+80
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement a reset uclass driver for the Tegra CAR. This allows clients to use standard reset APIs on Tegra. This device is intended to be instantiated by the core Tegra CAR driver, rather than being instantiated directly from DT. The implementation uses the existing custom Tegra- specific reset APIs to avoid coupling the series with significant refactoring of the existing Tegra clock/reset code. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | misc: implement Tegra CAR core driverStephen Warren2016-09-27-0/+76
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Tegra CAR (Clock And Reset) module provides control of most clocks and reset signals within the Tegra SoC. This change implements a driver for this module. However, since the module implements multiple kinds of services (clocks, resets, perhaps more), all this driver does is bind various sub-devices, which in turn provide the real services. This driver is essentially an "MFD" (Multi-Function Device) in Linux kernel speak. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | ARM: tegra: add APIs the clock uclass driver will needStephen Warren2016-09-27-86/+323
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A future patch will implement a clock uclass driver for Tegra. That driver will call into Tegra's existing clock code to simplify the transition; this avoids tieing the clock uclass patches into significant refactoring of the existing custom clock API implementation. Some of the Tegra clock APIs that manipulate peripheral clocks require both the peripheral clock ID and parent clock ID to be passed in together. However, the clock uclass API does not require any such "parent" parameter, so the clock driver must determine this information itself. This patch implements new Tegra- specific clock API clock_get_periph_parent() for this purpose. The new API is implemented in the core Tegra clock code rather than SoC- specific clock code. The implementation uses various SoC-/clock-specific data. That data is only available in SoC-specific clock code. Consequently, two new internal APIs are added that enable the core clock code to retrieve this information from the SoC-specific clock code. Due to the structure of the Tegra clock code, this leads to some unfortunate code duplication. However, this situation predates this patch. Ideally, future work will de-duplicate the Tegra clock code, and migrate it into drivers/clk/tegra. However, such refactoring is kept separate from this series. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | ARM: tegra: add peripheral clock init tableStephen Warren2016-09-27-0/+134
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, Tegra peripheral drivers control two aspects of their HW module clock(s): 1) The clock enable/rate for the peripheral clock itself. 2) The system-level clock tree setup, i.e. the clock parent. Aspect 1 is reasonable, but aspect 2 is a system-level decision, not something that an individual peripheral driver should in general know about or influence. Such system-level knowledge ties the driver to a specific SoC implementation, even when they use generic APIs for clock manipulation, since they must have SoC-specific knowledge such as parent clock IDs. Limited exceptions exist, such as where peripheral HW is expected to dynamically switch between clock sources at run-time, such as CPU clock scaling or display clock conflict management in a multi-head scenario. This patch enhances the Tegra core code to perform system-level clock tree setup, in a similar fashion to the Linux kernel Tegra clock driver. This will allow future patches to simplify peripheral drivers by removing the clock parent setup logic. This change is required prior to converting peripheral drivers to use the standard clock APIs, since: 1) The clock uclass doesn't currently support a set_parent() operation. Adding one is possible, but not necessary at the moment. 2) The clock APIs retrieve all clock IDs from device tree, and the DT bindings for almost all peripherals only includes information about the relevant peripheral clocks, and not any potential parent clocks. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | ARM: tegra: pull Tegra210 SoC DT from Linux v4.7Stephen Warren2016-09-27-252/+880
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The primary benefit of this change is that it adds all missing clocks and resets properties to peripherals. This will allow peripheral drivers to migrate to the standard clock and reset APIs in the future. Main changes: * Brought in the correct Tegra210 CAR binding; the old file in U-Boot appears to be a renamed version of the Tegra124 bindings rather than the real Tegra210 version. * Conversion of SPI and UART nodes to standard DMA bindings. U-Boot doesn't use DMA so isn't affected. * Split of EHCI and USB PHY nodes. The EHCI nodes continue to contain all information required by U-Boot, so U-Boot is not affected. * Conversion of many magic numbers to named defines. * Addition of many nodes not used by U-Boot, including separation of the Tegra LIC (Legacy IRQ controller) and GIC. * Node sort order fixes. Remaining deltas relative to the Linux DT: * U-Boot has enabled PCIe for Tegra210, but the kernel hasn't yet. * The GPIO node compatible value in the kernel explicitly includes Tegra124 values whereas U-Boot does not. I'll send a kernel patch to correct this. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | ARM: tegra: pull Tegra124 SoC DT from Linux v4.7Stephen Warren2016-09-27-7/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The primary benefit of this change is that it adds all missing clocks and resets properties to peripherals. This will allow peripheral drivers to migrate to the standard clock and reset APIs in the future. Main changes: * USB phy_type property is aligned with the kernel, so board files are updated so the final DT content doesn't change. I'm not convinved that Nyan uses HSIC phy_type. However, I'd rather this change be a no-op, and any DT bug-fixes be separate. * Sync misc changes from the kernel: missing DT content, minor compatible value fixes, typos. Remaining deltas relative to the Linux DT: * U-Boot uses #address-cells/#size-cells of 1 whereas the kernel uses 2. I believe U-Boot's DT parsing currently assumes that these values match the physical address size, so I didn't synchronize this part of the DT. * U-Boot uses the original XUSB PHY DT binding, wherease the kernel DT has moved to a newer version. Thus, XUSB client nodes include properties names phys and phy-names that do not appear in the kernel, and don't include pad definitions in the padctl node. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | ARM: tegra: pull Tegra114 SoC DT from Linux v4.7Stephen Warren2016-09-27-131/+655
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The primary benefit of this change is that it adds all missing clocks and resets properties to peripherals. This will allow peripheral drivers to migrate to the standard clock and reset APIs in the future. Main changes: * Conversion of SPI nodes to standard DMA bindings. U-Boot doesn't use DMA so isn't affected. * Split of EHCI and USB PHY nodes. The EHCI nodes continue to contain all information required by U-Boot, so U-Boot is not affected. * Boards need to define the clk32k_in clock that feeds the Tegra PMC. * Addition of tegra114-mc.h since tegra114.dtsi now includes it. * Conversion of many magic numbers to named defines. * Addition of many nodes not used by U-Boot. * Node sort order fixes. Remaining deltas relative to the Linux DT: * USB node compatible values in U-Boot explicitly list Tegra114 values whereas the kernel does not. I'll send a kernel patch to correct this. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | ARM: tegra: pull Tegra30 SoC DT from Linux v4.7Stephen Warren2016-09-27-144/+783
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The primary benefit of this change is that it adds all missing clocks and resets properties to peripherals. This will allow peripheral drivers to migrate to the standard clock and reset APIs in the future. Main changes: * Modification of PCIe memory region addresses. The HW memory layout is programmable, so this should work fine, and Beaver PCIe was tested without issue. * Removal of pcie_xclk from the PCIe node and clock binding header. This clock doesn't exist and isn't used; only a reset with this ID exists. * Conversion of SPI nodes to standard DMA bindings. U-Boot doesn't use DMA so isn't affected. * Split of EHCI and USB PHY nodes. The EHCI nodes continue to contain all information required by U-Boot, so U-Boot is not affected. * Changed the phy_type value for the second USB port. This required board DTs to be updated to keep the same configuration. * Boards need to define the clk32k_in clock that feeds the Tegra PMC. * Addition of tegra30-mc.h since tegra30.dtsi now includes it. * Conversion of many magic numbers to named defines. * Addition of many nodes not used by U-Boot. * Node sort order fixes. Remaining deltas relative to the Linux DT: * None. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | ARM: tegra: pull Tegra20 SoC DT from Linux v4.7Stephen Warren2016-09-27-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This brings in a few minor fixes since the last sync. The largest change is the removal of the definition for TEGRA20_CLK_PCIE_XCLK. This clock doesn't actually exist. Remaining deltas: * Addition of u-boot,dm-pre-reloc property to a couple of nodes. * Addition of the NAND controller, which Linux doesn't yet support. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | ARM: tegra: remove "0, " from DT unit addressesStephen Warren2016-09-27-82/+82
| | | | | | | | | | | | | | | | | | | | | | | | | | | Apparently the unit address in a DT node name is now supposed to be a single integer value, rather than a comma-separated list of individual cell values. Fix the U-Boot DTs to comply with this naming convention. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | mmc: tegra: Add DM_MMC support to Tegra MMC driverTom Warren2016-09-27-243/+70
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Convert the Tegra MMC driver to DM_MMC. Support for non-DM is removed to avoid ifdefs in the code. DM_MMC is now enabled for all Tegra builds. Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Tom Warren <twarren@nvidia.com> (swarren, fixed some NULL pointer dereferences, removed extraneous changes, rebased on various other changes, removed non-DM support etc.) Signed-off-by: Stephen Warren <swarren@nvidia.com>
| * | ARM: tegra: set MMC pin mux in board_init()Stephen Warren2016-09-27-7/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | Most other pin mux is configured in this function. This removes the need to do it in an MMC-specific initialization function, which is good since that function is going away later in this series. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | mmc: tegra: priv struct and naming cleanupStephen Warren2016-09-27-157/+161
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | struct mmc_host is a Tegra-specific structure, but the name implies it's something defined by core MMC code, which is confusing. Rename it to struct tegra_mmc_priv to make its purpose more obvious. The new name is also more appropriate for a DM driver private data structure, which will be relevant later in this series. Nothing needs access to this type except the MMC driver itself. Move the definition into the driver C file. Make sure all Tegra MMC functions are named tegra_mmc_*. Even though they're all static, it's useful to have good naming so that symbol tables are easy to interpret. A few functions aren't renamed by this patch since they'll be deleted by a subsequent patch in this series. Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | mmc: tegra: don't use periph_id in pad_init_mmc()Stephen Warren2016-09-27-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MMC driver will soon be converted to use standard clock/reset APIs, and so the periph_id field in the MMC device priv struct will disappear. Rework the implementation of pad_init_mmc() to rely on this; using the device register address is a much more direct test anyway. Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | mmc: tegra: move pad_init_mmc() into MMC driverStephen Warren2016-09-27-36/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pad_init_mmc() is performing an SoC-specific operation, using registers within the MMC controller. There's no reason to implement this code outside the MMC driver, so move it inside the driver. Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | mmc: tegra: use correct alias for SDHCI/MMC nodesStephen Warren2016-09-27-53/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Tegra MMC driver currently honors "sdhci" entries in /aliases. The MMC core however uses "mmc" entries in /aliases. This difference will be relevant once the Tegra MMC driver is converted to DM, and the MMC core handles alias lookups. To avoid issues during that conversion, fix the Tegra MMC driver and all Tegra DTs to use the same alias name as the MMC core does. Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | ARM: tegra: fdt: Add 'non-removable' property to all eMMC nodesTom Warren2016-09-27-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | During debug of the DM_MMC changes to the Tegra MMC driver, I noticed that the 'removable' property wasn't being set correctly for the eMMC parts on most Tegra boards. Since the kernel DTS has this property set correctly, it should be in U-Boot's Tegra DT too. Signed-off-by: Tom Warren <twarren@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | ARM: tegra: increase console buffer size and sys args numBryan Wu2016-09-27-2/+3
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Linux-for-Tegra kernel uses a very long command line. The default value of CONFIG_SYS_CBSIZE is too small to printf out the long command line and causes a message like: bootarg overflow 602+0+0+1 > 512 on the console, and the board refuses to boot. The default value of CONFIG_SYS_MAXARGS is too small to add a long long command line, and the kernel won't boot without the complete bootargs. Increasing these two config options solves this problem. Signed-off-by: Bryan Wu <pengw@nvidia.com> Signed-off-by: Peter Chubb <Peter.Chubb@data61.csiro.au> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | Merge git://www.denx.de/git/u-boot-marvellTom Rini2016-09-27-29/+7087
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| * | arm64: mvebu: armada-7040-db.dts: Add I2C and SPI aliasesStefan Roese2016-09-27-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add I2C and SPI aliases to enable usage in U-Boot. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
| * | arm64: mvebu: Armada 7K/8K: Add COMPHY device tree nodesStefan Roese2016-09-27-0/+68
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the COMPHY device tree nodes that are still missing to the Armada 7K/8K dts files. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
| * | arm64: mvebu: armada-ap806.dtsi: Add clock-frequency to UART DT nodeStefan Roese2016-09-27-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The clock frequency needs to be provided in the DT. Otherwise the driver won't start in U-Boot. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
| * | arm64: mvebu: Add Armada 7K db-88f7040 development board supportStefan Roese2016-09-27-0/+352
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds basic support for the Marvell Armada 7K DB-88F7040 development board. Supported are the following interfaces: - UART - SPI (incl. SPI NOR) - I2C - USB - SATA / AHCI Support for other interfaces will follow. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
| * | arm64: mvebu: Add basic support for the Marvell Armada 7K/8K SoCStefan Roese2016-09-27-110/+216
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Compared to the Armada 3700, the Armada 7K and 8K are much more on the high-end side: they use a dual Cortex-A72 or a quad Cortex-A72, as opposed to the Cortex-A53 for the Armada 3700. The Armada 7K and 8K also use a fairly unique architecture, internally they are composed of several components: - One AP (Application Processor), which contains the processor itself and a few core hardware blocks. The AP used in the Armada 7K and 8K is called AP806, and is available in two configurations: dual Cortex-A72 and quad Cortex-A72. - One or two CP (Communication Processor), which contain most of the I/O interfaces (SATA, PCIe, Ethernet, etc.). The 7K family chips have one CP, while the 8K family chips integrate two CPs, providing two times the number of I/O interfaces available in the CP. The CP used in the 7K and 8K is called CP110. All in all, this gives the following combinations: - Armada 7020, which is a dual Cortex-A72 with one CP - Armada 7040, which is a quad Cortex-A72 with one CP - Armada 8020, which is a dual Cortex-A72 with two CPs - Armada 8040, which is a quad Cortex-A72 with two CPs This patch adds basic support for this ARMv8 based SoC into U-Boot. Future patches will integrate other device drivers and board support, starting with the Marvell DB-88F7040 development board. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
| * | arm64: mvebu: Armada 7K/8K: Add Armada 7K/8K dts filesStefan Roese2016-09-27-0/+743
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch integrates the Armada 7K/8K dts files from the latest submission on the linux-arm-kernel mailing list. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
| * | ahci: Make ahci_port_base() non-static to enable overwriteStefan Roese2016-09-27-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To allow a board- / platform-specific ahci_port_base() function, this patch removes "static inline" and adds __weak to this function. This will be used by the upcoming Armada 7K/8K SATA / AHCI support, which unfortunately needs a different port base address calculation. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
| * | usb: xhci-mvebu: Add Armada 8K to compatiblity listStefan Roese2016-09-27-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To enable this driver on Armada 7K/8K this patch adds the compatibility property to the list. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
| * | drivers/phy: Add Marvell SerDes / PHY drivers used on Armada 7K/8KStefan Roese2016-09-27-2/+1904
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This version is based on the Marvell U-Boot version with this patch applied as latest patch: Git ID 7f408573: "fix: comphy: cp110: add comphy initialization for usb device mode" from 2016-07-05. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
| * | arm64: mvebu: Add Armada 3700 db-88f3720 development board supportStefan Roese2016-09-27-0/+347
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds basic support for the Marvell Armada 3700 DB-88F3720 development board. Supported are the following interfaces: - UART - SPI (incl. SPI NOR) - I2C - Ethernet Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Wilson Ding <dingwei@marvell.com> Cc: Victor Gu <xigu@marvell.com> Cc: Hua Jing <jinghua@marvell.com> Cc: Terry Zhou <bjzhou@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Cc: Haim Boot <hayim@marvell.com>
| * | arm64: mvebu: Add support for the Marvell Armada 3700 SoCStefan Roese2016-09-27-12/+284
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Armada 3700 integrates the following interfaces (not complete list): - Dual Cortex-A53 ARMv8 - USB 3.0 - SATA 3.0 - PCIe 2.0 - 2 x Gigabit Ethernet 1Gbps / 2.5Gbps - ... This patch adds basic support for this ARMv8 based SoC into U-Boot. Future patches will integrate other device drivers and board support for the Marvell DB-88F3720 development board. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Wilson Ding <dingwei@marvell.com> Cc: Victor Gu <xigu@marvell.com> Cc: Hua Jing <jinghua@marvell.com> Cc: Terry Zhou <bjzhou@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Cc: Haim Boot <hayim@marvell.com>
| * | arm64: mvebu: Armada 3700: Add USB device tree nodesStefan Roese2016-09-27-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the USB device tree nodes that are still missing to the Armada 3700 dts files. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Wilson Ding <dingwei@marvell.com> Cc: Victor Gu <xigu@marvell.com> Cc: Hua Jing <jinghua@marvell.com> Cc: Terry Zhou <bjzhou@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Cc: Haim Boot <hayim@marvell.com>
| * | arm64: mvebu: Armada 3700: Add COMPHY device tree nodesStefan Roese2016-09-27-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the COMPHY device tree nodes that are still missing to the Armada 3700 dts files. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Wilson Ding <dingwei@marvell.com> Cc: Victor Gu <xigu@marvell.com> Cc: Hua Jing <jinghua@marvell.com> Cc: Terry Zhou <bjzhou@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Cc: Haim Boot <hayim@marvell.com>
| * | arm64: mvebu: Armada 3700: Add I2C device tree nodesStefan Roese2016-09-27-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the I2C device tree nodes that are still missing to the Armada 3700 dts files. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Wilson Ding <dingwei@marvell.com> Cc: Victor Gu <xigu@marvell.com> Cc: Hua Jing <jinghua@marvell.com> Cc: Terry Zhou <bjzhou@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Cc: Haim Boot <hayim@marvell.com>
| * | arm64: mvebu: Armada 3700: Add ethernet device tree nodesStefan Roese2016-09-27-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the ethernet device tree nodes that are still missing to the Armada 3700 dts files. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Wilson Ding <dingwei@marvell.com> Cc: Victor Gu <xigu@marvell.com> Cc: Hua Jing <jinghua@marvell.com> Cc: Terry Zhou <bjzhou@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Cc: Haim Boot <hayim@marvell.com>
| * | arm64: mvebu: Armada 3700: Add SPI device tree nodesStefan Roese2016-09-27-0/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the SPI device tree nodes that are still missing to the Armada 3700 dts files. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Wilson Ding <dingwei@marvell.com> Cc: Victor Gu <xigu@marvell.com> Cc: Hua Jing <jinghua@marvell.com> Cc: Terry Zhou <bjzhou@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Cc: Haim Boot <hayim@marvell.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
| * | arm64: mvebu: Armada 3700: Add Armada 37xx dts filesStefan Roese2016-09-27-0/+339
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch integrates the Armada 3700 dts files from the latest submission on the linux-arm-kernel mailing list. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Wilson Ding <dingwei@marvell.com> Cc: Victor Gu <xigu@marvell.com> Cc: Hua Jing <jinghua@marvell.com> Cc: Terry Zhou <bjzhou@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Cc: Haim Boot <hayim@marvell.com>
| * | drivers/phy: Add Marvell SerDes / PHY drivers used on Armada 3kStefan Roese2016-09-27-0/+2153
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This version is based on the Marvell U-Boot version with this patch applied as latest patch: Git ID 7f408573: "fix: comphy: cp110: add comphy initialization for usb device mode" from 2016-07-05. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Wilson Ding <dingwei@marvell.com> Cc: Victor Gu <xigu@marvell.com> Cc: Hua Jing <jinghua@marvell.com> Cc: Terry Zhou <bjzhou@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Cc: Haim Boot <hayim@marvell.com>
| * | usb: ehci: ehci-marvell.c: Add Armada 3700 support (ARMv8)Stefan Roese2016-09-27-7/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds DM based support for the Armada 3700 EHCI controller. The address windows don't need to get configured in this case. The difference here is detected via DT compatible property at runtime. With this support and the DM xHCI driver, both XHCI and eHCI can be used simultaniously on the MVEBU boards now. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Wilson Ding <dingwei@marvell.com> Cc: Victor Gu <xigu@marvell.com> Cc: Hua Jing <jinghua@marvell.com> Cc: Terry Zhou <bjzhou@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Cc: Haim Boot <hayim@marvell.com> Acked-by: Marek Vasut <marex@denx.de>
| * | usb: xhci: Add Marvell MVEBU xHCI supportStefan Roese2016-09-27-0/+106
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds DM based support for the xHCI USB 3.0 controller integrated in the Armada 3700 SoC. It may be extended to be used by other MVEBU SoCs as well. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Wilson Ding <dingwei@marvell.com> Cc: Victor Gu <xigu@marvell.com> Cc: Hua Jing <jinghua@marvell.com> Cc: Terry Zhou <bjzhou@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Cc: Haim Boot <hayim@marvell.com> Acked-by: Marek Vasut <marex@denx.de>
| * | net: mvneta: Add support for Armada 3700 SoCStefan Roese2016-09-27-1/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the Armada 3700 SoC to the Marvell mvneta network driver. Not like A380, in Armada3700, there are two layers of decode windows for GBE: First layer is: GbE Address window that resides inside the GBE unit, Second layer is: Fabric address window which is located in the NIC400 (South Fabric). To simplify the address decode configuration for Armada3700, we bypass the first layer of GBE decode window by setting the first window to 4GB. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Wilson Ding <dingwei@marvell.com> Cc: Victor Gu <xigu@marvell.com> Cc: Hua Jing <jinghua@marvell.com> Cc: Terry Zhou <bjzhou@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Cc: Haim Boot <hayim@marvell.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | net: mvneta: Make driver 64bit safeStefan Roese2016-09-27-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The mvneta driver is also used on the ARMv8 64bit Armada 3700 SoC. This patch fixes the compilation warnings seen on this 64bit platform. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Wilson Ding <dingwei@marvell.com> Cc: Victor Gu <xigu@marvell.com> Cc: Hua Jing <jinghua@marvell.com> Cc: Terry Zhou <bjzhou@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Cc: Haim Boot <hayim@marvell.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | spi: Add driver for Marvell Armada 3700 SoCStefan Roese2016-09-27-0/+303
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SPI IP core in the Marvell Armada 3700 is similar to the one in the other Armada SoCs. But the differences are big enough that it makes sense to introduce a new driver instead of cluttering the old kirkwood driver with #ifdef's. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Wilson Ding <dingwei@marvell.com> Cc: Victor Gu <xigu@marvell.com> Cc: Hua Jing <jinghua@marvell.com> Cc: Terry Zhou <bjzhou@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Cc: Haim Boot <hayim@marvell.com> Reviewed-by: Jagan Teki <jteki@openedev.com>
| * | serial: Add serial_mvebu_a3700 for Armada 3700 SoCStefan Roese2016-09-27-0/+191
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Armada 3700's UART is a simple serial port. It has a 32 bytes Tx FIFO and a 64 bytes Rx FIFO integrated. This patch adds support for this UART including the DEBUG UART functions for very early debug output. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Wilson Ding <dingwei@marvell.com> Cc: Victor Gu <xigu@marvell.com> Cc: Hua Jing <jinghua@marvell.com> Cc: Terry Zhou <bjzhou@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Cc: Haim Boot <hayim@marvell.com>
| * | net: mvneta: Round up top tx buffer boundaries for dcache opsStefan Roese2016-09-27-1/+2
| |/ | | | | | | | | | | | | | | | | | | | | | | check_cache_range() warns that the top boundaries are not properly aligned when flushing or invalidating the buffers and make these operations fail. This gets rid of the warnings: CACHE: Misaligned operation at range ... Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-ubiTom Rini2016-09-27-4/+11
|\ \
| * | cmd: ubi: add option to specify volume idLadislav Michl2016-09-27-4/+11
| |/ | | | | | | Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
* | dfu: Migrate to KconfigTom Rini2016-09-27-93/+179
| | | | | | | | | | | | | | | | | | | | | | Introduce a hidden USB_FUNCTION_DFU Kconfig option and select it for CMD_DFU (as we must have the DFU command enabled to do anything DFU). Make all of the entries in drivers/dfu/Kconfig depend on CMD_DFU and add options for all of the back end choices that DFU can make use of. Cc: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com>
* | usb:gadget: Disallow DFU in SPL for nowTom Rini2016-09-27-0/+2
| | | | | | | | | | | | | | | | | | | | Previously, DFU was not built in for SPL and often disabled via the board config.h file, in the SPL build. By moving DFU to Kconfig we now need to move this logic to the Makefile to continue to allow boards to fit within their SPL size limit (until gcc 6 is more widespread and unused strings will be discarded). Signed-off-by: Tom Rini <trini@konsulko.com>
generated by cgit v1.1 at 2024-11-09 22:40:28 +0000