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* ARMV7: OMAP3: Add CONFIG_SYS_NAND_QUIET_TEST to Beagle and Overo configsSteve Sakoman2010-09-08-0/+2
| | | | | | | | Future versions of these boards have options for POP memory with no NAND. This option prevents display of error messages when no NAND is detected. Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* mtd: nand: supress 'unknown NAND' warning if no nand is foundSteve Sakoman2010-09-08-3/+6
| | | | | | | | | | | | | | | This printk was added recently and results in ugly output on systems with no NAND: NAND: nand_get_flash_type: unknown NAND device: Manufacturer ID: 0x00, Chip ID: 0x00 0 MiB instead of: NAND: 0 MiB Signed-off-by: Steve Sakoman <steve@sakoman.com> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* ARMV7: OMAP3: Remove erroneous hard coded sdram setup for 128MB/bankSteve Sakoman2010-09-08-22/+21
| | | | | | | | | Upcoming Beagle and Overo revisions use POP memory with 256MB or 512MB per bank. This patches uses the SDRC settings from x-load or the config header to set up timing properly. Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* ARMV7: OMAP3: Fix broken reset command on OMAP36XX/37XX and OMAP4Steve Sakoman2010-09-08-1/+5
| | | | | | | | Using the reset command on OMAP36XX/37XX and OMAP4 caused a hang. This patch uses the reset bit appropriate for each CPU architecture. Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* ARMV7: OMAP3: Apply Cortex-A8 errata workarounds only on affected revisionsMans Rullgard2010-09-08-3/+10
| | | | | | | | | | The workarounds for errata 621766 and 725233 should only be applied on affected Cortex-A8 revisions. Recent chips use r3px cores where these have been fixed. Signed-off-by: Mans Rullgard <mans@mansr.com> Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* ARMV7: OMAP3: Convert setup_auxcr() to pure asmMans Rullgard2010-09-08-35/+19
| | | | | | | | | | | This function consists entirely of inline asm statements, so writing it directly in a .S file is simpler. Additionally, the inline asm is not safe as is, since registers are not guaranteed to be preserved between asm() statements. Signed-off-by: Mans Rullgard <mans@mansr.com> Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* ARMV7: OMAP3: Fix and clean up L2 cache enable/disable functionsMans Rullgard2010-09-08-54/+21
| | | | | | | | | | | | | | | | On OMAP34xx ES1.0, the L2 enable bit can only be set in secure mode, so an SMC call to the ROM monitor is required. On later versions, and on newer devices, this bit is banked and we can set it directly. The code checked only the ES revision of the chip, and hence incorrectly used the ROM call on ES1.0 versions of other devices. This patch adds a check for chip family as well as revision, and also removes some code duplication between the enable and disable functions. Signed-off-by: Mans Rullgard <mans@mansr.com> Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* ARMV7: OMAP3: Add clock setup for OMAP36XX/37XXSteve Sakoman2010-09-08-147/+515
| | | | | | | | This patch configures clocks properly when a 36XX/37XX processor is detected. Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* ARMV7: OMAP3: Update CPU type detection for AM35XX/OMAP36XX/37XXSteve Sakoman2010-09-08-34/+161
| | | | | | | | TI has added new processors to the OMAP3 family. This patch enhances the code in sysinfo.c to detect which family member is present. Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* ARMV7: OMAP: Configure Overo's second network chipSteve Sakoman2010-09-08-9/+19
| | | | | | | | | Confiures GPMC timings for both chips and also configures pinmux for GPIO_65, which is used as the interrupt signal for the second chip Signed-off-by: Scott Ellis <scott@jumpnowtek.com> Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* ARMV7: OMAP: Add detection and support for Beagle C4 revisionSteve Sakoman2010-09-08-39/+58
| | | | | | | | | This patch enhances the revision detection function and adds support for the C4 revision. The board revision is printed and approriate revision specific setup is done automatically. Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* ARMV7: OMAP: Add board revision detection for OveroSteve Sakoman2010-09-08-3/+35
| | | | | | | | | | | The latest Overo COM modules encode their revision number on GPIOs 115, 113, and 112. All boards to date have no pullups on these pins and hence appear as revision 0. This patch reads and prints the revision information. Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* ARMV7: OMAP: Add mpurate boot arg for Overo and BeagleSteve Sakoman2010-09-08-0/+6
| | | | | | | | | Allows one to set the processor clock rate via "setenv mpurate 720" for example Default is set to a "safe" 500 Mhz. Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* ARMV7: OMAP: Enable input driver on Overo's MMC1_CLK and MMC3_CLK pinmux setupSteve Sakoman2010-09-08-2/+2
| | | | | | | | This patch modifies the pinmux setup for MMC1_CLK and MMC3_CLK to enable the input driver. MMC2_CLK was already properly configured. Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* ARMV7: OMAP: add convenience function to set TWL4030 regulator voltagesSteve Sakoman2010-09-08-39/+44
| | | | | | | | | | | This patch adds a function to allow one to easily set the target voltage for the TWL4030 regulators. It also modifies the existing code to use this new function. Applicable definitions are moved out of the driver file and into the header file so that they are generally accessible Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* ARMV7: OMAP: Move syslib.c to omap-common since it can be shared by OMAP3 ↵Steve Sakoman2010-09-08-3/+5
| | | | | | | | | | and OMAP4 The functions in syslib.c can be shared, so this patch moves it from cpu/omap3 to cpu/omap-common Signed-off-by: Steve Sakoman <steve@sakoman.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* Merge branch 'master' of git://git.denx.de/u-boot-mipsWolfgang Denk2010-09-07-7/+7
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| * MIPS: update the MIPS u-boot.ldsXiangfu Liu2010-09-04-7/+7
| | | | | | | | | | | | | | | | | | | | From the document, if set all arguments in "OUTPUT_FORMAT" to "tradbigmips", then even add "-EL" to gcc we still get EB format. pb1x00 is only used in Little-endian, so its default endian should be set to LE. Signed-off-by: Xiangfu Liu <xiangfu@openmobilefree.net> Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-ppc4xxWolfgang Denk2010-09-07-9/+25
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| * | ppc4xx: Invalidate d-cache when used as init-ramStefan Roese2010-09-03-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | We need to invalidate the data cache after it has been used as init-ram. This problem was detected on the lwmon5 update. Signed-off-by: Stefan Roese <sr@denx.de>
| * | ppc4xx: Fix 440EPx bug in reconfigure_pll()Stefan Roese2010-09-03-9/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes a bug in reconfigure_pll(), where the detection of the current bootstrap option is wrong. The ICS bits where incorrectly shifted. This bug was found on the lwmon5 board, which uses bootstrap option H (I2C bootstrap EEPROM). Additionally a bit of code was moved into the if statement, since its only used after later on. No need to run this code all the time. Also, a few empty lines are added to make the code better readable. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Rupjyoti Sarmah <rsarmah@amcc.com> Cc: Victor Gallardo <vgallardo@appliedmicro.com>
| * | ppc4xx: Fix APC405 board supportMatthias Fuchs2010-09-03-0/+1
| |/ | | | | | | | | | | | | | | Opps, after a long time I tested recent u-boot on our APC405 board. This simple fix makes networking work again. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu> Signed-off-by: Stefan Roese <sr@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-shWolfgang Denk2010-09-07-123/+162
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| * | sh: Update lowlevel_init.S of mpr2Nobuhiro Iwamatsu2010-08-30-4/+4
| | | | | | | | | | | | | | | | | | Fix data size. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
| * | sh: Update lowlevel_init.S of ms7750seNobuhiro Iwamatsu2010-08-30-7/+12
| | | | | | | | | | | | | | | | | | Fix data size. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
| * | sh: Update lowlevel_init.S of ms7720seNobuhiro Iwamatsu2010-08-30-14/+16
| | | | | | | | | | | | | | | | | | Fix data size. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
| * | sh: Add support do_bdinfo functionNobuhiro Iwamatsu2010-08-30-0/+19
| | | | | | | | | | | | | | | | | | | | | SH did not support do_bdinfo fuction. This code based avr32 stuff. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
| * | sh: Update lowlevel_init.S of ap325rxaNobuhiro Iwamatsu2010-08-30-0/+1
| | | | | | | | | | | | | | | | | | Fix data size. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
| * | sh: Update lowlevel_init.S of r2dplusNobuhiro Iwamatsu2010-08-30-3/+6
| | | | | | | | | | | | | | | | | | Fix data size. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
| * | sh: Update lowlevel_init.S of espt-gigaNobuhiro Iwamatsu2010-08-30-20/+26
| | | | | | | | | | | | | | | | | | Fix data size. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
| * | sh: Update lowlevel_init.S of sh7763rdpNobuhiro Iwamatsu2010-08-30-2/+2
| | | | | | | | | | | | | | | | | | Fix data size. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
| * | sh: Update lowlevel_init.S of MigoRNobuhiro Iwamatsu2010-08-30-5/+5
| | | | | | | | | | | | | | | | | | Fix data size. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
| * | sh: Update lowlevel_init.S of sh7785lcrNobuhiro Iwamatsu2010-08-30-31/+23
| | | | | | | | | | | | | | | | | | Fix data size. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
| * | sh: Update lowlevel_init.S of rsk7203Nobuhiro Iwamatsu2010-08-30-37/+48
| |/ | | | | | | | | | | Update data address size and fix typo of register. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
* | Merge branch 'next' of git://git.denx.de/u-boot-niosWolfgang Denk2010-09-07-7/+11
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| * | nios2: fix out of reach case for do_resetThomas Chou2010-08-19-6/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is a limitation (or bug?) of nios2 toolchain. The nios2 gcc didn't generate correct code when the reset vector is passed as a constant. It just generated a direct "call", which was wrong when the reset vector was not located in the same 256MB span as u-boot. The "Nios II Processor Reference Handbook" said, "call can transfer execution anywhere within the 256 MByte range determined by PC31..28. The Nios II GNU linker does not automatically handle cases in which the address is out of this range." So we have to use registered "callr" instruction to do the job. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Signed-off-by: Scott McNutt <smcnutt@psyent.com>
| * | nios2: fix bootm error on fdt argsThomas Chou2010-08-19-1/+1
| |/ | | | | | | | | | | | | | | We should check argv[3] only if there are enough args. Otherwise, it might cause invalid memory access fault. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Signed-off-by: Scott McNutt <smcnutt@psyent.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-i2cWolfgang Denk2010-09-07-624/+452
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| * | edminiv2: add I2C support using mvtwsi driverAlbert Aribaud2010-08-30-0/+11
| | | | | | | | | | | | | | | | | | Signed-off-by: Albert Aribaud <albert.aribaud@free.fr> Acked-by: Prafulla Wadaskar<prafulla@marvell.com> Acked-by: Heiko Schocher<hs@denx.de>
| * | i2c: rewrite mvtwsi, support orion5x and kirkwoodAlbert Aribaud2010-08-30-409/+341
| | | | | | | | | | | | | | | | | | | | | | | | | | | This rewrite of the mvtwsi driver is 25% smaller and much faster and simpler than the previous code. Signed-off-by: Albert Aribaud <albert.aribaud@free.fr> Acked-by: Prafulla Wadaskar<prafulla@marvell.com> Acked-by: Heiko Schocher<hs@denx.de>
| * | i2c: rename kirkwood_i2c to mvtwsiAlbert Aribaud2010-08-30-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | This driver is not kirkwood-specific and can also be used e.g. by orion5x. Rename to a SoC-neutral name. Signed-off-by: Albert Aribaud <albert.aribaud@free.fr> Acked-by: Prafulla Wadaskar<prafulla@marvell.com> Acked-by: Heiko Schocher<hs@denx.de>
| * | suen3: remove CONFIG_HARD_I2C and related definesAlbert Aribaud2010-08-30-8/+0
| | | | | | | | | | | | | | | | | | | | | | | | These are not used on this board, which uses soft I2C instead. Signed-off-by: Albert Aribaud <albert.aribaud@free.fr> Acked-by: Prafulla Wadaskar<prafulla@marvell.com> Acked-by: Heiko Schocher<hs@denx.de>
| * | CMD_I2C: make alen=0 workReinhard Meyer2010-08-26-10/+7
| | | | | | | | | | | | Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
| * | omap2: i2c: remove redundant header definitionsNishanth Menon2010-08-23-106/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the register offset and common defines which are already present in drivers/i2c/omap24xx.h. All of these defines carry the same value even. Cc: Steve Sakoman <steve@sakoman.com> Cc: Heiko <hs@denx.de> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Wolfang Denk <wd@denx.de> Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Steve Sakoman <steve@sakoman.com>
| * | omap2: i2c: add syss offsetNishanth Menon2010-08-23-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | OMAP2420 ES2.3 trm defines syss register offset as 0x10. Add it. Cc: Steve Sakoman <steve@sakoman.com> Cc: Heiko <hs@denx.de> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Wolfang Denk <wd@denx.de> Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Steve Sakoman <steve@sakoman.com>
| * | i2c: omap2+: change header guard to be genericNishanth Menon2010-08-23-2/+2
| |/ | | | | | | | | | | | | | | | | | | | | | | | | Make the header guard to be generic to stop conflicting with omap2 i2c header file arch/arm/include/asm/arch-omap24xx/i2c.h Cc: Steve Sakoman <steve@sakoman.com> Cc: Heiko <hs@denx.de> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Wolfang Denk <wd@denx.de> Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Steve Sakoman <steve@sakoman.com>
* | powerpc/8xxx: Fix dma for 36bit addressingYork Sun2010-08-31-2/+6
| | | | | | | | | | | | | | Use more bits to support 36-bit addressing Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | Fix parameters to support RDIMM for P2020DSYork Sun2010-08-31-2/+3
| | | | | | | | | | Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | fdt: call fdt_parent_offset fewer times while translating addressesScott Wood2010-08-19-37/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | fdt_parent_offset() is an expensive operation, so we'd like to reduce unnecessary calls to it. Further, the practice of iterating up to the root if address/size cells aren't found was apparently done for Linux for compatibility with certain buggy Open Firmware implementations, and U-Boot inherited the code. The compliant behavior is to treat a missing #address-cells as 2, and a missing #size-cells as 1 -- never looking anywhere but the immediate parent of the node of interest. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | mpx85xx/fdt: Add cpu-release-addr for all coresMatthew McClintock2010-08-19-7/+8
| | | | | | | | | | | | | | | | We currently do not add a cpu-release-addr for core 0, this is needed when we want to reset core 0 and later restart it from Linux Signed-off-by: Matthew McClintock <msm@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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