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* dm: Add support for generic system controllers (syscon)Simon Glass2015-07-21-0/+131
| | | | | | | | | | | Many SoCs have a number of system controllers which are dealt with as a group by a single driver. It is a pain to have to add lots of compatible strings and/or separate drivers for each. Instead we can identify the controllers by a number and request the address of the one we want. Add a simple implementation of this which can be used by SoC driver code. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: Add support for register maps (regmap)Simon Glass2015-07-21-0/+159
| | | | | | | | | | | Add a simple implementaton of register maps, supporting only direct I/O for now. This can be enhanced later to support buses which have registers, such as I2C, SPI and PCI. It allows drivers which can operate with multiple buses to avoid dealing with the particulars of register access on that bus. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: gpio: Add dm_gpio_request() to manually request a GPIOSimon Glass2015-07-21-1/+13
| | | | | | | This function can be used for testing to manually request a GPIO for use, without resorting to the legacy GPIO API. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: gpio: Add dm_gpio_lookup_name() to look up a GPIO nameSimon Glass2015-07-21-8/+39
| | | | | | | Provide a driver-model function to look up a GPIO name. Make the standard function use it. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: gpio: Allow GPIO uclass to be used in SPLSimon Glass2015-07-21-4/+0
| | | | | | | Now that we support driver model in SPL, allow GPIO drivers to be used there also. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: core: Correct device_get_child_by_of_offset() parameterSimon Glass2015-07-21-3/+3
| | | | | | This parameter is named 'seq' but should be named 'of_offset'. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: core: Add a function to find any device from device treeSimon Glass2015-07-21-0/+39
| | | | | | | | | | | | In some rare cases it is useful to be able to locate a device given a device tree node offset. An example is when you have an alias that points to a node and you want to find the associated device. The device may be SPI, MMC or something else, but you don't need to know the uclass to find it. Add a function to do a global search for a device, given its device tree offset. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: core: Use debug() instead of printf() for failuresSimon Glass2015-07-21-3/+3
| | | | | | | | To avoid bloating SPL code, use debug() where possible in the driver model core code. The error code is already returned, and can be investigated as needed. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: Move the tree/uclass dump code into its own fileSimon Glass2015-07-21-79/+106
| | | | | | | | | | In SPL it is sometimes useful to be able to obtain a dump of the current driver model state. Since commands are not available, provide a way to directly call the functions to output this information. Adjust the existing commands to use these functions. Signed-off-by: Simon Glass <sjg@chromium.org>
* sandbox: Drop special-case sandbox console codeSimon Glass2015-07-21-5/+1
| | | | | | | | | At present printf() skips output if it can see there is no console. This is really just an optimisation, and is not necessary. Also it is currently incorrect in some cases. Rather than update the logic, just remove it so that we don't need to keep it in sync. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: Allow debug UART to support an early consoleSimon Glass2015-07-21-0/+19
| | | | | | | When there is no console ready, allow the debug UART to be used for output. This makes debugging of early code considerably easier. Signed-off-by: Simon Glass <sjg@chromium.org>
* debug_uart: Remove use of asmlinkageSimon Glass2015-07-21-12/+10
| | | | | | | This does not actually help any current arch. For x86 it makes it harder to call (requires stack) and for ARM it has no effect. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
* Add a way of checking the position of a structure memberSimon Glass2015-07-21-0/+11
| | | | | | | | | | | | U-Boot uses structures for hardware access so it is important that these structures are correct. Add a way of asserting that a structure member is at a particular offset. This can be created using the datasheet for the hardware. This implementation uses Static_assert() since BUILD_BUG_ON() only works within functions. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: arm: Put driver model I2C drivers before legacy onesSimon Glass2015-07-21-5/+5
| | | | | | | | | | Driver-model I2C drivers can be picked up by the linker script rule for legacy drivers. Change the order to avoid this. We could make the legacy code depend on !CONFIG_DM_I2C but that is not necessary and it is good to keep conditions to a minimum. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: Reduce SPL device tree sizeSimon Glass2015-07-21-2/+42
| | | | | | | | | The SPL device tree size must be minimised to save memory. Only include properties that are needed by SPL - this is determined by the presence of the "u-boot,dm-pre-reloc" property. Also remove a predefined list of unused properties from the nodes that remain. Signed-off-by: Simon Glass <sjg@chromium.org>
* fdt: Add fdtgrep toolSimon Glass2015-07-21-1/+1239
| | | | | | | | | | | | | | | | | | | | | | | | This tool allows us to extract subsets of a device tree file. It is used by the SPL vuild, which needs to cut down the device tree size for use in limited memory. This tool was originally written for libfdt but it has not been accepted upstream, so for now, include it in U-Boot. Several utilfdt library functions been included inline here. If fdtgrep is eventually accepted in libfdt then we can bring that version of libfdt in here, and drop fdtgrep (requiring that fdtgrep is provided by the user). If it is not accepted then another approach would be to write a special tool for chopping down device tree files for SPL. While it would use the same libfdt support, it would be less code than fdtgrep.c because it would not have general-purpose functions. Another approach (which was used with v1 of this series) is to sprinkler all the device tree files with #ifdef. I don't like that idea. Signed-off-by: Simon Glass <sjg@chromium.org>
* fdt: Add fdt_first/next_region() functionsSimon Glass2015-07-21-2/+731
| | | | | | | | These have been sent upstream but not accepted to libfdt. For now, bring these into U-Boot to enable fdtgrep to operate. We will use fdtgrep to cut device tree files down for SPL. Signed-off-by: Simon Glass <sjg@chromium.org>
* fdt: Add a function to remove unused strings from a device treeSimon Glass2015-07-21-0/+49
| | | | | | | | | | | | Property names are stored in a string table. When a node property is removed, the string table is not updated since other nodes may have a property with the same name. Thus it is possible for the string table to build up a number of unused strings. Add a function to remove these. This works by building a new device tree from the old one, adding strings one by one as needed. Signed-off-by: Simon Glass <sjg@chromium.org>
* mkimage: Display a better list of available image typesSimon Glass2015-07-21-33/+95
| | | | | | | | | | | Offer to display the available image types in help. Also, rather than hacking the genimg_get_type_id() function to display a list of types, do this in the tool. Also, sort the list. The list of image types is quite long, and hard to discover. Print it out when we show help information. Signed-off-by: Simon Glass <sjg@chromium.org>
* sandbox: Enable dhry commandSimon Glass2015-07-21-0/+1
| | | | | | Provide access to the dhrystone benchmark command. Signed-off-by: Simon Glass <sjg@chromium.org>
* Add a dhrystone benchmark commandSimon Glass2015-07-21-0/+1132
| | | | | | | | | | Drystone provides a convenient sanity check that the CPU is running at full speed. Add this as a command which can be enabled as needed. Note: I investigated using Coremark for this but there was a license agreement and I could not work out if it was GPL-compatible. Signed-off-by: Simon Glass <sjg@chromium.org>
* Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2015-07-20-377/+1673
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| * armv8/fsl-lsch3: Fix TCR_EL3 for the final MMU setup.Zhichun Hua2015-07-20-15/+8
| | | | | | | | | | | | | | | | When final MMU table is setup in DDR, TCR attributes must match those of the memroy for cacheability and shareability. Signed-off-by: Zhichun Hua <zhichun.hua@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com>
| * armv8: Fix TCR macros for shareability attributeZhichun Hua2015-07-20-2/+2
| | | | | | | | | | | | | | | | For ARMv8, outer shareable is 0b10, inner shareable is 0b11 at bit position [13:12] of TCR_ELx register. Signed-off-by: Zhichun Hua <zhichun.hua@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com>
| * armv8/ls2085a/defconfig: Enable FSL_DSPI, OF_CONTROL and DM supportHaikun.Wang@freescale.com2015-07-20-0/+14
| | | | | | | | | | | | | | | | | | Freescale DSPI driver has been converted to Driver Model. The new driver depends on OF_CONTROL, DM, DM_SPI. This patch enable FSL_DSPI and its dependence configure options. Signed-off-by: Haikun Wang <haikun.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * armv8/ls2085ardb: Enable DSPI flash support for LS2085ARDBHaikun Wang2015-07-20-0/+8
| | | | | | | | | | | | | | Enable DSPI flash related configurations for LS2085ARDB. Signed-off-by: Haikun Wang <haikun.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * armv8/ls2085aqds: Enable DSPI flash support for LS2085AQDSHaikun Wang2015-07-20-0/+9
| | | | | | | | | | | | | | Enable DSPI flash related configurations. Signed-off-by: Haikun Wang <haikun.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * armv8/ls2085ardb: DSPI pin muxing configure through QIXIS CPLDHaikun.Wang@freescale.com2015-07-20-20/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | DSPI has pin muxing with SDHC and other IPs, this patch check the value of RCW SPI_PCS_BASE and SPI_BASE_BASE fields, it also check the "hwconfig" variable. If those pins are configured to DSPI and "hwconfig" enable DSPI, set the BRDCFG5 of QIXIS CPLD to configure the routing to on-board SPI memory. Otherwise will configure to SDHC. DSPI is enabled in "hwconfig" by appending "dspi", eg. setenv hwconfig "$hwconfig;dspi" Signed-off-by: Haikun Wang <Haikun.Wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * armv8/ls2085aqds: DSPI pin muxing configure through QIXISHaikun Wang2015-07-20-0/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | DSPI has pin muxing with SDHC and other IPs, this patch check the value of RCW SPI_PCS_BASE and SPI_BASE_BASE fields, it also check the "hwconfig" variable. If those pins are configured to DSPI and "hwconfig" enable DSPI, set the BRDCFG5 of QIXIS FPGA to configure the routing to on-board SPI memory. Otherwise will configure to SDHC. DSPI is enabled in "hwconfig" by appending "dspi", eg. setenv hwconfig "$hwconfig;dspi" Signed-off-by: Haikun Wang <haikun.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * armv8/ls2085a: Enable DSPI get input clk form 'mxc_get_clock'Haikun Wang2015-07-20-0/+3
| | | | | | | | | | Signed-off-by: Haikun Wang <haikun.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * arm/dts/ls2085a: Add dts files for LS2085AQDS and LS2085ARDBHaikun Wang2015-07-20-0/+90
| | | | | | | | | | | | | | Add dts source files for LS2085AQDS and LS2085ARDB boards. Signed-off-by: Haikun Wang <haikun.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * arm/dts/ls2085a: Add DSPI dts nodeHaikun Wang2015-07-20-0/+9
| | | | | | | | | | | | | | Add DSPI controller dts node in fsl-ls2085a.dtsi Signed-off-by: Haikun Wang <haikun.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * arm/dts/ls2085a: Bring in ls2085a dts files from linux kernelHaikun Wang2015-07-20-0/+120
| | | | | | | | | | | | | | | | Bring in required device tree files for ls2085a from Linux. These are initially unchanged and have a number of pieces not needed by U-Boot. Signed-off-by: Haikun Wang <Haikun.Wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * arm/ls102xa: Add little-endian mode support for audio IPsAlison Wang2015-07-20-1/+8
| | | | | | | | | | | | | | | | As SCFG_ENDIANCR register is added to choose little-endian or big-endian for audio IPs on Rev2.0 silion, little-endian mode is selected. Signed-off-by: Alison Wang <alison.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * arm/ls102xa: Add PSCI support for ls102xaWang Dongsheng2015-07-20-0/+134
| | | | | | | | | | | | | | | | | | | | | | | | Base on PSCI services, implement CPU_ON/CPU_OFF for ls102xa platform. Tested on LS1021AQDS, LS1021ATWR. Test CPU hotplug times: 60K Test kernel boot times: 1.2K Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com> Acked-by: Alison Wang <alison.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * ARMv7: Factor out reusable timer_wait from sunxi/psci_sun7i.SWang Dongsheng2015-07-20-40/+54
| | | | | | | | | | | | | | | | | | | | timer_wait is moved from sunxi/psci_sun7i.S, and it can be converted completely into a reusable armv7 generic timer. LS1021A will use it as well. Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * arm: ls1021a: Remove the inappropriate use of the function 'sprintf'Alison Wang2015-07-20-10/+11
| | | | | | | | | | | | | | | | | | | | | | As the function 'sprintf' does not check buffer boundaries but outputs to the buffer 'enet' of fixed size (16), this patch removes the function 'sprintf', and uses 'strcpy' instead. It will assign the character arrays 'enet' and 'phy' the corresponding character strings. Signed-off-by: Alison Wang <alison.wang@freescale.com> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * board/ls2085a: Increase kernel_size value in env variablePrabhakar Kushwaha2015-07-20-3/+3
| | | | | | | | | | | | | | | | | | Linux itb image size has been increased from 30MB. So updating kernel_size to 40MB in env variable. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * board/ls2085rdb: Export functions for standalone AQ FW load appsPrabhakar Kushwaha2015-07-20-1/+48
| | | | | | | | | | | | | | | | | | Export functions required by Aquntia PHY firmware load application. functions are memset, strcpy, mdelay, mdio_get_current_dev, phy_find_by_mask, mdio_phydev_for_ethname and miiphy_set_current_dev Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * driver/ldpaa_eth:Avoid infinite loop in ldpaa_eth_rxPrabhakar Kushwaha2015-07-20-1/+8
| | | | | | | | | | | | | | | | Change infinite loop mechanism to timer based polling for QBMAN release in ldpaa_eth_rx. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * driver/ldpaa_eth: Avoid TX conf framesPrabhakar Kushwaha2015-07-20-111/+4
| | | | | | | | | | | | | | | | | | | | | | Polling of TX conf frames is not a mandatory option. Packets can be transferred via WRIOP without TX conf frame. Configure ldpaa_eth driver to use TX path without confirmation frame Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * driver/ldpaa_eth: Add timeout handling DQRR entry readPrabhakar Kushwaha2015-07-20-14/+22
| | | | | | | | | | | | | | | | | | | | | | Volatile command does not return frame immidiately, need to wait till a frame is available in DQRR. Ideally it should be a blocking call. Add timeout handling for DQRR frame instead of retry counter. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * driver/ldpaa_eth: Retry enqueue if portal was busyPrabhakar Kushwaha2015-07-20-2/+30
| | | | | | | | | | | | | | | | | | | | | | Do not immediately return if the enqueue function returns -EBUSY; re-try mulitple times. if timeout occures, release the buffer. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * armv8/fsl-lsch3: device tree fixups for PCI stream IDsStuart Yoder2015-07-20-0/+182
| | | | | | | | | | | | | | | | | | | | | | This patch adds the infrastructure to update device tree nodes to convey SMMU stream IDs in the device tree. Fixups are implemented for PCI controllers initially. Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * drivers/fsl-mc: dynamically create ICID pool in DPCStuart Yoder2015-07-20-0/+36
| | | | | | | | | | | | | | | | | | | | delete any existing ICID pools in the DPC and create a new one based on the stream ID partitioning for the SoC Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * armv8/fsl-lsch3: partition stream IDsStuart Yoder2015-07-20-5/+66
| | | | | | | | | | | | | | | | | | | | | | | | Stream IDs on ls2085a devices are not hardwired and are programmed by sw. There are a limited number of stream IDs available, and the partitioning of them is scenario dependent. This header defines the partitioning between legacy, PCI, and DPAA2 devices. Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * drivers: fsl-mc: Return error for major version mismatchPrabhakar Kushwaha2015-07-20-2/+7
| | | | | | | | | | | | | | | | | | | | Management complex major version should match to the firmware present in flash. Return error during mismatch of major version. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * drivers: fsl-mc: Update qbman driverPrabhakar Kushwaha2015-07-20-37/+53
| | | | | | | | | | | | | | | | | | | | | | | | Update qbman driver - As per latest available qbman driver - Use of atomic APIs Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> CC: Geoff Thorpe <Geoff.Thorpe@freescale.com> CC: Haiying Wang <Haiying.Wang@freescale.com> CC: Roy Pledge <Roy.Pledge@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * drivers: fsl-mc: Update flibs to mc-0.6.0.1Prabhakar Kushwaha2015-07-20-58/+199
| | | | | | | | | | | | | | | | | | | | Update flibs changes to mc-0.6.0.1 for dpmang, dprc, dpni and dpio objects Also rename qbman_portal_ce/ci_paddr to qbman_portal_ce/ci_offset in dpio_attr. These are now offsets from the SoC QBMan portals base. Signed-off-by: J. German Rivera <German.Rivera@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * drivers/fsl-mc: Autoload AOIP image from NOR flashJ. German Rivera2015-07-20-0/+29
| | | | | | | | | | | | | | | | | | Load AIOP image from NOR flash into DDR so that the MC firmware the MC fw can start it at boot time Signed-off-by: J. German Rivera <German.Rivera@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
generated by cgit v1.1 at 2024-12-22 15:47:51 +0000