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* usb: eth: r8152_fw: fix indentationAndre Przywara2016-12-04-4/+4
| | | | | | | | | | | Apparently the indentation is wrong here, fix this to avoid compiler warnings and puzzled readers. Pointed out by GCC 6.2's -Wmisleading-indentation warning. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Marek Vasut <marex@denx.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* marvell: comphy_a3700: fix bitmaskAndre Przywara2016-12-04-2/+2
| | | | | | | | | | | | | Obviously the mask for the rx and tx select field cannot be right, as it would overlap in one and exceed the 32-bit register in the other case. From looking at the neighbouring bits it looks like the mask should be really 4 bits wide instead of 8. Pointed out by a GCC 6.2 (default) warning. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Stefan Roese <sr@denx.de>
* net: rtl8169: remove unneeded definitionAndre Przywara2016-12-04-3/+0
| | | | | | | | The rtl8169_intr_mask variable isn't used anywhere in the code, so just remove it to avoid a GCC 6.2 compiler warning. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* net: e1000: fix indentationAndre Przywara2016-12-04-3/+2
| | | | | | | | | | | Apparently the indentation is off here, for the IGB model just want to bail out early. Fix this to avoid both compiler warnings and puzzled readers. Pointed out by GCC 6.2's -Wmisleading-indentation warning. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* mtd: cfi_flash: fix indentationAndre Przywara2016-12-04-2/+2
| | | | | | | | | | | | The indentation is misleading here and suggests that the write command will be only executed in the else clause. It seems like this is not intended, so fix the indentation to avoid both compiler warnings and puzzled readers. Pointed out by GCC 6.2's -Wmisleading-indentation warning. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Stefan Roese <sr@denx.de>
* serial: Drop the s3c24x0 serial driverSimon Glass2016-12-04-211/+0
| | | | | | | | This is not used by any boards. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: David Müller <d.mueller@elsoft.ch> Reviewed-by: Jagan Teki <jagan@openedev.com>
* arm: Remove VCMA9 boardSimon Glass2016-12-04-1139/+0
| | | | | | | | | This board has not been converted to DM_SERIAL by the deadline. Remove it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: David Müller <d.mueller@elsoft.ch> Reviewed-by: Jagan Teki <jagan@openedev.com>
* arm: Remove smdk2410 boardSimon Glass2016-12-04-520/+0
| | | | | | | | This board has not been converted to DM_SERIAL by the deadline. Remove it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: David Müller <d.mueller@elsoft.ch>
* serial: Update docs to indicate mcfuart supports DM_SERIALSimon Glass2016-12-04-1/+0
| | | | | | This driver was converted so we should remove it from the list. Signed-off-by: Simon Glass <sjg@chromium.org>
* post: cosmetic: fix typoNiko Mauno2016-12-04-1/+1
| | | | | | Change 'date' to 'data'. Signed-off-by: Tomas Melin <tomas.melin@vaisala.com>
* Cosmetic api: api_storage.c Spelling correctionWalt Feasel2016-12-04-1/+1
| | | | | | Make spelling correction for 'from' Signed-off-by: Walt Feasel <waltfeasel@gmail.com>
* Cosmetic api: api_storage.c Comment styleWalt Feasel2016-12-04-15/+17
| | | | | | Make comment style modifications Signed-off-by: Walt Feasel <waltfeasel@gmail.com>
* Cosmetic api: api_storage.c Line over 80 charWalt Feasel2016-12-04-1/+1
| | | | | | | Make checkpatch style modification for WARNING: line over 80 characters Signed-off-by: Walt Feasel <waltfeasel@gmail.com>
* Cosmetic api: api_storage.c Blank line after {Walt Feasel2016-12-04-3/+0
| | | | | | | | Make checkpatch style modification for CHECK: Blank lines aren't necessary after an open brace '{' Signed-off-by: Walt Feasel <waltfeasel@gmail.com>
* Cosmetic api: api_storage.c Align parenthesisWalt Feasel2016-12-04-1/+1
| | | | | | | Make checkpatch style modification for CHECK: Alignment should match open parenthesis Signed-off-by: Walt Feasel <waltfeasel@gmail.com>
* ti_armv7_common: env: Increase IO buffer sizeLokesh Vutla2016-12-04-1/+1
| | | | | | | | | There are certain environment variables whose length is greater than the defined IO buffer size. So, increase the IO buffer size to print the entire variables. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: dts: AM571x-IDK Initial SupportSchuyler Patton2016-12-04-2/+86
| | | | | | | | | Add initial DTS support for AM571-IDK evm. Signed-off-by: Schuyler Patton <spatton@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* board: ti: am57xx: Add support for the am571x idkSteve Kipisz2016-12-04-3/+286
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The AM571x Industrial Development Kit (IDK) is a board based on TI's AM571x SoC which has a single core 1.5GHz Cortex-A15processor. This board is a development platform for the Industrial Market with: - 1GB of DDR3L - Dual 1Gbps Ethernet - HDMI - PRU-ICSS - uSD - 16GB eMMC - CAN - RS-485 - PCIe - USB3.0 - Video Input Port - Industrial IO port and expansion connector The PRU/ICSS will be supported by 3rd party software for EtherCat, Profibus, and other Industrial protocols. The link to the data sheet and TRM can be found here: http://www.ti.com/product/AM5718 Signed-off-by: Steve Kipisz <s-kipisz2@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* board: ti: am572x-idk: Update pinmux using latest PMTLokesh Vutla2016-12-04-215/+221
| | | | | | | | | | | | | Update the board pinmux for AM572x-IDK board using latest PMT[1] and the board files named am572x_idk_v1p3b_sr2p0 that were autogenerated on 20th October, 2016 by "Steve Kipisz <s-kipisz2@ti.com>" and "Tom Johnson <thjohnson@ti.com>". [1] https://dev.ti.com/pinmux/app.html#/default/ Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* board: ti: am572x: Add pinmux for X15/GPEVM SR2.0 using latest PMTNishanth Menon2016-12-04-138/+261
| | | | | | | | | | | | Update the board pinmux for AM572x-IDK board using latest PMT[1] and the board files named am572x_gp_evm_A3a_sr2p0 that were autogenerated on 19th October, 2016 by "Ahmad Rashed<a-rashed@ti.com>". [1] https://dev.ti.com/pinmux/app.html#/default/ Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* board: ti: am57xx: Update SR1.1 RGMII0 iodelay timings for x15/GPEVMNishanth Menon2016-12-04-5/+5
| | | | | | | | | | Update the timing for RGMII0 interface based on PCT_DRA75x_DRA74x_SR1.1_v1.3.10 version (Jan 2016). This update is for SR1.1 Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* board: ti: am57xx: Add support for detection of X15 revb1Lokesh Vutla2016-12-04-8/+22
| | | | | | | | | | BeagleBoard-X15 Rev B1 with SR1.1 platform have incompatible changes for HDMI GPIO requiring new dtb support. This implies we have to properly identify the platform now as well. Hence provide a different board name for the Rev B1 variants. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* board: ti: am57xx: Add support for detection of reva3 variations for GPEVMNishanth Menon2016-12-04-5/+14
| | | | | | | | | | | AM57xx evm Rev A3 with SR2.0 platform have incompatible changes for HDMI GPIO requiring new dtb support. This implies we have to properly identify the platform now as well. Hence provide a different board name for the Rev A3 variations. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: dts: am57xx: sync DT with latest LinuxLokesh Vutla2016-12-04-703/+703
| | | | | | | Sync all am57xx based dts files with latest Linux Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* configs: dra7xx: Enable lp873x optionsKeerthy2016-12-04-0/+6
| | | | | | | | DRA71-evm uses LP873x regulator. Enable lp873x PMIC config options. Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* configs: dra7xx: Enable pmic/regulator optionsLokesh Vutla2016-12-04-0/+5
| | | | | | | Enable pmic/regulator config options. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* configs: dra7xx: hs: Enable DM_ETHLokesh Vutla2016-12-04-0/+1
| | | | | | | Enable DM_ETH for hs boards. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* configs: ti_omap5_common: Select dtb name for dra71xNishanth Menon2016-12-04-0/+2
| | | | | | | Select dtb name for dra71x-evm. Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: dts: dra71x-evm: Add DT supportLokesh Vutla2016-12-04-4/+237
| | | | | | | Add DT support for dra71-evm and built it as part of FIT image. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: dts: dra7xx: sync DT with latest LinuxLokesh Vutla2016-12-04-640/+1683
| | | | | | | Sync all dra7xx based dts files with latest Linux Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: OMAP4+: Add support for getting pbias info from boardLokesh Vutla2016-12-04-48/+82
| | | | | | | | | | | | | Palmas driver assumes it is always TPS659xx regulator on all DRA7xx based boards to enable mmc regulator. This is not true always like in case of DRA71x-evm. So get this information based on the board. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> [trini: Delete omap4_vmmc_pbias_config from omap_hsmmc.c] Signed-off-by: Tom Rini <trini@konsulko.com>
* board: ti: dra71x-evm: Add PMIC supportKeerthy2016-12-04-0/+77
| | | | | | | | | | | | | | | Add the pmic_data for LP873x PMIC which is used to power up dra71x-evm. Note: As per the DM[1] DRA71x supports only OP_NOM. So, updating the efuse registers only to use OPP_NOM irrespective of any CONFIG_DRA7_<VOLT>_OPP_{NOM,od,high} is defined. [1] http://www.ti.com/product/DRA718/technicaldocuments Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* board: ti: dra72: Introduce optimization for rgmii timing for rev CNishanth Menon2016-12-04-25/+50
| | | | | | | | | | | Rev C version of EVM does require IODelay to be configured for RGMII pins in MANUAL_1 configuration. Update the same based on PG2.0 initial simulation values. Data based on PCT_DRA72x_SR2.0_SR1.0_v1.3.0.7 Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* board: ti: dra71x-evm: Add mux settingsLokesh Vutla2016-12-04-1/+206
| | | | | | | | Add mux and iodelay settings for dra71x-evm. Data generated using PCT_DRA71x_SR2.0_v1.0.0.0 version (June 2016). Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* board: ti: dra71x-evm: Add epprom supportLokesh Vutla2016-12-04-0/+5
| | | | | | | | | | | | | | The dra71x-evm is a board based on TI's DRA718 processor targeting BOM-optimized entry infotainment systems such as display audio and is a software compatible derivative of the highly successful DRA74 and DRA72 processor families. More information can be found here[1]. Add epprom detection for dra71-evm. [1] http://www.ti.com/product/dra718 Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: DRA7: Fixup DSPEVE, IVA and GPU clock frequencies based on OPPSuman Anna2016-12-04-0/+136
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support to update the device-tree blob to adjust the DSP and IVA DPLL clocks pertinent to the selected OPP choice, with the default being OPP_NOM. The voltage settings are done in u-boot, but the actual clock configuration itself is done in kernel because of the following reasons: 1. SoC definition constraints us to NOT to do dynamic voltage scaling ever after the initial avs0 setting in bootloader - so the voltage must be set in bootloader. 2. The voltage level must be set even if the IP blocks like GPU/DSP are unused. 3. The IVA, GPU and DSP DPLLs are not essential for u-boot functionality, and similar DPLL clock configuration code has been cleaned up in v2014.10 u-boot release. See commit, 02c41535b6a4 ("ARM: OMAP4/5: Remove dead code against CONFIG_SYS_CLOCKS_ENABLE_ALL"). The non-essential DPLLs are configured within the kernel during the clock init step when parsing the device tree and creating the clock devices. This approach meets both the u-boot and kernel needs. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Subhajit Paul <subhajit_paul@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: DRA7: Redefine voltage and efuse macros per OPP using KconfigSuman Anna2016-12-04-13/+127
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Redefine the macros used to define the voltage values and the efuse register offsets based on OPP for all the voltage domains. This is done using Kconfig macros that can be set in a defconfig or selected during a config step. This allows a voltage domain to be configured/set to a corresponding voltage value depending on the OPP selection choice. The Kconfig choices have been added for MPU, DSPEVE, IVA and GPU voltage domains, with the MPU domain restricted to OPP_NOM. The OPP_OD and OPP_HIGH options will be added when the support for configuring the MPU clock frequency is added. The clock configuration for other voltage domains is out of scope in u-boot code. The CORE voltage domain does not have separate voltage values and efuse register offset at different OPPs, while the MPU voltage domain only has different efuse register offsets for different OPPs, but uses the same voltage value. Any different choices of OPPs for voltage domains on common ganged-rails is automatically taken care to select the corresponding highest OPP voltage value. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: OMAP4+: Add support for dynamically selecting OPPsLokesh Vutla2016-12-04-104/+254
| | | | | | | | | | | It can be expected that different paper spins of a SoC can have different definitions for OPP and can have their own constraints on the boot up OPP for each voltage rail. In order to have this flexibility, add support for dynamically selecting the OPP voltage based on the board to handle any such exceptions. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* omap4_sdp4430: Disable SPL_OS_BOOTTom Rini2016-12-04-1/+0
| | | | | | We are tight on space on this board so drop SPL_OS_BOOT Signed-off-by: Tom Rini <trini@konsulko.com>
* Merge branch 'master' of git://www.denx.de/git/u-boot-dmTom Rini2016-12-03-160/+790
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| * cmd: crosec: Move cros_ec_decode_region helper to cmd/cros_ec.cMoritz Fischer2016-12-02-25/+23
| | | | | | | | | | | | | | | | | | | | | | The cros_ec_decode_region() function is only used in combination with the crosec cmds. Move the function to the correct place. Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com> Cc: Simon Glass <sjg@chromium.org> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: u-boot@lists.denx.de Acked-by: Simon Glass <sjg@chromium.org>
| * drivers: usb: musb: add ti musb host driver with driver model supportMugunthan V N2016-12-02-0/+191
| | | | | | | | | | | | | | | | | | Add a TI MUSB host driver with driver model support and the driver will be bound by the MUSB wrapper driver based on the dr_mode device tree entry. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
| * drivers: usb: musb: adopt musb backend driver to driver modelMugunthan V N2016-12-02-22/+23
| | | | | | | | | | | | | | | | | | | | Currently all backend driver ops uses hard coded physical address, so to adopt the driver to DM, add device pointer to ops call backs so that drivers can get physical addresses from the usb driver priv/plat data. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
| * am33xx: board: probe misc drivers to register musb devicesMugunthan V N2016-12-02-0/+7
| | | | | | | | | | | | | | | | | | MUSB wrapper driver is bound as MISC device and underlying usb devices are bind to usb drivers based on dr_mode, so probing the MISC wrapper driver to register musb devices. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
| * drivers: usb: musb: add ti musb misc driver for wrapperMugunthan V N2016-12-02-0/+74
| | | | | | | | | | | | | | | | Add a misc driver for MUSB wrapper, so that based on dr_mode the USB devices can bind to USB host or USB device drivers. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
| * am33xx: board: do not register usb devices when CONFIG_DM_USB is definedMugunthan V N2016-12-02-1/+4
| | | | | | | | | | | | | | Do not register usb devices when CONFIG_DM_USB is define. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
| * configs: am335x: usb: do not define CONFIG_DM_USB for splMugunthan V N2016-12-02-0/+1
| | | | | | | | | | | | | | | | Since OMAP's spl doesn't support DM currently, do not define CONFIG_DM_USB for spl build. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
| * rtc: Add RTC chip pcf2127 supportMeng Yi2016-12-02-0/+114
| | | | | | | | | | | | | | This driver compatible with pcf2127 and pcf2129 Signed-off-by: Meng Yi <meng.yi@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * dm: core: Add dev_get_addr_size_index() to retrieve addr and sizeStefan Roese2016-12-02-0/+38
| | | | | | | | | | | | | | | | | | | | | | | | The currently available functions accessing the 'reg' property of a device only retrieve the address. Sometimes its also necessary to retrieve the size described by the 'reg' property. This patch adds the new function dev_get_addr_size_index() which retrieves both, the address and the size described by the 'reg' property. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
| * libfdt: replace ARCH_FIXUP_FDT with ARCH_FIXUP_FDT_MEMORYMasahiro Yamada2016-12-02-11/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit e2f88dfd2d96 ("libfdt: Introduce new ARCH_FIXUP_FDT option") allows us to skip memory setup of DTB, but a problem for ARM is that spin_table_update_dt() and psci_update_dt() are skipped as well if CONFIG_ARCH_FIXUP_FDT is disabled. This commit allows us to skip only fdt_fixup_memory_banks() instead of the whole of arch_fixup_fdt(). It will be useful when we want to use a memory node from a kernel DTB as is, but need some fixups for Spin-Table/PSCI. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Alexey Brodkin <abrodkin@synopsys.com> Acked-by: Simon Glass <sjg@chromium.org> Fixed build error for x86: Signed-off-by: Simon Glass <sjg@chromium.org>
generated by cgit v1.1 at 2024-11-09 07:55:45 +0000