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* cpci750: i2c cleanupPeter Tyser2009-06-12-6/+10
| | | | | | | | | | | The following changes were made, primarily to bring the cpci750 i2c driver in line with U-Boot's current I2C API: - Made i2c_init() globally accessible - Made i2c_read() and i2c_write() return an integer - Updated i2c_init() calls to pass in CONFIG_SYS_I2C_SLAVE in the offhand chance someone adds slave support in the future Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* i2c.h: Provide a default CONFIG_SYS_I2C_SLAVE valuePeter Tyser2009-06-12-18/+9
| | | | | | | | Many boards/controllers/drivers don't support an I2C slave interface, however CONFIG_SYS_I2C_SLAVE is used in common code so provide a default Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* fsl-ddr: Fix handling of >4G of memory when !CONFIG_PHYS_64BITKumar Gala2009-06-12-39/+41
| | | | | | | | | | | | | | | The ddr code computes most things as 64-bit quantities and had some places in the middle that it was using phy_addr_t and phys_size_t. Instead we use unsigned long long through out and only at the last stage of setting the LAWs and reporting the amount of memory to the board code do we truncate down to what we can cover via phys_size_t. This has the added benefit that the DDR controller itself is always setup the same way regardless of how much memory we have. Its only the LAW setup that limits what is visible to the system. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Use print_size to report amount of memory not mapped by TLBsKumar Gala2009-06-12-1/+1
| | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Add README for MPC8569MDSHaiying Wang2009-06-12-0/+78
| | | | | Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Add UART1 support for MPC8569MDSHaiying Wang2009-06-12-0/+6
| | | | | | | | MPC8569 UART1 signals are muxed with PortF bit[9-12], we need to define those pins before using UART1. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Add PIB support at CS4/CS5 for MPC8569MDSHaiying Wang2009-06-12-1/+9
| | | | | | Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Yu Liu <Yu.Liu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Fix some settings for MPC8569MDS boardHaiying Wang2009-06-12-3/+3
| | | | | | | | | | - Increase the size of malloc to 512KB because MPC8569MDS needs more memory for malloc to support up to eight Ethernet interfaces. - Move Environment address out of uboot thus the saved environment variables will not be erased after u-boot is re-programmed. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Fix MURAM size for MPC8569Haiying Wang2009-06-12-2/+7
| | | | | | | MPC8569 has 128K bytes MURAM. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc83xxWolfgang Denk2009-06-11-3/+3
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| * mpc83xx: don't set SICRH_TSOBI1 to RMII/RTBI operationKim Phillips2009-06-08-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In GMII mode (which operates at 3.3V) both SICRH TSEC1/2 output buffer impedance bits should be clear, i.e., SICRH[TSIOB1] = 0 and SICRH[TSIOB2] = 0. SICRH[TSIOB1] was erroneously being set high. U-Boot always operated this PHY interface in GMII mode. It is assumed this was missed in the clean up by the original board porters, and copied along to the TQM and sbc boards. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Acked-by: Ira Snyder <iws@ovro.caltech.edu> Reviewed-by: David Hawkins <dwh@ovro.caltech.edu> Tested-by: Paul Gortmaker <paul.gortmaker@windriver.com> CC: Dave Liu <DaveLiu@freescale.com>
* | at91/cpu.c: add missing Copyright & GPL headerJean-Christophe PLAGNIOL-VILLARD2009-06-10-0/+23
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* | apollon: Fix a OBJCFLAGS typoShinya Kuribayashi2009-06-10-1/+1
| | | | | | | | Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
* | Prepare 2009.06-rc3v2009.06-rc3Wolfgang Denk2009-06-10-1/+574
| | | | | | | | | | | | Update CHANGELOG Signed-off-by: Wolfgang Denk <wd@denx.de>
* | rmu board: fix error: 'CONFIG_ENV_SECT_SIZE' undeclaredWolfgang Denk2009-06-10-1/+2
| | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* | ubifs: fix small error path mismatchDaniel Mack2009-06-09-4/+2
| | | | | | | | | | | | In do_readpage(), don't free 'dn' if its allocation failed. Signed-off-by: Daniel Mack <daniel@caiaq.de>
* | EP88x: fix broken linker scriptWolfgang Denk2009-06-09-0/+2
| | | | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> Tested-by: Mikhail Zaturenskiy <mzaturenskiy@shoppertrak.com>
* | TQM85xx: minor config file cleanupWolfgang Denk2009-06-09-4/+3
| | | | | | | | | | | | | | | | | | Remove "saveenv" from "update" definition: the environment is outside the U-Boot image on TQM85xx and therefor not affected by updates. Also "beautify" code a bit (vertical alignment). Signed-off-by: Wolfgang Denk <wd@denx.de>
* | TQM85xx: adapt for new flash typesWolfgang Denk2009-06-09-13/+0
| | | | | | | | | | | | | | | | | | | | | | | | Old TQM85xx boards had 'M' type Spansion Flashes from the S29GLxxxM series while new boards have 'N' type Flashes from the S29GLxxxN series, which have bigger sectors: 2 x 128 instead of 2 x 64 KB. We now change the configuration to the new flash types for all boards; this also works on old boards - we just waste two flash sectors for the environment which could be smaller there. Signed-off-by: Wolfgang Denk <wd@denx.de>
* | 85xx: Fix the wrong SYS_CLK_IN for 8569MDSDave Liu2009-06-09-2/+2
| | | | | | | | | | | | | | | | The SYS_CLK_IN of MPC8569MDS is 66.66MHz, The DDR_CLK_IN is same with SYS_CLK_IN in 8569 processor. so, change the SYS_CLK_IN from 66MHz to 66.66MHz. Signed-off-by: Dave Liu <daveliu@freescale.com>
* | 85xx: Fix the wrong BCSR address of 8569MDSDave Liu2009-06-09-1/+1
| | | | | | | | | | | | | | | | | | The BCSR17[7] = 1 will unlock the write protect of FLASH. The WP# pin only controls the write protect of top/bottom sector, That is why we can save env, but we can't write the first sector before the patch. Signed-off-by: Dave Liu <daveliu@freescale.com>
* | 85xx: bugfix for reading maximum TLB size on mpc85xxFredrik Arnerup2009-06-09-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | The MAXSIZE field in the TLB1CFG register is 4 bits, not 8 bits. This made setup_ddr_tlbs() try to set up a TLB larger than the e500 maximum (256 MB) which made u-boot hang in board_init_f() when trying to create a new stack in RAM. I have an mpc8540 with one 1GB dimm. Signed-off-by: Fredrik Arnerup <fredrik.arnerup@edgeware.tv> Signed-off-by: Andy Fleming <afleming@freescale.com> Acked-by: Kumar Gala <galak@kernel.crashing.org>
* | 85xx: Fix the clock adjust of mpc8569mds boardDave Liu2009-06-09-1/+1
| | | | | | | | | | | | | | | | Currently the clk_adj is 6 (3/4 cycle), The settings will cause the DDR controller hang at the data init. Change the clk_adj from 6 to 4 (1/2 cycle), make the memory system stable. Signed-off-by: Dave Liu <daveliu@freescale.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-usbWolfgang Denk2009-06-09-1/+2
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| * | at91: fix a USB problem for AT91SAM9261RONETIX - Ilko Iliev2009-06-09-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch corrects the missing PLLB initialization in usb_cpu_init() for AT91SAM9261. Because of the missing PLLB initialization, the USB support for all AT91SAM9261 based boards will work only if the PLLB is configured by a precedent bootloader. Signed-off-by: Ilko Iliev <iliev@ronetix.at> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Remy Bohmer <linux@bohmer.net>
* | | ppc4xx/net: Fix MDIO clock setupFelix Radensky2009-06-08-4/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes MDIO clock setup in case when OPB frequency is 100MHz. Current code assumes that the value of sysinfo.freqOPB is 100000000 when OPB frequency is 100MHz. In reality it is 100000001. As a result MDIO clock is set to incorrect value, larger than 2.5MHz, thus violating the standard. This in not a problem on boards equipped with Marvell PHYs (e.g. Canyonlands), since those PHYs support MDIO clocks up to 8.3MHz, but can be a problem for other PHYs (e.g. Realtek ones). Signed-off-by: Felix Radensky <felix@embedded-sol.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | | rtl8169: fix PCI system memory addressYoshihiro Shimoda2009-06-08-5/+8
| | | | | | | | | | | | | | | | | | | | | | | | When PCI device use system memory, some PCI host controller should be set physical memory address. Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | | SMC911x driver fixed for NFS bootManikandan Pillai2009-06-08-1/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | eth_halt() function in the smc911x drivers used to call the smc911x_reset() function. eth_halt() used to be called after tftp transfers. This used to put the ethernet chip in reset while the linux boots up resulting in the ethernet driver not coming up. NFS boot used to fail as a result. This patch calls smc911x_shutdown() instead of smc911x_reset(). Some comments received has also been fixed. Signed-off-by: Manikandan Pillai <mani.pillai@ti.com> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | | Add config option for disabling DM9000-SROM support.Remy Bohmer2009-06-08-15/+36
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some boards do not have SROM support for the DM9000 network adapter. Instead of listing these board names in the driver code, make this option configurable from the board config file. It also removes a build warning for the at91sam9261ek board: 'dm9000x.c:545: warning: 'read_srom_word' defined but not used' And it repaires the trizepsiv board build which was broken around the same routines Signed-off-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | smc911x: write back the manually set MAC addressDaniel Mack2009-06-07-2/+7
|/ | | | | | | | | If the MAX address is given by the environment, write it back to the hardware. Signed-off-by: Daniel Mack <daniel@caiaq.de> Cc: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* Merge branch 'master' of git://git.denx.de/u-boot-mmcWolfgang Denk2009-06-04-41/+52
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| * mmc: Fix decoding of SCR & function switch data on little-endian machinesYauhen Kharuzhy2009-06-02-5/+5
| | | | | | | | | | | | | | | | SCR & switch data are read from card as big-endian words and should be converted to CPU byte order. Signed-off-by: Yauhen Kharuzhy <jekhor@gmail.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * mmc: Remove return from mmc_init for non SD 2.0 compatible cards.Yauhen Kharuzhy2009-06-02-4/+0
| | | | | | | | | | | | | | | | | | Cards which are not compatible with SD 2.0 standard, may return response for CMD8 command, but it will be invalid in terms of SD 2.0. We should accept this case as admissible, just like Linux does. Signed-off-by: Yauhen Kharuzhy <jekhor@gmail.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * mmc: drop unnecessary castsRabin Vincent2009-06-02-15/+15
| | | | | | | | | | | | Now that response is a uint, we can drop all the casts. Signed-off-by: Rabin Vincent <rabin@rab.in>
| * mmc: fix response decoding on little endianRabin Vincent2009-06-02-13/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The mmc code defines the response as an array of chars. However, it access the response bytes both as (i) an array of four uints (with casts) and (ii) as individual chars. The former case is used more often, including by the driver when it assigns the response. The char-wise accesses are broken on little endian systems because they assume that the bytes in the uints are in big endian byte order. This patch fixes this by changing the response to be an array of four uints and replacing the char-wise accesses with equivalent uint-wise accesses. Signed-off-by: Rabin Vincent <rabin@rab.in>
| * mmc: use lldiv to fix arm eabi buildRabin Vincent2009-06-02-3/+4
| | | | | | | | | | | | | | The generic MMC core uses direct long long divisions, which do not build with ARM EABI toolchains. Use lldiv() instead, which works everywhere. Signed-off-by: Rabin Vincent <rabin@rab.in>
| * mmc: check find_mmc_device return valueRabin Vincent2009-06-02-1/+10
| | | | | | | | | | | | | | find_mmc_device returns NULL if an invalid device number is specified. Check for this to avoid dereferencing NULL pointers. Signed-off-by: Rabin Vincent <rabin@rab.in>
| * mmc: clean up help textsRabin Vincent2009-06-02-4/+5
| | | | | | | | | | | | | | Remove some repeated words and superfluous newlines in the mmc command help entries. Signed-off-by: Rabin Vincent <rabin@rab.in>
* | Redundant Environment: protect full sector sizeWolfgang Denk2009-06-04-26/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Several boards used different ways to specify the size of the protected area when enabling flash write protection for the sectors holding the environment variables: some used CONFIG_ENV_SIZE and CONFIG_ENV_SIZE_REDUND, some used CONFIG_ENV_SECT_SIZE, and some even a mix of both for the "normal" and the "redundant" areas. Normally, this makes no difference at all. However, things are different when you have to deal with boards that can come with different types of flash chips, which may have different sector sizes. Here we may have to chose CONFIG_ENV_SECT_SIZE such that it fits the biggest sector size, which may include several sectors on boards using the smaller sector flash types. In such a case, using CONFIG_ENV_SIZE or CONFIG_ENV_SIZE_REDUND to enable the protection may lead to the case that only the first of these sectors get protected, while the following ones aren't. This is no real problem, but it can be confusing for the user - especially on boards that use CONFIG_ENV_SECT_SIZE to protect the "normal" areas, while using CONFIG_ENV_SIZE_REDUND for the "redundant" area. To avoid such inconsistencies, I changed all sucn boards that I found to consistently use CONFIG_ENV_SECT_SIZE for protection. This should not cause any functional changes to the code. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Paul Ruhland Cc: Pantelis Antoniou <panto@intracom.gr> Cc: Stefan Roese <sr@denx.de> Cc: Gary Jennejohn <garyj@denx.de> Cc: Dave Ellis <DGE@sixnetio.com> Acked-by: Stefan Roese <sr@denx.de>
* | mmc: it's safe to ignore mmc_send_if_cond() return valueIlya Yanok2009-06-04-4/+0
| | | | | | | | | | | | | | Return value of mmc_send_if_cond() can be safely ignored (as it is done in Linux). This makes older cards work with MXC MCI controller. Signed-off-by: Ilya Yanok <yanok@emcraft.com>
* | cfi_mtd: Fix bug in last sector detectionStefan Roese2009-06-03-2/+7
| | | | | | | | | | | | | | This patch now enabled this cfi-mtd wrapper to correctly detect and erase the last sector in an NOR FLASH device. Signed-off-by: Stefan Roese <sr@denx.de>
* | Blackfin: spi: fix pin handling of SPI0 SSEL4Mike Frysinger2009-05-29-1/+1
| | | | | | | | | | | | | | CS4 on SPI0 has a dedicated PH8 pin which needs to be enabled as a peripheral in order to work. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | Blackfin: fix if() logic in bootrom evt1 checkMike Frysinger2009-05-29-1/+1
|/ | | | | | | A missing set of parenthesis caused the silicon revision to apply only to the BF533 and not the BF531/BF532 variants. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Merge branch 'master' of git://git.denx.de/u-boot-blackfinWolfgang Denk2009-05-28-0/+17
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| * Blackfin: bf518f-ezbrd: setup portmux for async flashGraf Yang2009-05-25-0/+17
| | | | | | | | | | | | | | | | The pins for async memory where parallel flash lives are not enabled by default, so make sure we mux them as needed. Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | jffs2/mtdparts: Fix problem with usage from JFFS2 and MTDPARTS togetherStefan Roese2009-05-28-54/+64
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently using JFFS2 with MTDPARTS enabled doesn't work. This is because mtdparts_init() is available in both files, cmd_mtdparts.c and cmd_jffs2.c. Please note that in the original cmd_jffs2.c file (before the jffs2/mtdparts command/file split those 2 different versions already existed. So this is nothing new. The main problem is that the variables "current_dev" and "current_partnum" are declared in both files now. This doesn't work. This patch now changes the names of those variable to more specific names: "current_mtd_dev" and "current_mtd_partnum". This is because this patch also changes the declaration from static to global, so that they can be used from both files. Please note that my first tests were not successful. The MTD devices selected via mtdparts are now accessed but I'm failing to see the directory listed via the "ls" command. Nothing is displayed. Perhaps I didn't generate the JFFS2 image correctly (I never used JFFS2 in U-Boot before). Not sure. Perhaps somebody else could take a look at this as well. I'll continue looking into this on Monday. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de> Cc: Ilya Yanok <yanok@emcraft.com> Cc: Renaud barbier <renaud.barbier@ge.com>
* nand: Fix problem with ECC ordering for PPC4xx NDFC platformsStefan Roese2009-05-23-0/+5
| | | | | | | | | This patch enables Smart Media (SMC) ECC byte ordering which is used on the PPC4xx NAND FLASH controller (NDFC). Without this patch we have incompatible ECC byte ordering to the Linux kernel NDFC driver. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Scott Wood <scottwood@freescale.com>
* ppc4xx: Fix problem with ECC ordering for PPC4xx NDFC platformsStefan Roese2009-05-23-2/+2
| | | | | | | | | | | | | This patch now uses the correct ECC byte order (Smart Media - SMC) to be used on the 4xx NAND FLASH driver. Without this patch we have incompatible ECC byte ordering to the Linux kernel NDFC driver. Please note that we also have to enable CONFIG_MTD_NAND_ECC_SMC in drivers/mtd/nand/nand_ecc.c for correct operation. This is done with a seperate patch. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Scott Wood <scottwood@freescale.com>
* ppc4xx: Move definition for PPC4xx NAND FLASH controller to headerStefan Roese2009-05-23-6/+10
| | | | | | | | | This patch moves the definition for the PPC4xx NAND FLASH controller (NDFC) CONFIG_NAND_NDFC into include/ppc4xx.h. This is needed for the upcoming fix for the ECC byte ordering of the NDFC driver. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Scott Wood <scottwood@freescale.com>
* Merge branch 'master' of git://git.denx.de/u-boot-ubiWolfgang Denk2009-05-20-1/+1
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