| Commit message (Collapse) | Author | Age | Lines |
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To boot a auxiliary core in asymmetric multicore system, introduce the
new command "bootaux" to do it.
Example of boot auxliary core from 0x70000000 where stores the boot head
information that should be parsed by each core.
"bootaux 0x70000000"
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit fd00c322d058e02953a336517547174edaf2c573)
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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When gis enable in uboot, the CSI0 input mux select setting
to vadc module, clean the bit when gis disabled.
Signed-off-by: Sandor Yu <R01008@freescale.com>
(cherry picked from commit ae66b17b7da3be50dc81ca636b67e8e879f52e26)
(cherry picked from commit c83fd326e810c2fff44b8b02e78406d5d04c977c)
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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The android boot needs get_board_serial function to get the
CPU uid as the serial number. Implement this function to read
the uid from fuse for all iMX6 platforms.
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit 8d355a9d6f138e1c1cd04dbadb7b5b3e2d692701)
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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Since the iMX6SL does not have PCIE module, should not define the
function "imx_set_pcie_phy_power_down" for it. Otherwise, get the
build warning below:
arch/arm/cpu/armv7/mx6/soc.c:446:13: warning: 'imx_set_pcie_phy_power_down'
defined but not used [-Wunused-function]
static void imx_set_pcie_phy_power_down(void)
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit 987c48c07c9ef62fa3fe55faa6f7369b30637127)
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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imx6sl doesn't have the pcie module, mask the pcie
related codes from imx6sl.
Signed-off-by: Richard Zhu <r65037@freescale.com>
(cherry picked from commit acaff11da33f8f0cb1521d3c48e64e7ed9a87bec)
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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There are about 0.02% percentage on some imx6q/dl/solo
hw boards, random pcie link down when warm-reset is used.
Make sure to clear the ref_ssp_en bit16 of gpr1 before
warm-rst, and set ref_ssp_en after the pcie clks are
stable to workaround it.
rootcause:
* gpr regisers wouldn't be reset by warm-rst, while the
ref_ssp_en is required to be reset by pcie.
(work-around in u-boot)
* ref_ssp_en should be set after pcie clks are stable.
(work-around in kernel)
Signed-off-by: Richard Zhu <r65037@freescale.com>
(cherry picked from commit 5cc825b12c6b86a22f1a6a0535b52cf3ee142e77)
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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Add vadc power up/down function.
Signed-off-by: Sandor Yu <R01008@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit 96d990ef754a879f6ca9da4adf6e0be3d21cdc51)
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Conflicts:
arch/arm/include/asm/arch-mx6/imx-regs.h
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Add vadc clock enable function.
Signed-off-by: Sandor Yu <R01008@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit 721c7a1448c5b7265b597b83d18f8338a27ea213)
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Conflicts:
arch/arm/cpu/armv7/mx6/clock.c
arch/arm/include/asm/arch-mx6/clock.h
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Add registers and clock functions to enable/set LCDIF clock and LVDS.
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit ef9d769f9ad1b504a1df8b987d269df9944d8e0c)
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Conflicts:
arch/arm/include/asm/arch-mx6/clock.h
arch/arm/include/asm/arch-mx6/crm_regs.h
arch/arm/include/asm/arch-mx6/imx-regs.h
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Implement the override function "arch_auxiliary_core_up" to boot
Cortex-M4 by executing command "bootaux".
The parameter "boot_private_data" points to fields where stores
the stack address and PC address for M4 to run.
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit 98c15deb3083d5dac7900c58e95f2ac2f422a4d3)
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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iMX6SX has different enet system clocks with iMX6SL, and has two ENET
controllers. So update clocks and soc APIs accordingly to support this
features.
1. Enet RGMII TX clock source may come from external or internal PLL.
By default, use the external phy CLK_25M output as TX clock source.
When using internal PLL as source, the function enable_fec_anatop_clock
must be called to enable clock for each enet controller.
2. Modify the MAC address function "imx_get_mac_from_fuse" to get either
ENET MAC address.
3. Add configuration "CONFIG_FEC_MXC_25M_REF_CLK" to enable ENET 25Mhz
reference clock.
Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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shutdown vddpu and pcie phy to save power
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Jason Liu <r64343@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
(cherry picked from commit 580011f86caf137d59a487694f6f7da042164e05)
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Conflicts:
arch/arm/cpu/armv7/mx6/soc.c
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-Change HDMI video mode to VGA.
-Add pixel clock fraction part setting in IPU driver,
fix video mode timing issue.
-Add overflow state clear workaround,
fix kernel hang in HDMI driver issue.
-Correct IPU clock to 264MHz.
Signed-off-by: Sandor Yu <R01008@freescale.com>
Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
(cherry picked from commit 45d532a0237f5baf2ec95b4364ec5bc94d312689)
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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This patch is from two commits:
1.
748eac71fde78aa0c2e8cb3a3bab94bd994c06f5
ENGR00315499-5: Support i.MX6 1.2GHz via LDO bypass
Add check for 1.2GHz core speed. If Speed grading fuse is for 1.2GHz,
enable LDO bypass and setup PMIC voltages. LDO bypass is dependent
on the flatten device tree file.
2.
93d457e4c601ee5266bc30b7dfa5fa1bbfa8500a
MLK-9891-1: ARM: imx6: split WDOG_B setting from set_anatop_bypass() function
We set WDOG_B in set_anatop_bypass() before, because it is the only case, but now
on i.mx6sabreauto board, we didn't use ldo-bypass mode, but have to use WDOG_B to
reboot whole board, so split these code to independent function so that board file
can call it freely.
Board code is not included, board ldo bypass code will be in bsp update code.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
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Signed-off-by: Tom Rini <trini@konsulko.com>
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Add an error in known-bad case so that we don't produce broken and
hard to debug binaries.
Signed-off-by: Pavel Machek <pavel@denx.de>
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Add support for Inverse Path USB armory board, an open source
flash-drive sized computer based on Freescale i.MX53 SoC.
http://inversepath.com/usbarmory
Signed-off-by: Andrej Rosano <andrej@inversepath.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Chris Kuethe <chris.kuethe@gmail.com>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Vagrant Cascadian <vagrant@debian.org>
Tested-By: Vagrant Cascadian <vagrant@debian.org>
Tested-by: Chris Kuethe <chris.kuethe@gmail.com>
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Move the MX5 based boards to arch/arm/cpu/armv7/mx5, following the
commit: 89ebc82137bebb11a8191f8b9cbf08f2533ae8bc
Signed-off-by: Andrej Rosano <andrej@inversepath.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Vagrant Cascadian <vagrant@debian.org>
Tested-by: Chris Kuethe <chris.kuethe@gmail.com>
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Include/fsl_sec.h defines sec_in and sec_out, according to the
platform's endianess. Therefore, CONFIG_SYS_FSL_LE needs to be
declared in the configuration file of the target, in order to use
enable the DEK blob generation command. This requirement is not
explicit in the README.mxc_hab.
Signed-off-by: Ulises Cardenas <Ulises.Cardenas@freescale.com>
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Since commit 32df39c741788e ("mx5: fix get_reset_cause") we have the following
boot messages on a mx53qsb:
U-Boot 2015.04-rc5-00029-gd68df02 (Apr 06 2015 - 11:15:39)
CPU: Freescale i.MX53 rev2.1 at 800 MHz
Reset cause: POR
Board: MX53 LOCO
I2C: ready
DRAM: 1 GiB
MMC: FSL_SDHC: 0, FSL_SDHC: 1
In: serial
Out: serial
Err: serial
CPU: Freescale i.MX53 rev2.1 at 1000 MHz
Reset cause: unknown reset
Net: FEC [PRIME]
The CPU and Reset cause lines appear twice.
Initially mx53 boots at 800MHz, then at a later point the PMIC is configured via
I2C to raise the CPU voltage so that it can run at 1GHz.
To avoid such misleading double printings, disable printing cpu info for now.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Jason Liu <r64343@freescale.com>
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According to Gordon Henderson's WiringPi library, there are some more
Pi revision IDs out there. Add support for them.
http://git.drogon.net/?p=wiringPi;a=blob_plain;f=wiringPi/wiringPi.c;hb=5edd177112c99416f68ba3e8c6c4db6ed942e796
At least ID 0x13 is out in the wild:
Reported-by: Chee-Yang Chau <cychau@gmail.com>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
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Since commit 79d75d752717 (ARM: move -march=* and -mtune= options to
arch/arm/Makefile), all the Tegra boards are broken because the SPL
is built for ARMv7.
Insert Tegra-specific code to arch/arm/Makefile to set compiler
flags for an earlier ARM architecture.
Note:
The v1 patch for commit 79d75d752717 *was* correct when it was
submitted. Notice it was originally written for multi .config
configuration where Kconfig set CONFIG_CPU_V7/CONFIG_CPU_ARM720T for
Tegra U-Boot Main/SPL, respectively. But, until it was merged into
the mainline, commit e02ee2548afe (kconfig: switch to single .config
configuration) had been already applied there.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reported-by: Stephen Warren <swarren@nvidia.com>
Reported-by: Jan Kiszka <jan.kiszka@siemens.com>
Tested-by: Jan Kiszka <jan.kiszka@siemens.com>
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Patch e11c6c27 (arm: Allow lr to be saved by board code) introduced
a different method to return from save_boot_params(). The SPL support
for AXP has been pulled and changing to this new method is now
required for SPL to work correctly.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Luka Perkov <luka.perkov@sartura.hr>
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While testing "arc: make sure _start is in the beginning of .text
section" I haven't done proper clean-up of built binaries and so missed
another tiny bit that lead to the following error:
--->8---
LD u-boot
arc-linux-ld.bfd: cannot find arch/arc/lib/start.o
Makefile:1107: recipe for target 'u-boot' failed
make: *** [u-boot] Error 1
--->8---
Fix is trivial: put "start.o" in "extra-y".
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
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This is important to have entry point in the beginning of .text section
because it allows simple loading and execution of U-Boot.
For example pre-bootloader loads U-Boot in memory starting from offset
0x81000000 and then just jumps to the same address.
Otherwise pre-bootloader would need to find-out where entry-point is. In
its turn if it deals with binary image of U-Boot there's no way for
pre-bootloader to get required value.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
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There're 2 versions of motherboards that could be used in ARC SDP.
The only important difference for U-Boot is different NAND IC in use:
[1] v2 board (we used to support up until now) sports MT29F4G08ABADAWP
while
[2] v3 board sports MT29F4G16ABADAWP
They are almost the same except data bus width 8-bit in [1] and 16-bit
in [2]. And for proper support of 16-bit data bus we have to pass
NAND_BUSWIDTH_16 option to NAND driver core - which we do now knowing
board type we're running on.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
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This consolidates the flash settings for the Integrator
and activates the new ARM flash image support for them
so images can be loaded by name from flash.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This modifies the vexpress64 Juno configuration so that
it will by default load and boot a kernel and a device tree
from the images stored in the NOR flash. When we are
at it, also define the proper command line for the Juno and
indicate that the USB stick (/dev/sda1) is the default
root file system.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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The ARM reference designs all use a special flash image format
that stores a footer (two versions exist) at the end of the last
erase block of the image in flash memory.
Version one of the footer is indicated by the magic number
0xA0FFFF9F at 12 bytes before the end of the flash block and
version two is indicated by the magic number 0x464F4F54 0x464C5348
(ASCII for "FLSHFOOT") in the very last 8 bytes of the erase block.
This command driver implements support for both versions of the
AFS images (the name comes from the Linux driver in drivers/mtd/afs.c)
and makes it possible to list images and load an image by name into
the memory with these commands:
afs - lists flash contents
afs load <image> - loads image to address indicated in the image
afs load <image> <addres> - loads image to a specified address
This image scheme is used on the ARM Integrator family, ARM
Versatile family, ARM RealView family (not yet supported in U-Boot)
and ARM Versatile Express family up to and including the new
Juno board for 64 bit development.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This function should not return a value.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Thomas Chou <thomas@wytron.com.tw>
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Work_92105 from Work Microwave is an LPC3250-
based board with the following features:
- 64MB or 128MB SDR DRAM
- 1 GB SLC NAND, managed through MLC controller.
- Ethernet
- Ethernet + PHY SMSC8710
- I2C:
- EEPROM (24M01-compatible)
- RTC (DS1374-compatible)
- Temperature sensor (DS620)
- DACs (2 x MAX518)
- SPI (through SSP interface)
- Port expander MAX6957
- LCD display (HD44780-compatible), controlled
through the port expander and DACs
This board has SPL support, and uses the LPC32XX boot
image format.
Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
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introduce CONFIG_SPL_PANIC_ON_RAW_IMAGE.
An SPL which define this will panic() if the
image it has loaded does not have a mkimage
signature.
Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
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Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
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Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
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Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
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This driver only supports Driver Model, not legacy model.
Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
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Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
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The controller's Reed-Solomon ECC hardware is
used except of course for raw reads and writes.
It covers in- and out-of-band data together.
The SPL framework is supported.
Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
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Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
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My main motivations for this commit are:
[1] Follow the arch/arm/Makefile style of Linux Kernel
[2] Maintain compiler options systematically
Currently, we give -march=* and -mtune=* options inconsistently:
Only some of the CPUs pass -march=* and -mtune=* options.
By collecting such options into the single place arch/arm/Makefile
we can tell which options are missing at a glance.
[3] Prepare for deprecating arch/*/cpu/*/config.mk
Note:
This commit just moves the compiler options so as not to change
the behavior at all. It does not care about the correctness of
the given options. Fox example, "-march=armv5te" might be better
than "-march=armv4" for ARM946EJS, but it is beyond the scope this
commit. Also, filling the missing -march=* and -tune=* is left
to follow-up patches.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
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The ubi check command is expected to not fail and just check whether
a volume exist or not. Currently, when a volume does not exist, the
command fails which leads to an error:
"exit not allowed from main input shell."
Use 1 to indicate that a volume does not exist. This allows to use
ubi check in an if statement, e.g.
if ubi check rootfs; then; echo "exists"; else; echo "not there"; fi
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This allows to clean up the config a good deal and also converts
pandora to Generic Board.
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
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At present Hyungwon can't take care of this board in U-Boot,
so I will keep it working.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Hyungwon Hwang <human.hwang@samsung.com>
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Remove obsolete email address from MAINTAINERS.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Tom Rini <trini@konsulko.com>
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Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
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