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* imx: ventana: config: use explicit addr in loadscriptTim Harvey2016-05-31-1/+1
| | | | | | | If we are loading a script to ${loadaddr} then we need to use that address explicitly when calling the source command in case user has changed loadaddr Signed-off-by: Tim Harvey <tharvey@gateworks.com>
* imx: ventana: config: use fs env var for block dev filesystem typeTim Harvey2016-05-31-7/+8
| | | | | | | | | | | In order to make the default boot scripts more flexible, use the variable 'fs' to specify the filesystem type to use for block storage devices (USB/MMC/SATA) when loading files. Additionally default this to ext4 and enable ext4 filesystem support (which encompasses ext2 support) instead of just ext2 support. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
* imx: ventana: config: use bootdir env var for directory of fdt filesTim Harvey2016-05-31-6/+6
| | | | | | | In order to make the default boot scripts more flexible, use the variable 'bootdir' to specify the filesystem directory to look for fdt files in. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
* imx: ventana: config: add fixfdt script to apply manual fdt fixupsTim Harvey2016-05-31-10/+15
| | | | Signed-off-by: Tim Harvey <tharvey@gateworks.com>
* imx: ventana: config: add env vars for disk and partTim Harvey2016-05-31-4/+8
| | | | | | | | In order to make the default boot scripts more flexible, use the variable 'disk' to specify the disk device number and the variable 'part' to specify the partition number. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
* ts4800: add CONFIG_SYS_FSL_ERRATUM_ESDHC_A001Sebastien Bourdelin2016-05-24-0/+2
| | | | | | | | | | | | | | | This commit fixes the MMC data transactions timeout problem on the TS4800. The changes introduced in the commit e978a31 on the timeout calculation for the MMC data transactions has revealed there is something wrong with the timeout setting of the eSDHC controller used in the IMX51. The IMX51 seems to be concerned by this erratum and without this change the MMC driver is unable to do any transactions. Signed-off-by: Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
* ts4800: update environment to boot with device treeDamien Riegel2016-05-24-4/+13
| | | | | | | | | | This commit updates the environment variables to be able to boot with a device tree. The expected partition layout on the SD card is: - partition 1: type 0xDA, contains u-boot.bin - partition 2: type 0xC (fat), contains zImage and device tree - partition 3: type 0x83, root filesystem. Signed-off-by: Damien Riegel <damien.riegel@savoirfairelinux.com>
* imx: ventana: remove SPL_EXT_SUPPORTTim Harvey2016-05-24-0/+1
| | | | | | | | Remove SPL_EXT_SUPPORT to resolve build issue. It may be useful to bring it back in the future after comparing its merits to storing the args/kernel in fixed raw locations. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
* imx: ventana: use EEPROM register for falcon boot modeTim Harvey2016-05-24-13/+12
| | | | | | | | | NAND+MMC env support costs 12KB in the SPL which is fairly expensive just for the ability to specify whether or not to boot to uboot or directly to linux. The Ventana boards have plenty of EEPROM storage so we will use a byte there to signify if we should boot to the bootloader or to the OS. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
* imx: ventana: gsc: remove dependence on envTim Harvey2016-05-24-2/+2
| | | | | | remove dependence on getenv() by using global board info struct for model. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
* imx: ventana: config: remove redundant configTim Harvey2016-05-24-3/+0
| | | | | | remove redundant define that exists in mx6_common.h Signed-off-by: Tim Harvey <tharvey@gateworks.com>
* board: mx6sabresd/auto: use simpler runtime cpu dection macrosPeng Fan2016-05-24-4/+4
| | | | | | | | Use simpler runtime cpu dection macros. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
* block: dwc_ahsata: support i.MX6DQPlusPeng Fan2016-05-24-1/+1
| | | | | | | | | | | | | | | i.MX6DQPlus support sata interface, so not return failure when CPU is i.MX6DQPlus. In this patch, also use simpler runtime cpu dections macros to replace is_cpu_type. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Tang Yuantian <Yuantian.Tang@freescale.com> Cc: Shaohui Xie <Shaohui.Xie@freescale.com> Cc: Bin Meng <bmeng.cn@gmail.com>
* net: fec_mxc: use simpler runtime cpu dection macrosPeng Fan2016-05-24-1/+1
| | | | | | | | Use simpler runtime cpu dection macros. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com>
* ocotp: mxc: use simpler runtime cpu dection macrosPeng Fan2016-05-24-2/+2
| | | | | | | Use simpler runtime cpu dection macros. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Stefano Babic <sbabic@denx.de>
* mtd: nand: mxs: use simpler runtime cpu dection macrosPeng Fan2016-05-24-1/+1
| | | | | | | | Use simpler runtime cpu dection macros. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Scott Wood <oss@buserror.net>
* imx-common: timer: support i.MX6DQPlusPeng Fan2016-05-24-1/+1
| | | | | | | | To i.MX6DQPlus, osc can be choosed as the source of gpt, so add i.MX6DQPlus support in gpt_has_clk_source_osc. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Stefano Babic <sbabic@denx.de>
* imx-common: sata: return failure if not i.MX6DQPlusPeng Fan2016-05-24-1/+1
| | | | | | | | The i.MX6DQPlus support sata interface, we should not return failure when CPU is i.MX6DQPlus. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Stefano Babic <sbabic@denx.de>
* imx-common: hab: support i.MX6DQPlusPeng Fan2016-05-24-0/+10
| | | | | | | | | Support i.MX6DQPlus, otherwise wrong hab address will be used for i.MX6QDPlus. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Ulises Cardenas <Ulises.Cardenas@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
* imx: mx6: correct get_cpu_speed_grade_hz for i.MX6DQPPeng Fan2016-05-24-2/+2
| | | | | | | | Correct get_cpu_speed_grade_hz for i.MX6DQP, otherwise we will get wrong speed grade info i.MX6DQP. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Stefano Babic <sbabic@denx.de>
* imx: mx6: ddr: support i.MX6D/QPlusPeng Fan2016-05-24-2/+2
| | | | | | | Support i.MX6D/QPlus. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Stefano Babic <sbabic@denx.de>
* imx-common: use simpler runtime cpu dection macrosPeng Fan2016-05-24-48/+20
| | | | | | | | | Use simpler runtime cpu dection macros. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Cc: "Benoît Thébaudeau" <benoit.thebaudeau.dev@gmail.com>
* imx-common: hab: support i.MX6SOLOPeng Fan2016-05-24-5/+10
| | | | | | | | | | | | Add i.MX6SOLO support for hab function. The difference between i.MX6SOLO and i.MX6DL is the number of CPU cores. Besides this, they work the same. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Cc: "Benoît Thébaudeau" <benoit.thebaudeau.dev@gmail.com> Cc: Stefano Babic <sbabic@denx.de>
* imx: mx6: use simpler runtime cpu dection macrosPeng Fan2016-05-24-36/+29
| | | | | | | | Use simpler runtime cpu dection macros. i.MX6DL and i.MX6SOLO work the same, so use is_mx6sdl. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Stefano Babic <sbabic@denx.de>
* imx: mx6: support i.MX6SOLO when enable/disable_ldb_di_clock_sourcesPeng Fan2016-05-24-2/+2
| | | | | | | | i.MX6DL and i.MX6SOLO work the same, add i.MX6SOLO support when enable/disable_ldb_di_clock_sources. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Stefano Babic <sbabic@denx.de>
* imx-common: introduce simpler macros for runtime dectionPeng Fan2016-05-24-0/+8
| | | | | | | | Introduce simpler macros for runtime cpu dection. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
* Merge branch 'master' of git://git.denx.de/u-bootStefano Babic2016-05-24-3115/+13571
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| * Merge branch 'master' of git://git.denx.de/u-boot-mipsTom Rini2016-05-23-67/+6448
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| | * malta: Support MIPS32r6 configurationsPaul Burton2016-05-21-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Both real Malta boards & QEMU's Malta emulation can feature MIPS32r6 CPUs. Allow building U-Boot for such systems by selecting CONFIG_SUPPORTS_CPU_MIPS32_R6 for Malta. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
| | * malta: Remove ".set mips32" directivePaul Burton2016-05-21-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We always build for a mips32 or higher ISA, so this ".set mips32" directive is redundant. Once MIPSr6 support is added it will become harmful since some instruction encodings change & this directive will cause the older encodings to be incorrectly emitted instead of the appropriate ones for the build. In preparation for supporting MIPSr6, remove this redundant directive. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
| | * MIPS: Support for targetting MIPSr6Paul Burton2016-05-21-6/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for targetting MIPS32r6 & MIPS64r6 systems, in the same way that we currently select release 1 or release 2 targets. MIPSr6 is not entirely backwards compatible with earlier releases of the architecture. Some instructions are encoded differently, some are removed, some are reused, so it is not practical to run U-Boot built for earlier revisions on a MIPSr6 system. Update their Kconfig help text to reflect that. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
| | * MIPS: Simplify CONFIG_SYS_CPU valuesPaul Burton2016-05-21-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rather than having the values for CONFIG_SYS_CPU depend upon each architecture revision, have them depend upon the more general CONFIG_CPU_MIPS32 & CONFIG_CPU_MIPS64 which in turn depend upon the architecture revisions. This is done in preparation for adding MIPSr6 support, which would otherwise need to introduce new cases here. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
| | * MIPS: Use unchecked immediate addition/subtractionPaul Burton2016-05-21-11/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In MIPS assembly there have historically been 2 variants of immediate addition - the standard "addi" which traps if an overflow occurs, and the unchecked "addiu" which does not trap on overflow. In release 6 of the MIPS architecture the trapping variants of immediate addition & subtraction have been removed. In preparation for supporting MIPSr6, stop using the trapping instructions from assembly & switch to their unchecked variants. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
| | * mips: ath79: Add support for TPLink WDR4300Marek Vasut2016-05-21-0/+295
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the TPLink WDR4300 router, which is based on the AR9344 MIPS 74Kc CPU and has 128 MiB of RAM. The USB is supported on this system as well. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com>
| | * mips: ath79: Add AR934x supportMarek Vasut2016-05-21-1/+683
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the Atheros AR934x WiSoCs. This patchs adds complete system init, including PLL and DRAM init, both of which happen from full C environment, since the AR934x has proper SRAM. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com>
| | * mips: ath79: Add support for ungating ethernet on ar933x and ar934xMarek Vasut2016-05-21-0/+80
| | | | | | | | | | | | | | | | | | | | | | | | Add code to ungate the ethernet controller on ar933x and ar934x . Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com>
| | * mips: ath79: dts: Add ethernet MAC nodes for ar933xMarek Vasut2016-05-21-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add node for both ethernet controllers in the ar933x. The PHY is attached only to the first ethernet controller. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com>
| | * mips: ath79: Add support for ungating USB on ar933x and ar934xMarek Vasut2016-05-21-0/+61
| | | | | | | | | | | | | | | | | | | | | | | | Add code to ungate the USB controller on ar933x and ar934x . Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com>
| | * mips: ath79: dts: Add generic-ehci nodeMarek Vasut2016-05-21-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | Add generic EHCI node for the ChipIdea EHCI controller in the ath79. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com>
| | * mips: ath79: Fix compiler warning on const assignmentMarek Vasut2016-05-21-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | The assignment const T var; var = value; is illegal, since var is constant. Drop the const to fix the compiler warning. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com>
| | * mips: ath79: Fix ar71xx_regs.h indentMarek Vasut2016-05-21-1034/+1069
| | | | | | | | | | | | | | | | | | | | | | | | | | | The indent in this file triggers my OCD, so fix it. Replace multiple spaces with tabs and align the values in one column. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com>
| | * mips: Add MIPS 74Kc tuneMarek Vasut2016-05-21-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add MIPS 74Kc tune Kconfig option. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com> [added missing tune-y entry in arch/mips/Makefile] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| | * mips: Fix compiler warning in cpu.cMarek Vasut2016-05-21-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There really is zero reason for including netdev.h in generic mips CPU code. Removing the netdev.h from cpu.c also fixes the following compiler warning: In file included from arch/mips/cpu/cpu.c:10:0: include/netdev.h:204:41: warning: 'struct eth_device' declared inside parameter list [enabled by default] int fecmxc_register_mii_postcall(struct eth_device *dev, int (*cb)(int)); ^ include/netdev.h:204:41: warning: its scope is only this definition or declaration, which is probably not what you want [enabled by default] Signed-off-by: Marek Vasut <marex@denx.de> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| | * ath79: add readonly attribute for ath79_soc_descWills Wang2016-05-21-4/+4
| | | | | | | | | | | | | | | | | | use 'const' keywork to qualify readonly attribute for lookup-table member Signed-off-by: Wills Wang <wills.wang@live.com>
| | * ath79: ar933x: use BIT macro for bit shift operationWills Wang2016-05-21-7/+7
| | | | | | | | | | | | | | | | | | used a uniform BIT macro for register bit-field shift Signed-off-by: Wills Wang <wills.wang@live.com>
| | * ar933x: serial: Remove the explicit pinctrl settingWills Wang2016-05-21-14/+2
| | | | | | | | | | | | | | | | | | | | | The correct pinctrl is handled automatically so we don't need to do it in the driver. Signed-off-by: Wills Wang <wills.wang@live.com>
| | * ath79: spi: Remove the explicit pinctrl settingWills Wang2016-05-21-12/+0
| | | | | | | | | | | | | | | | | | | | | The correct pinctrl is handled automatically so we don't need to do it in the driver. Signed-off-by: Wills Wang <wills.wang@live.com>
| | * mips: Report reloc information in bdinfoTim Chick2016-05-21-0/+2
| | | | | | | | | | | | Signed-off-by: Tim Chick <tim.chick@mediatek.com>
| | * drivers: mtd: add Microchip PIC32 internal non-CFI flash driver.Purna Chandra Mandal2016-05-21-0/+452
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PIC32 internal flash devices are parallel NOR flash divided into number of banks to allow erase-programming in one while fetch and execution continues on other. As the flash banks are memory mapped stored code can be executed directly from flash (XIP), also there is additional hardware logic to prefetch and cache contents to improve execution performance. These flash can also be used to store user data (like environment). Flash erase and programming are handled by on-chip NVM controller. Driver implemented driver model but MTD is not really support. Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| | * flash: add device ID for Microchip PIC32 internal flash.Purna Chandra Mandal2016-05-21-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | Microchip PIC32 has internal parallel flash (non-CFI compliant). These flash devices do not support any identifier command so no standard IDs. Added unique IDs to seperate these flash devices from others supported by U-Boot. Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
generated by cgit v1.1 at 2024-09-17 19:37:17 +0000