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* mx6ul_14x14_evk: Remove empty reset_cpu()Fabio Estevam2015-11-12-4/+0
| | | | | | | There is really no need to provide an empty reset_cpu() implementation, so just remove it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx6sxsabresd: Remove empty reset_cpu()Fabio Estevam2015-11-12-4/+0
| | | | | | | There is really no need to provide an empty reset_cpu() implementation, so just remove it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx6slevk: Remove empty reset_cpu()Fabio Estevam2015-11-12-4/+0
| | | | | | | There is really no need to provide an empty reset_cpu() implementation, so just remove it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx6sabresd: Remove empty reset_cpu()Fabio Estevam2015-11-12-4/+0
| | | | | | | | There is really no need to provide an empty reset_cpu() implementation, so just remove it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
* arm: imx: Switch mx6cuboxi to use config_distro_bootcmd.h.Vagrant Cascadian2015-11-12-64/+24
| | | | | | | | | | This allows for more flexible and standardized boot across multiple platforms. Remove redundant legacy boot environment. Cc: Otavio Salvador <otavio@ossystems.com.br> Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
* arm: imx: Switch Wandboard to use config_distro_bootcmd.h.Vagrant Cascadian2015-11-12-63/+19
| | | | | | | | | This allows for more flexible and standardized boot across multiple platforms. Remove redundant legacy boot environment. Signed-off-by: Vagrant Cascadian <vagrant@debian.org>
* mx7dsabresd: enable DFU supportTzu-Jung Lee2015-11-12-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | On the target board: => dfu 0 mmc 0 On the host PC: $ dfu-util -l Found DFU: [0525:a4a5] devnum=0, cfg=1, intf=0, alt=0, name="image" Found DFU: [0525:a4a5] devnum=0, cfg=1, intf=0, alt=1, name="u-boot" Found DFU: [0525:a4a5] devnum=0, cfg=1, intf=0, alt=2, name="bootimg" Found DFU: [0525:a4a5] devnum=0, cfg=1, intf=0, alt=3, name="rootfs" Update with a full SD image $ dfu-util -a image -D core-image-minimal-imx7dsabresd.sdcard Update u-boot only $ dfu-util -a u-boot -D u-boot.imx Signed-off-by: Tzu-Jung Lee <roylee17@currantlabs.com> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
* Merge git://git.denx.de/u-bootStefano Babic2015-11-12-2246/+13346
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| * nios2: add 3c120 and 10m50 devboards MAINTAINERSThomas Chou2015-11-12-0/+13
| | | | | | | | | | | | | | Add 3c120 and 10m50 devboards MAINTAINERS Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Acked-by: Marek Vasut <marex@denx.de>
| * nios2: change README.nios2 to use 10m50 as templateThomas Chou2015-11-12-7/+7
| | | | | | | | | | | | | | | | The 10m50 devboard becomes the new golden reference design of Nios II Linux. So change README.nios2 to use 10m50 as template. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Acked-by: Marek Vasut <marex@denx.de>
| * nios2: rename board nios2-generic to 3c120_devboardThomas Chou2015-11-12-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Rename board nios2-generic to 3c120_devboard. Since nios2 is converted to driver model and device tree control of u-boot, the nios2-generic board directory is removed. We can rename the board back to a real board name. Now the boards maintained in u-boot mainline are the same as Linux kernel, namely 3c120 and 10m50. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Marek Vasut <marex@denx.de> Acked-by: Marek Vasut <marex@denx.de>
| * nios2: add 10m50 devboard supportThomas Chou2015-11-12-0/+396
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add 10m50 devboard support. It is based on the Golden Hardware Reference Design (GHRD), available at, http://rocketboards.org/foswiki/view/Documentation/ AlteraMAX1010M50RevCDevelopmentKitLinuxSetup Though we supported only one nios2-generic board in the past. Now, with the removal of the nios2-generic board dir, adding new nios2 boards to u-boot is easier than before. It should be helpful to add those boards supported in Linux mainline. There are only two such nios2 boards, the 3c120 devboard and 10m50 devboard. The nios2-generic is actually 3c120, and should restore the name. The 10m50 is this one. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Marek Vasut <marex@denx.de>
| * net: altera_tse: add mSG-DMA supportThomas Chou2015-11-12-0/+191
| | | | | | | | | | | | | | | | | | | | | | The Modular Scatter-Gather DMA core is a new DMA core to work with the Altera Triple-Speed Ethernet MegaCore. It replaces the legacy Scatter-Gather Direct Memory Access (SG-DMA) controller core. Please find details on the "Embedded Peripherals IP User Guide" of Altera. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Marek Vasut <marex@denx.de>
| * net: altera_tse: add priv ops to prepare msgdma supportThomas Chou2015-11-12-25/+81
| | | | | | | | | | | | | | | | Add priv ops to prepare msgdma support. These ops are dma type specific. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Marek Vasut <marex@denx.de>
| * net: altera_tse: wait sgdma in altera_tse_recvThomas Chou2015-11-12-1/+1
| | | | | | | | | | | | | | | | Move the sgdma wait from free_pkt to recv. This is the proper place to wait recv sgdma done. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Marek Vasut <marex@denx.de>
| * net: altera_tse: factor out stop mac funcThomas Chou2015-11-12-15/+21
| | | | | | | | | | | | | | Factor out the stop mac function to prepare msgdma support. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Marek Vasut <marex@denx.de>
| * net: zap altera_tse_initialize prototypesThomas Chou2015-11-12-3/+0
| | | | | | | | | | | | | | | | Zap the altera_tse_initialize() prototypes, since it is converted to driver model. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Marek Vasut <marex@denx.de>
| * nios2: nios2-generic: do not allocate rx buf in net.cThomas Chou2015-11-12-1/+2
| | | | | | | | | | | | | | Do not allocate rx buf in net.c, because altera_tse allocates its own rx buf in driver. This can save 6KB memory. Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
| * mtd: add altera quadspi driverThomas Chou2015-11-12-0/+318
| | | | | | | | | | | | | | | | Add Altera Generic Quad SPI Controller support. The controller converts SPI NOR flash to parallel flash interface. So it is not like other SPI flash, but rather like CFI flash. Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
| * nios2: add memcpy_fromio and memcpy_toioThomas Chou2015-11-12-0/+4
| | | | | | | | | | | | Add memcpy_fromio() and memcpy_toio(). Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
| * nios2: use cfi flash driver modelThomas Chou2015-11-12-2/+3
| | | | | | | | | | | | Use cfi flash driver model. Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
| * cfi_flash: convert to driver modelThomas Chou2015-11-12-0/+177
| | | | | | | | | | | | | | Convert cfi flash to driver model. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Simon Glass <sjg@chromium.org>
| * dm: implement a MTD uclassThomas Chou2015-11-12-0/+63
| | | | | | | | | | | | | | | | | | | | | | | | Implement a Memory Technology Device (MTD) uclass. It should include most flash drivers in the future. Though no uclass ops are defined yet, the MTD ops could be used. The NAND flash driver is based on MTD. The CFI flash and SPI flash support MTD, too. It should make sense to convert them to MTD uclass. Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
| * ARM: uniphier: drop UniPhier specific SMP codeMasahiro Yamada2015-11-11-61/+0
| | | | | | | | | | | | | | | | | | | | | | The latest Linux can directly handle SMP operations for UniPhier SoCs without any help of U-boot. Drop the relevant code from U-boot. See commit b1e4006aeda8c8784029de17d47987c21ea75f6d ("ARM: uniphier: rework SMP operations to use trampoline code") in Linux Kernel. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com>
| * ARM: dts: uniphier: add USB xHCI nodes for PH1-Pro5 and ProXstream2Masahiro Yamada2015-11-11-0/+60
| | | | | | | | | | | | | | This makes USB3.0 available on new SoCs/boards. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * ARM: dts: uniphier: fix interrupt number of USB core for PH1-Pro4Masahiro Yamada2015-11-11-1/+1
| | | | | | | | | | | | | | The IRQ is not used in U-Boot, but this would be useful to sync device trees between Linux and U-Boot. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2015-11-10-17/+855
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| | * ARM: tegra: enable CONFIG_SYS_NONCACHED_MEMORY everywhereStephen Warren2015-11-10-2/+0
| | | | | | | | | | | | | | | | | | | | | Now that we have solved the problems that prevented this feature from being enabled, enable it everywhere. Signed-off-by: Stephen Warren <swarren@nvidia.com>
| | * ARM: tegra: add custom MMU setup on ARMv8Stephen Warren2015-11-10-0/+132
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This sets up a fine-grained page table, which is a requirement for noncached_init() to operate correctly. MMU setup code currently exists in a number of places: - A version in the core ARMv8 support code that sets up page tables that use very large block sizes that CONFIG_SYS_NONCACHED_MEMORY doesn't support. - Enhanced versions for fsl-lsch3 and zynmq that set up finer grained page tables. Ideally, rather than duplicating the MMU setup code yet again this patch would instead consolidate all the different routines into the core ARMv8 code so that it supported all use-cases. However, this will require significant effort since there appear to be a number of discrepancies[1] between different versions of the code, and between the defines/values by some copies of the MMU setup code use and the architectural MMU documentation. Some reverse engineering will be required to determine the intent of the current code. [1] For example, in the core ARMv8 MMU setup code, three defines named TCR_EL[123]_IPS_BITS exist, but only one of them sets the IPS field and the others set a different field (T1SZ) in the page tables. As far as I can tell so far, there should be no need to set different values per exception level nor to modify the T1SZ field at all, since TTBR1 shouldn't be enabled anyway. Another example is inconsistent values for *_VA_BITS between the current core ARMv8 MMU setup code and the various SoC- specific MMU setup code. Another example is that asm/armv8/mmu.h's value for SECTION_SHIFT doesn't match asm/system.h's MMU_SECTION_SHIFT; research is needed to determine which code relies on which of those values and why, and whether fixing the incorrect value will cause any regression. Signed-off-by: Stephen Warren <swarren@nvidia.com>
| | * armv8: allow custom MMU setup routines on ARMv8Stephen Warren2015-11-10-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order for noncached_init() to operate correctly, SoCs must set up a custom page table with fine-grained (2MiB) sections, which can be configured from noncached_init(). This is currently performed by arch/arm/cpu/armv8/{fsl-lsch3,zynqmp}/cpu.c by cut/pasting and re-implementing mmu_setup, enable_caches(), etc. There are some other reasons for the duplication there though, such as enabling icache early, and enabling dcaching earlier with a different configuration. This change makes mmu_setup() a weak implementation, so that the MMU setup code can be replaced without having to duplicate other code that calls it. Signed-off-by: Stephen Warren <swarren@nvidia.com>
| | * armv8: enable compilation with CONFIG_SYS_NONCACHED_MEMORYStephen Warren2015-11-10-5/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The implementation of noncached_init() uses define MMU_SECTION_SIZE. Define this on ARM64. Move the prototype of noncached_{init,alloc}() to a location that doesn't depend on !defined(CONFIG_ARM64). Note that noncached_init() calls mmu_set_region_dcache_behaviour() which relies on something having set up translation tables with 2MB block size. The core ARMv8 MMU setup code does not do this by default, but currently relies on SoC specific MMU setup code. Be aware of this before enabling this feature on your platform! Signed-off-by: Stephen Warren <swarren@nvidia.com>
| | * ls1043ardb: Add missing config entries to MAINTAINERSFabio Estevam2015-11-10-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | ls1043ardb_nand_defconfig and ls1043ardb_sdcard_defconfig are missing in the MAINTAINERS file, so add them for completeness. Reported-by: Albert Aribaud <albert.u.boot@aribaud.net> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
| | * board/ti: Update MAINTAINERS entries with more boardsTom Rini2015-11-10-0/+5
| | | | | | | | | | | | | | | | | | | | | A few config files have been added without updating MAINTAINERS. Reported-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Tom Rini <trini@konsulko.com>
| | * arm: stm32f4: fix a bug when a random sector gets erasedVadzim Dambrouski2015-11-10-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Old sector number is not being cleared from FLASH_CR register. For example when first erased sector was 001 and then you want to erase sector 010, sector 011 gets erased instead. This patch clears old sector number from FLASH_CR register before a new one is written. Signed-off-by: Vadzim Dambrouski <pftbest@gmail.com>
| | * arm: stm32f4: fix a bug when only first sector gets erasedVadzim Dambrouski2015-11-10-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | flash_lock call is inside a for loop, so after the first iteration flash is locked and no more sectors can be erased. Move flash_lock out of the loop. Signed-off-by: Vadzim Dambrouski <pftbest@gmail.com>
| | * Revive OpenRD targetsAlbert ARIBAUD2015-11-10-3/+543
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Revert commit 7a2c1b13 which dropped OpenRD boards. Assume maintainership of OpenRD. Remove OpenRD from scrapyard. Switch OpenRD to generic board. Switch to Thumb build. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
| | * kirkwood: support CONFIG_SYS_THUMB_BUILDAlbert ARIBAUD2015-11-10-0/+6
| | | | | | | | | | | | | | | | | | | | | Kirkwood files cpu.c and cache.c cannot build in Thumb state; force them in ARM state even under CONFIG_SYS_THUMB_BUILD. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
| | * tricorder: switch to CONFIG_SYS_THUMB_BUILDAlbert ARIBAUD2015-11-10-0/+1
| | | | | | | | | | | | | | | | | | | | | The tricorder and tricorder_flash boards have grown too big. Reduce their size by building them with CONFIG_SYS_THUMB_BUILD. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
| | * arm: support Thumb-1 with CONFIG_SYS_THUMB_BUILDAlbert ARIBAUD2015-11-10-3/+154
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When building a Thumb-1-only target with CONFIG_SYS_THUMB_BUILD, some files fail to build, most of the time because they include mcr instructions, which only exist for Thumb-2. This patch introduces a Kconfig option CONFIG_THUMB2 and uses it to select between Thumb-2 and ARM mode for the aforementioned files. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
| | * stm32f429-discovery: add CONFIG_SYS_THUMB_BUILDAlbert ARIBAUD2015-11-10-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This target is ARMv7-M therefore can only build for Thumb, but it did not #define CONFIG_SYS_THUMB_BUILD, so the U-Boot code did not know it had to build for Thumb(2), not ARM. This patch is binary-invariant: builds of stm32f429-discovery with and without this patch were compared and found to differ only by their U-Boot version strings. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
| | * arm: fix compile warnings when semihosting is enabled on ARMv7M target.Vadzim Dambrouski2015-11-10-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes compile warnings like this: warning: format '%lu' expects argument of type 'long unsigned int', but argument 5 has type 'size_t' In C99 standard you can use %zu modifier to print size_t values. Signed-off-by: Vadzim Dambrouski <pftbest@gmail.com>
| | * arm: add support for semihosting for ARMv7M targetsVadzim Dambrouski2015-11-10-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If you enable CONFIG_SEMIHOSTING for STM32F429 target, you will get compile error looking like this: arch/arm/lib/semihosting.c: In function 'smh_read': {standard input}: Assembler messages: {standard input}:34: Error: invalid swi expression {standard input}:34: Error: value of 1193046 too large for field of 2 bytes at 0 scripts/Makefile.build:277: recipe for target 'arch/arm/lib/semihosting.o' failed The source of the problem is "svc #0x123456" instruction. This instruction can not be encoded using Thumb2 instruction set used by ARMv7M CPUs. ARM documentation suggests using "bkpt #0xAB" instruction instead [1]. This patch fixes compile errors and adds support for semihosting for STM32F429 or any other ARMv7M target. This change was sested on STM32F429-DISCOVERY board using OpenOCD and "smhload" u-boot command. [1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0471c/Bgbjhiea.html Signed-off-by: Vadzim Dambrouski <pftbest@gmail.com>
| * | powerpc: Finish updating u-boot*lds scripts for newer binutilsTom Rini2015-11-10-9/+0
| | | | | | | | | | | | | | | | | | | | | | | | In 522b021 we dropped 'PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4)' lines in the mpc85xx linker scripts as this is not required and breaks newer binutils. This commit cleans up the rest of the powerpc linker scripts. Signed-off-by: Tom Rini <trini@konsulko.com>
| * | board/ti: Update MAINTAINERS entries with more boardsTom Rini2015-11-10-0/+5
| | | | | | | | | | | | | | | | | | | | | A few config files have been added without updating MAINTAINERS. Reported-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Tom Rini <trini@konsulko.com>
| * | Various Makefiles: Add SPDX-License-Identifier tagsTom Rini2015-11-10-82/+169
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After consulting with some of the SPDX team, the conclusion is that Makefiles are worth adding SPDX-License-Identifier tags too, and most of ours have one. This adds tags to ones that lack them and converts a few that had full (or in one case, very partial) license blobs into the equivalent tag. Cc: Kate Stewart <kstewart@linuxfoundation.org> Signed-off-by: Tom Rini <trini@konsulko.com>
| * | mpc85xx/u-boot*.lds: remove _GLOBAL_OFFSET_TABLE_ definitionZhenhua Luo2015-11-09-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In binutils-2.25, the _GLOBAL_OFFSET_TABLE_ symbols defined by PROVIDE in u-boot.lds overrides the linker built-in symbols (https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;a=commitdiff; h=b893397a4b1316610f49819344817715e4305de9), so the linker is treating _GLOBAL_OFFSET_TABLE_ as a definition into the .reloc section. To align with the change of binutils-2.25, the _GLOBAL_OFFSET_TABLE_ symbol should not be defined in sections, and the symbols in linker generated .got section should be used(https://sourceware.org/ml/binutils/2008-09/ msg00122.html) Fixed the following build errors with binutils-2.25: | powerpc-poky-linux-gnuspe-ld.bfd: _GLOBAL_OFFSET_TABLE_ not defined in linker created .got Signed-off-by: Zhenhua Luo <zhenhua.luo@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
| * | Replace "extern inline" with "static inline"Måns Rullgård2015-11-09-133/+125
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A number of headers define functions as "extern inline" which is causing problems with gcc5. The reason is that starting with version 5.1, gcc defaults to the standard C99 semantics for the inline keyword. Under the traditional GNU inline semantics, an "extern inline" function would never create an external definition, the same as inline *without* extern in C99. In C99, and "extern inline" definition is simply an external definition with an inline hint. In short, the meanings of inline with and without extern are swapped between GNU and C99. The upshot is that all these definitions in header files create an external definition wherever those headers are included, resulting in multiple definition errors at link time. Changing all these functions to "static inline" fixes the problem since this works as desired in all gcc versions. Although the semantics are slightly different (a static inline definition may result in an actual function being emitted), it works as intended in practice. This patch also removes extern prototype declarations for the changed functions where they existed. Signed-off-by: Mans Rullgard <mans@mansr.com>
| * ARM64: zynqmp: Sync zynq_sdhci_init() declarationMichal Simek2015-11-07-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fix compilation error: drivers/mmc/zynq_sdhci.c:16:5: error: conflicting types for ‘zynq_sdhci_init’ int zynq_sdhci_init(phys_addr_t regbase) ^ In file included from drivers/mmc/zynq_sdhci.c:14:0: ./arch/arm/include/asm/arch/sys_proto.h:16:5: note: previous declaration of ‘zynq_sdhci_init’ was here int zynq_sdhci_init(unsigned long regbase); ^ Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * Merge branch 'master' of git://git.denx.de/u-boot-niosTom Rini2015-11-06-247/+158
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| | * net: altera_tse: get numbers of fdt address and size cellsThomas Chou2015-11-06-6/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | Get numbers of fdt address and size cells in altera_tse_probe(), thereby remove the assumption of one address cell and one size cell. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
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