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* mips: ath79: Add support for TPLink WDR4300Marek Vasut2016-05-21-0/+295
| | | | | | | | | | Add support for the TPLink WDR4300 router, which is based on the AR9344 MIPS 74Kc CPU and has 128 MiB of RAM. The USB is supported on this system as well. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com>
* mips: ath79: Add AR934x supportMarek Vasut2016-05-21-1/+683
| | | | | | | | | | Add support for the Atheros AR934x WiSoCs. This patchs adds complete system init, including PLL and DRAM init, both of which happen from full C environment, since the AR934x has proper SRAM. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com>
* mips: ath79: Add support for ungating ethernet on ar933x and ar934xMarek Vasut2016-05-21-0/+80
| | | | | | | | Add code to ungate the ethernet controller on ar933x and ar934x . Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com>
* mips: ath79: dts: Add ethernet MAC nodes for ar933xMarek Vasut2016-05-21-0/+26
| | | | | | | | | Add node for both ethernet controllers in the ar933x. The PHY is attached only to the first ethernet controller. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com>
* mips: ath79: Add support for ungating USB on ar933x and ar934xMarek Vasut2016-05-21-0/+61
| | | | | | | | Add code to ungate the USB controller on ar933x and ar934x . Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com>
* mips: ath79: dts: Add generic-ehci nodeMarek Vasut2016-05-21-0/+7
| | | | | | | | Add generic EHCI node for the ChipIdea EHCI controller in the ath79. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com>
* mips: ath79: Fix compiler warning on const assignmentMarek Vasut2016-05-21-1/+1
| | | | | | | | | The assignment const T var; var = value; is illegal, since var is constant. Drop the const to fix the compiler warning. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com>
* mips: ath79: Fix ar71xx_regs.h indentMarek Vasut2016-05-21-1034/+1069
| | | | | | | | | The indent in this file triggers my OCD, so fix it. Replace multiple spaces with tabs and align the values in one column. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com>
* mips: Add MIPS 74Kc tuneMarek Vasut2016-05-21-0/+4
| | | | | | | | | | Add MIPS 74Kc tune Kconfig option. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Wills Wang <wills.wang@live.com> [added missing tune-y entry in arch/mips/Makefile] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* mips: Fix compiler warning in cpu.cMarek Vasut2016-05-21-1/+0
| | | | | | | | | | | | | | | There really is zero reason for including netdev.h in generic mips CPU code. Removing the netdev.h from cpu.c also fixes the following compiler warning: In file included from arch/mips/cpu/cpu.c:10:0: include/netdev.h:204:41: warning: 'struct eth_device' declared inside parameter list [enabled by default] int fecmxc_register_mii_postcall(struct eth_device *dev, int (*cb)(int)); ^ include/netdev.h:204:41: warning: its scope is only this definition or declaration, which is probably not what you want [enabled by default] Signed-off-by: Marek Vasut <marex@denx.de> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* ath79: add readonly attribute for ath79_soc_descWills Wang2016-05-21-4/+4
| | | | | | use 'const' keywork to qualify readonly attribute for lookup-table member Signed-off-by: Wills Wang <wills.wang@live.com>
* ath79: ar933x: use BIT macro for bit shift operationWills Wang2016-05-21-7/+7
| | | | | | used a uniform BIT macro for register bit-field shift Signed-off-by: Wills Wang <wills.wang@live.com>
* ar933x: serial: Remove the explicit pinctrl settingWills Wang2016-05-21-14/+2
| | | | | | | The correct pinctrl is handled automatically so we don't need to do it in the driver. Signed-off-by: Wills Wang <wills.wang@live.com>
* ath79: spi: Remove the explicit pinctrl settingWills Wang2016-05-21-12/+0
| | | | | | | The correct pinctrl is handled automatically so we don't need to do it in the driver. Signed-off-by: Wills Wang <wills.wang@live.com>
* mips: Report reloc information in bdinfoTim Chick2016-05-21-0/+2
| | | | Signed-off-by: Tim Chick <tim.chick@mediatek.com>
* drivers: mtd: add Microchip PIC32 internal non-CFI flash driver.Purna Chandra Mandal2016-05-21-0/+452
| | | | | | | | | | | | | | | | PIC32 internal flash devices are parallel NOR flash divided into number of banks to allow erase-programming in one while fetch and execution continues on other. As the flash banks are memory mapped stored code can be executed directly from flash (XIP), also there is additional hardware logic to prefetch and cache contents to improve execution performance. These flash can also be used to store user data (like environment). Flash erase and programming are handled by on-chip NVM controller. Driver implemented driver model but MTD is not really support. Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* flash: add device ID for Microchip PIC32 internal flash.Purna Chandra Mandal2016-05-21-1/+4
| | | | | | | | | Microchip PIC32 has internal parallel flash (non-CFI compliant). These flash devices do not support any identifier command so no standard IDs. Added unique IDs to seperate these flash devices from others supported by U-Boot. Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
* mips: ath79: add AP143 reference boardWills Wang2016-05-21-0/+359
| | | | | | | | This patch add board-level code and base DT for AP143. Signed-off-by: Wills Wang <wills.wang@live.com> [updated defconfig, enabled CONFIG_USE_PRIVATE_LIBGCC=y] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* mips: ath79: add AP121 reference boardWills Wang2016-05-21-0/+343
| | | | | | | | This patch add board-level code and base DT for AP121. Signed-off-by: Wills Wang <wills.wang@live.com> [updated defconfig, enabled CONFIG_USE_PRIVATE_LIBGCC=y] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* drivers: spi: add spi support for QCA/Atheros ath79 SOCsWills Wang2016-05-21-0/+269
| | | | | | | | This patch add a compatible spi driver for ath79 series SOC. Signed-off-by: Wills Wang <wills.wang@live.com> Reviewed-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* drivers: serial: add serial driver for ar933x SOCWills Wang2016-05-21-0/+298
| | | | | | | | | This patch add support for ar933x serial. Signed-off-by: Wills Wang <wills.wang@live.com> Reviewed-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* drivers: pinctrl: Add simple pinctrl driver for Qualcomm/Atheros qca953x.Wills Wang2016-05-21-0/+166
| | | | | | | | | This is a simple pinctrl driver, it just support uart and spi pin-mux now. Signed-off-by: Wills Wang <wills.wang@live.com> Reviewed-by: Simon Glass <sjg@chromium.org> [fixed typo in commit subject line] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* drivers: pinctrl: Add simple pinctrl driver for Qualcomm/Atheros ar933x.Wills Wang2016-05-21-0/+151
| | | | | | | | | This is a simple pinctrl driver, it just support uart and spi pin-mux now. Signed-off-by: Wills Wang <wills.wang@live.com> Reviewed-by: Simon Glass <sjg@chromium.org> [fixed typo in commit subject line] Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* mips: ath79: add support for QCA953x SOCsWills Wang2016-05-21-1/+787
| | | | | | This patch enable work for qca953x SOC. Signed-off-by: Wills Wang <wills.wang@live.com>
* mips: ath79: add support for AR933x SOCsWills Wang2016-05-21-0/+720
| | | | | | This patch enable work for ar933x SOC. Signed-off-by: Wills Wang <wills.wang@live.com>
* mips: add base support for QCA/Atheros ath79 SOCsWills Wang2016-05-21-0/+1610
| | | | | | | This patch add some common code for QCA/Atheros ath79 SOCs such as DDR tuning, chip reset and CPU detection. Signed-off-by: Wills Wang <wills.wang@live.com>
* Add support for 64-bit MIPS to examples/standaloneStanislav Galabov2016-05-21-0/+18
| | | | Signed-off-by: Stanislav Galabov <sgalabov@gmail.com>
* Fix FreeBSD loader API so that it works on both 32-bit and 64-bit targets.Stanislav Galabov2016-05-21-44/+49
| | | | | | Specifically tested on MIPS under QEMU (works with all combination of bit-ness and endian-ness) Signed-off-by: Stanislav Galabov <sgalabov@gmail.com>
* Use CONFIG_IDE_SWAP_IO when running on big-endian MIPS (32 or 64-bit) in ↵Stanislav Galabov2016-05-21-0/+8
| | | | | | QEMU so that IDE transfers work properly Signed-off-by: Stanislav Galabov <sgalabov@gmail.com>
* Properly calculate ATA_SECTORWORDS, using a fixed-size integer, so it works ↵Stanislav Galabov2016-05-21-1/+1
| | | | | | for both 32-bit and 64-bit targets Signed-off-by: Stanislav Galabov <sgalabov@gmail.com>
* Merge git://git.denx.de/u-boot-dmTom Rini2016-05-17-2749/+5419
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| * dm: mmc: test: Add tests for MMCSimon Glass2016-05-17-3/+20
| | | | | | | | | | | | | | | | Add a simple test which checks that a sandbox-emulated SD card can be used correctly. This tests plumbing through the MMC stack's block-device implementaion. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: sandbox: mmc: Enable building MMC code for sandboxSimon Glass2016-05-17-2/+6
| | | | | | | | | | | | | | Enable building the MMC code for sandbox. This increases build coverage for sandbox. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: mmc: sandbox: Add an SD-card emulationSimon Glass2016-05-17-2/+143
| | | | | | | | | | | | | | | | Add an emulation of an SD card to sandbox, allowing MMC to be used in tests. The emulation is very simple, supporting only card detection and reading test data. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: mmc: Add support for driver-model block devicesSimon Glass2016-05-17-30/+58
| | | | | | | | | | | | | | Add support for enabling CONFIG_BLK with MMC. This involves changing a few functions to use struct udevice and adding a MMC block device driver. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: mmc: Add a way to bind MMC devices with driver modelSimon Glass2016-05-17-0/+70
| | | | | | | | | | | | | | | | | | | | Binding an MMC device when CONFIG_BLK is enabled requires that a block device be bound as a child of the MMC device. Add a function to do this. The mmc_create() method will be used only when DM_BLK is disabled. Add an unbind method also. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: mmc: Implement the MMC functions for block devicesSimon Glass2016-05-17-1/+109
| | | | | | | | | | | | | | | | Implement the functions in mmc_legacy.c for driver-model block devices, so that MMC can use driver model for these. This allows CONFIG_BLK to be enabled with DM_MMC. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: sandbox: Only enable the sandbox MMC driver when validSimon Glass2016-05-17-1/+7
| | | | | | | | | | | | | | This driver will require generic MMC and block-device support in a future commit. To avoid test errors, make this change now. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: mmc: Adjust mmc_switch_part() to use a struct mmcSimon Glass2016-05-17-8/+4
| | | | | | | | | | | | | | Instead of looking up the MMC device by number, just pass it in. This makes it possible to use this function with driver model. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: blk: Use the correct error code for blk_get_device_by_str()Simon Glass2016-05-17-3/+3
| | | | | | | | | | | | | | Return -EINVAL instead of -1 in this function, to provide a more meaningful error. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: mmc: Move the device list into a separate fileSimon Glass2016-05-17-121/+176
| | | | | | | | | | | | | | | | | | At present the MMC subsystem maintains its own list of MMC devices. This cannot work with driver model, which needs to maintain this itself. Move the list code into a separate 'legacy' file. The core MMC code remains, and will be shared with the driver-model implementation. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: mmc: Set up the device pointer when using the MMC uclassSimon Glass2016-05-17-1/+14
| | | | | | | | | | | | | | Update the existing drivers to set up this new pointer. This will be required by the MMC uclass. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: blk: Add a comment as to why the bdev member is neededSimon Glass2016-05-17-0/+5
| | | | | | | | | | | | | | This member should be explained, since it is not obvious why it is needed. Add a comment. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: part: Drop the block_drvr tableSimon Glass2016-05-17-64/+30
| | | | | | | | | | | | | | This is not needed since we can use the functions provided by the legacy block device support. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: part: Use the legacy block driver for hardware partition supportSimon Glass2016-05-17-11/+1
| | | | | | | | | | | | Drop use of the table in part.c for this feature. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: blk: Add functions to select a hardware partitionSimon Glass2016-05-17-0/+59
| | | | | | | | | | | | | | | | The block device uclass does not currently support selecting a particular hardware partition but this is needed for MMC. Add it so that the blk API can support MMC properly. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: mmc: Use the new select_hwpart() APISimon Glass2016-05-17-15/+22
| | | | | | | | | | | | Avoid calling directly into the MMC code - use the new API call instead. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: mmc: spl: Use the legacy block interface in SPLSimon Glass2016-05-17-0/+1
| | | | | | | | | | | | | | Bring this in for SPL so that we can use generic code for loading from block devices. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: mmc: Add a function to obtain the block deviceSimon Glass2016-05-17-0/+13
| | | | | | | | | | | | | | | | The MMC block device is contained within struct mmc. But with driver model this will not be the case. Add a function to obtain the block device. We can later implement this for CONFIG_BLK. Signed-off-by: Simon Glass <sjg@chromium.org>
| * dm: mmc: Implement the select_hwpart() methodSimon Glass2016-05-17-0/+22
| | | | | | | | | | | | | | Implement this method so that hardware partitions will work correctly with MMC. Signed-off-by: Simon Glass <sjg@chromium.org>
generated by cgit v1.1 at 2024-09-19 07:42:52 +0000