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* fpga: zynqmp: Remove empty functionsMichal Simek2017-01-10-12/+0
| | | | | | | Xilinx core files will take care about it. There is no need to have these functions because they do nothing. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM64: zynqmp: Add support to save env to FATSiva Durga Prasad Paladugu2017-01-10-0/+6
| | | | | | | | | Add support to save environment as a file of FAT filesystem on to SD card. The file will be saved with name uEnv.txt. This environment will be retrieved during boot. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* ARM64: zynqmp: Increase environment size to 32KSiva Durga Prasad Paladugu2017-01-10-1/+1
| | | | | | | | Increase environment size to 32K as the current default environment itself is greater than 4K. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* microblaze: Enable option to overwrite default variablesMichal Simek2017-01-10-0/+2
| | | | | | Enable overwriting variables out of main config file. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* microblaze: Remove hardcoded IP address from configMichal Simek2017-01-10-3/+0
| | | | | | | IP addresses shouldn't be hardcoded in board config. This patch removes them. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* microblaze: Make the board configuration name user definableSai Pavan Boddu2017-01-10-0/+5
| | | | | | | Add a prompt for editing in menuconfig Signed-off-by: Sai Pavan Boddu <saipava@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* net: gem: Use wait_for_bit() instead of private mdio_wait()Michal Simek2017-01-10-23/+9
| | | | | | | Using generic wait_for_bit() implementation instead of using private wait function. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* lib: Add WATCHDOG_RESET to wait_bit.hMichal Simek2017-01-10-0/+2
| | | | | | | | wait_for_bit() is missing reset watchdog in case watchdog is configured. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* Prepare v2017.01Tom Rini2017-01-09-1/+1
| | | | Signed-off-by: Tom Rini <trini@konsulko.com>
* lib: gitignore *.elf and *.so generated by efi_loaderLadislav Michl2017-01-09-0/+2
| | | | Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
* scripts/config_whitelist.txt: ResyncTom Rini2017-01-08-125/+0
| | | | Signed-off-by: Tom Rini <trini@konsulko.com>
* mx6ullevk: Add missing MAINTAINERS for mx6ull_14x14_evk_plugin_defconfigJagan Teki2017-01-08-0/+1
| | | | | | | | | | | Add 'Peng Fan' as MAINTAINERS of configs/mx6ull_14x14_evk_plugin_defconfig which is missing in below commit "imx: mx6ull_14x14_evk: add plugin defconfig" (sha1: b90ebf49bb8f74afe68f696f59a0e24cc79f2031) Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jagan Teki <jagan@openedev.com>
* am335x: configs: Use ISW_ENTRY_ADDR to set SPL_TEXT_BASEAndrew F. Davis2017-01-08-2/+3
| | | | | | | | | | | | The SPL load address changes based on boot type in HS devices, ISW_ENTRY_ADDR is used to set this address for AM43xx based SoCs for similar reasons. Add this same logic for AM33xx devices. Also make the default value for ISW_ENTRY_ADDR correct for GP devices based on SoC, HS devices already pick the correct value in their defconfig. Signed-off-by: Andrew F. Davis <afd@ti.com>
* arm: mach-omap2: Fix secure file generationAndrew F. Davis2017-01-08-19/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | When TI_SECURE_DEV_PKG is not defined we warn that the file '*_HS' was not generated but generate an unsigned one anyway, first fix this warning to say that it was generated but not secured. When the user then exports TI_SECURE_DEV_PKG after getting this warning, and tries to re-build, 'make' will detect the build artifacts as unchanged and so assume they do not need to be re-generated. This causes it to fail to sign the files and it will pack unsigned files into the final image, even though TI_SECURE_DEV_PKG is now correctly defined and working. Fix this by using FORCE on the targets causes them to be re-run even if the dependent files have not changed. This then causes another issue. We currently rename the signed dtb files to overwrite the non-signed ones. We do this so the 'mkimage' tool gives the packaged dtb sections the correct name. If we do not rename the files then SPL will not find them during boot. Fix this by renaming the dtb files by appending _HS to the end of the filename, after the ".dtb", this causes them to still be named correctly in the FIT blob. Signed-off-by: Andrew F. Davis <afd@ti.com>
* Merge branch 'master' of git://git.denx.de/u-boot-tegraTom Rini2017-01-04-33/+594
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| * ARM: dts: tegra: Sync paz00 with Linux 4.8Misha Komarovskiy2017-01-03-29/+568
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sync with Linux 4.8 dts plus vdd_bl regulator to fix backlight start, display timings and USB controller aliases fix. Signed-off-by: Misha Komarovskiy <zombah@gmail.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Warren <twarren@nvidia.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * colibri_t20: fix ulpi reset polarityMarcel Ziswiler2017-01-03-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix ULPI reset polarity which caused a hard hang on Colibri T20 upon attempting to start the USB subsystem: This fixes my late commit d5a24d8b53d350364bd429b7104ec369b817e4b8 (colibri_t20: fix usb operation and controller order) inadvertently having overwritten Stephen's previous commit 2f6a7e8ce5df8b99d84bfd486c6f99d92322ce04 (ARM: tegra: fix USB ULPI PHY reset signal inversion confusion). While at it also fix comment about on-module USB port. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * apalis_t30: comment about disabled pcie nodesMarcel Ziswiler2017-01-03-0/+2
| | | | | | | | | | | | | | Add a comment about the disabled PCIe port nodes. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * pci: kconfig: fix spelling in descriptionMarcel Ziswiler2017-01-03-1/+1
| | | | | | | | | | | | | | Fix 'driver model' rather than 'driver mode' in description. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * video: tegra: fix spelling in commentMarcel Ziswiler2017-01-03-1/+1
| | | | | | | | | | | | | | Get rid of spurious 'are' in the comment. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * ARM: tegra: allow passing cboot DTB to the kernelStephen Warren2017-01-03-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | Some users may wish to pass the cboot-supplied DTB to the booted kernel rather than having U-Boot load the DTB itself. To allow this, expose the address of the cboot-supplied DTB in environment variable $fdt_addr. At least when using extlinux.conf, if the user doesn't explicitly specify which DTB to pass to the kernel, U-Boot passes the DTB referred to by this variable. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2017-01-04-13/+40
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| * | mtd: nand: mxs_nand_spl: Fix to remove twise 'NAND' printJagan Teki2017-01-04-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SPL from nand will print 'NAND' in boot_from_devices based on the image_loader name, remove the extra 'NAND ' in mxs_nand_spl driver. Original behaviour: ------------------- U-Boot SPL 2017.01-rc2-gf84dd8b (Jan 02 2017 - 22:24:19) Trying to boot from NANDNAND : 512 MiB After the fix: ------------- U-Boot SPL 2017.01-rc2-gf84dd8b-dirty (Jan 02 2017 - 23:17:00) Trying to boot from NAND: 512 MiB Cc: Tom Rini <trini@konsulko.com> Signed-off-by: Jagan Teki <jagan@openedev.com>
| * | spi: cadence_qspi_apb: Use 32 bit indirect read transaction when possibleVignesh R2017-01-04-6/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to Section 11.15.4.9.1 Indirect Read Controller of K2G SoC TRM SPRUHY8D[1], the external master is only permitted to issue 32-bit data interface reads until the last word of an indirect transfer So, make sure that QSPI indirect reads are 32 bit sized except for the final read. If the rxbuf is unaligned then use bounce buffer, so that readsl() can be used instead of readsb() to avoid non 32-bit accesses. [1]www.ti.com/lit/ug/spruhy8d/spruhy8d.pdf Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Jagan Teki <jagan@openedev.com>
| * | spi: cadence_qspi_apb: Use 32 bit indirect write transaction when possibleVignesh R2017-01-04-6/+23
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to Section 11.15.4.9.2 Indirect Write Controller of K2G SoC TRM SPRUHY8D[1], the external master is only permitted to issue 32-bit data interface writes until the last word of an indirect transfer otherwise indirect writes is known to fails sometimes. So, make sure that QSPI indirect writes are 32 bit sized except for the last write. If the txbuf is unaligned then use bounce buffer to avoid data aborts. So, now that the driver uses bounce_buffer, enable CONFIG_BOUNCE_BUFFER for all boards that use Cadence QSPI driver. [1]www.ti.com/lit/ug/spruhy8d/spruhy8d.pdf Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Jagan Teki <jagan@openedev.com>
* | powerpc: mpc85xx: Move macro CONFIG_SYS_PPC64 to KconfigYork Sun2017-01-04-6/+11
| | | | | | | | | | | | Use Kconfig option SYS_PPC64 instead. Signed-off-by: York Sun <york.sun@nxp.com>
* | powerpc: mpc85xx: Move CONFIG_SYS_FSL_QORIQ_CHASSIS* to KconfigYork Sun2017-01-04-12/+21
| | | | | | | | | | | | Use Kconfig option to select chassis version. Signed-off-by: York Sun <york.sun@nxp.com>
* | powerpc: E6500: Move macro CONFIG_E6500 to KconfigYork Sun2017-01-04-10/+16
| | | | | | | | | | | | Use Kconfig option E6500 and clean up existing usage. Signed-off-by: York Sun <york.sun@nxp.com>
* | powerpc: mpc85xx: Remove unused ifdef in config headerYork Sun2017-01-04-19/+1
| | | | | | | | | | | | | | After most config options are moved to Kconfig, the unused ifdef or elif can be removed. Signed-off-by: York Sun <york.sun@nxp.com>
* | ddr: fsl: Move CONFIG_SYS_FSL_DDR_VER to KconfigYork Sun2017-01-04-12/+17
| | | | | | | | | | | | Use Kconfig to select DDR version instead of using config header. Signed-off-by: York Sun <york.sun@nxp.com>
* | ddr: fsl: Merge macro CONFIG_NUM_DDR_CONTROLLERS and CONFIG_SYS_NUM_DDR_CTRLSYork Sun2017-01-04-104/+102
| | | | | | | | | | | | | | | | These two macros are used for the same thing, the total number of DDR controllers for a given SoC. Use SYS_NUM_DDR_CTRLS in Kconfig and merge existing usage. Signed-off-by: York Sun <york.sun@nxp.com>
* | ddr: fsl: Move macro CONFIG_NUM_DDR_CONTROLLERS to KconfigYork Sun2017-01-04-59/+14
| | | | | | | | | | | | | | | | Use option NUM_DDR_CONTROLLERS in ddr Kconfig and clean up existing usage in ls102xa and fsl-layerscape. Remove all powerpc macros in config header and board header files. Signed-off-by: York Sun <york.sun@nxp.com>
* | powerpc: mpc85xx: Move CONFIG_SYS_FSL_ERRATUM_* to KconfigYork Sun2017-01-04-212/+334
| | | | | | | | | | | | Use Kconfig to select errata workaround. Signed-off-by: York Sun <york.sun@nxp.com>
* | mmc: move CONFIG_SYS_FSL_ERRATUM_ESDHC* to KconfigYork Sun2017-01-04-40/+50
| | | | | | | | | | | | | | | | | | | | Add option SYS_FSL_ERRATUM_ESDHC111, SYS_FSL_ERRATUM_ESDHC13, SYS_FSL_ERRATUM_ESDHC135, SYS_FSL_ERRATUM_ESDHC_A001 to mmc Kconfig. Move existing macros to related Kconfig. Signed-off-by: York Sun <york.sun@nxp.com> [trini: Migrate bk4r1] Signed-off-by: Tom Rini <trini@konsulko.com>
* | arm: layerscape: Move CONFIG_SYS_FSL_ERRATUM_* to KconfigYork Sun2017-01-04-24/+69
| | | | | | | | | | | | Use Kconfig to select errata workaround. Signed-off-by: York Sun <york.sun@nxp.com>
* | fsl_ddr: Move DDR config options to driver KconfigYork Sun2017-01-04-237/+262
| | | | | | | | | | | | | | | | | | Create driver/ddr/fsl/Kconfig and move existing options. Clean up existing macros. Signed-off-by: York Sun <york.sun@nxp.com> [trini: Migrate sbc8641d, xpedite537x and MPC8536DS, run a moveconfig.py -s] Signed-off-by: Tom Rini <trini@konsulko.com>
* | powerpc: T104xQDS: Remove macro CONFIG_T104xD4QDSYork Sun2017-01-04-1/+0
| | | | | | | | | | | | Remove this macro. It was added by e622d9ed but actually wasn't used. Signed-off-by: York Sun <york.sun@nxp.com>
* | powerpc: T2081QDS: Remove macro T2081QDSYork Sun2017-01-04-12/+10
| | | | | | | | | | | | Use TARGET_T2081QDS from Kconfig instead. Signed-off-by: York Sun <york.sun@nxp.com>
* | powerpc: T2080RDB: Remove macro CONFIG_T2080RDBYork Sun2017-01-04-4/+2
| | | | | | | | | | | | Use TARGET_T2080RDB from Kconfig instead. Signed-off-by: York Sun <york.sun@nxp.com>
* | powerpc: T2080QDS: Remove macro T2080QDSYork Sun2017-01-04-15/+13
| | | | | | | | | | | | Use TARGET_T2080QDS from Kconfig instead. Signed-off-by: York Sun <york.sun@nxp.com>
* | powerpc: T1040QDS: Remove macro CONFIG_T1040QDSYork Sun2017-01-04-3/+1
| | | | | | | | | | | | Use TARGET_T1040QDS from Kconfig instead. Signed-off-by: York Sun <york.sun@nxp.com>
* | powerpc: T1024RDB: Remove macro CONFIG_T1024RDBYork Sun2017-01-04-28/+25
| | | | | | | | | | | | | | | | Use TARGET_T1024RDB from Kconfig instead. Signed-off-by: York Sun <york.sun@nxp.com> [trini: Get missing hunk in board/freescale/t102xrdb/ddr.c] Signed-off-by: Tom Rini <trini@konsulko.com>
* | powerpc: T1023RDB: Remove macro CONFIG_T1023RDBYork Sun2017-01-04-26/+23
| | | | | | | | | | | | Use TARGET_T1023RDB from Kconfig instead. Signed-off-by: York Sun <york.sun@nxp.com>
* | powerpc: mpc85xx: Remove variant SoCs T1020/T1022/T1013/T1014York Sun2017-01-04-25/+5
| | | | | | | | | | | | | | Remove these SoCs from Kconfig because they don't have individual configuration. Clean up existing macros. Signed-off-by: York Sun <york.sun@nxp.com>
* | crypto: Move CONFIG_SYS_FSL_SEC_LE and _BE to KconfigYork Sun2017-01-04-18/+48
| | | | | | | | | | | | | | Use Kconfig option to set little- or big-endian access to secure boot and trust architecture. Signed-off-by: York Sun <york.sun@nxp.com>
* | crypto: Move SYS_FSL_SEC_COMPAT into driver KconfigYork Sun2017-01-04-37/+115
| | | | | | | | | | | | | | Instead of define CONFIG_SYS_FSL_SEC_COMPAT in header files for PowerPC and ARM SoCs, move it to Kconfig under the driver. Signed-off-by: York Sun <york.sun@nxp.com>
* | powerpc: mpc85xx: Move CONFIG_SYS_PPC_E500_DEBUG_TLB to KconfigYork Sun2017-01-04-24/+41
| | | | | | | | | | | | | | | | Use Kconfig SYS_PPC_E500_DEBUG_TLB and clean up existing macros. Signed-off-by: York Sun <york.sun@nxp.com> [trini: Migrate 8572] Signed-off-by: Tom Rini <trini@konsulko.com>
* | powerpc: mpc85xx: Move CONFIG_SYS_NUM_TLBCAMS to KconfigYork Sun2017-01-04-7/+8
| | | | | | | | | | | | Use Kconfig option for SYS_NUM_TLBCAMS and clean up existing macros. Signed-off-by: York Sun <york.sun@nxp.com>
* | powerpc: E500: Move CONFIG_E500 and CONFIG_E500MC to KconfigYork Sun2017-01-04-115/+30
|/ | | | | | Use Kconfig option for E500 and E500MC macros. Signed-off-by: York Sun <york.sun@nxp.com>
* Prepare v2017.01-rc3Tom Rini2017-01-02-1/+1
| | | | Signed-off-by: Tom Rini <trini@konsulko.com>
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