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* x86: Remove Graeme Russ from the git alias fileSimon Glass2015-12-21-2/+1
| | | | | | | As requested, remove Graeme's email address. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Bin Meng <bmeng.cn@gmail.com>
* Merge branch 'master' of git://www.denx.de/git/u-boot-socfpgaTom Rini2015-12-19-553/+289
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| * arm: socfpga: fix trivial header preprocessor for socfpga_common.hDinh Nguyen2015-12-20-3/+3
| | | | | | | | | | | | | | Replace__CONFIG_SOCFPGA_CYCLONE5_COMMON_H__ with __CONFIG_SOCFPGA_COMMON_H__ as the file is now called socfpga_common.h Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
| * arm: socfpga: fix up a questionable macro for SDMMCDinh Nguyen2015-12-20-5/+10
| | | | | | | | | | | | | | | | Move the macro into the socfpga_dwmci_clksel(). Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Signed-off-by: Marek Vasut <marex@denx.de> [fix parenthesis in the sdmmc_mask]
| * arm: socfpga: remove building scan managerDinh Nguyen2015-12-20-2/+3
| | | | | | | | | | | | | | | | The scan manager is not needed for the Arria10. Edit the makefile to build the scan manager for arria5 and cyclone5 only. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Marek Vasut <marex@denx.de>
| * arm: socfpga: introduce TARGET_SOCFPGA_GEN5 config propertyDinh Nguyen2015-12-20-0/+5
| | | | | | | | | | | | | | | | | | In order to re-use as much Cyclone5 and Arria5 code as possible to support the Arria10 platform, we need to wrap some of the code with #ifdef's. By adding CONFIG_TARGET_SOCFPGA_GEN5, we can shorten the check by not having to check for both AV || AV. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
| * arm: socfpga: remove note to add CONFIG_USB_DWC2_REG_ADDRDinh Nguyen2015-12-20-7/+0
| | | | | | | | | | | | | | Now that the USB DWC2 probing is done from OF, remove this note to add CONFIG_USB_DWC2_REG_ADDR. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
| * arm: socfpga: Drop the board boilerplateMarek Vasut2015-12-20-313/+0
| | | | | | | | | | | | | | | | Drop all the common board code, since it is not completely useless. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
| * arm: socfpga: Introduce common board codeMarek Vasut2015-12-20-1/+65
| | | | | | | | | | | | | | | | | | | | The SoCFPGA has reached a point where every single board code become the same, since each and every single board is probed equally from OF. Move the common board code into arch/arm/mach-socfpga/ . Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
| * arm: socfpga: Switch CONFIG_HOSTNAME to CONFIG_SYS_BOARDMarek Vasut2015-12-20-15/+4
| | | | | | | | | | | | | | | | | | | | We already have the CONFIG_SYS_BOARD variable, which defines the name of the board. The value in CONFIG_HOSTNAME is exactly the same and is thus just a duplicity, so switch it to reuse CONFIG_SYS_BOARD . Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
| * arm: socfpga: Switch CONFIG_G_DNL_MANUFACTURER to CONFIG_SYS_VENDORMarek Vasut2015-12-20-19/+1
| | | | | | | | | | | | | | | | | | | | We already have the CONFIG_SYS_VENDOR variable, which defines the manufacturer of the board. The value in CONFIG_G_DNL_MANUFACTURER is just a duplicity, so switch it to reuse CONFIG_SYS_VENDOR . Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
| * arm: socfpga: sockit: Zap VIRTUAL_TARGETMarek Vasut2015-12-20-4/+0
| | | | | | | | | | | | | | | | There is no VT for this board, so remove this incorrect macro. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
| * arm: socfpga: de0_nano: Zap VIRTUAL_TARGETMarek Vasut2015-12-20-4/+0
| | | | | | | | | | | | | | | | There is no VT for this board, so remove this incorrect macro. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
| * arm: socfpga: socrates: Probe DWC2 UDC from OF instead of hard-coded dataMarek Vasut2015-12-20-5/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Lukasz Majewski <l.majewski@majess.pl> Cc: Lukasz Majewski <l.majewski@samsung.com>
| * arm: socfpga: sockit: Probe DWC2 UDC from OF instead of hard-coded dataMarek Vasut2015-12-20-7/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Lukasz Majewski <l.majewski@majess.pl> Cc: Lukasz Majewski <l.majewski@samsung.com>
| * arm: socfpga: mcvevk: Probe DWC2 UDC from OF instead of hard-coded dataMarek Vasut2015-12-20-5/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Lukasz Majewski <l.majewski@majess.pl> Cc: Lukasz Majewski <l.majewski@samsung.com>
| * arm: socfpga: de0_nano: Probe DWC2 UDC from OF instead of hard-coded dataMarek Vasut2015-12-20-3/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Lukasz Majewski <l.majewski@majess.pl> Cc: Lukasz Majewski <l.majewski@samsung.com>
| * arm: socfpga: cyclone5-socdk: Probe DWC2 UDC from OF instead of hard-coded dataMarek Vasut2015-12-20-9/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Lukasz Majewski <l.majewski@majess.pl> Cc: Lukasz Majewski <l.majewski@samsung.com>
| * arm: socfpga: arria5-socdk: Probe DWC2 UDC from OF instead of hard-coded dataMarek Vasut2015-12-20-5/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Lukasz Majewski <l.majewski@majess.pl> Cc: Lukasz Majewski <l.majewski@samsung.com>
| * arm: socfpga: Allow DWC2 UDC probing from OFMarek Vasut2015-12-20-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | The USB gadget framework does not support DM yet, so add this bit to let DWC2 UDC probe from OF on platforms which support it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Lukasz Majewski <l.majewski@majess.pl> Cc: Lukasz Majewski <l.majewski@samsung.com>
| * arm: socfpga: socrates: Remove Micrel PHY configurationMarek Vasut2015-12-20-47/+0
| | | | | | | | | | | | | | | | | | | | The Micrel PHY configuration is now done from OF, so hard-coding the configuration into the board file is no longer necessary. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
| * arm: socfpga: sockit: Remove Micrel PHY configurationMarek Vasut2015-12-20-47/+0
| | | | | | | | | | | | | | | | | | | | The Micrel PHY configuration is now done from OF, so hard-coding the configuration into the board file is no longer necessary. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
| * arm: socfpga: de0_nano: Remove Micrel PHY configurationMarek Vasut2015-12-20-53/+0
| | | | | | | | | | | | | | | | | | | | The Micrel PHY configuration is now done from OF, so hard-coding the configuration into the board file is no longer necessary. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
| * arm: socfpga: cyclone5-socdk: Remove Micrel PHY configurationMarek Vasut2015-12-20-47/+0
| | | | | | | | | | | | | | | | | | | | The Micrel PHY configuration is now done from OF, so hard-coding the configuration into the board file is no longer necessary. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
| * arm: socfpga: arria5-socdk: Remove Micrel PHY configurationMarek Vasut2015-12-20-47/+0
| | | | | | | | | | | | | | | | | | | | The Micrel PHY configuration is now done from OF, so hard-coding the configuration into the board file is no longer necessary. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
| * arm: socfpga: socrates: Add missing PHY skew configMarek Vasut2015-12-20-0/+9
| | | | | | | | | | | | | | | | | | Add missing KSZ9021 PHY skew configuration for the EBV socrates board. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
| * net: phy: micrel: Configure KSZ9021/KSZ9031 skew from OFMarek Vasut2015-12-20-1/+145
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add code to process the KSZ9021/KSZ9031 OF props if they are present and configure skew registers based on the information from the OF. This code is only enabled if the DM support for ethernet is also enabled. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> V2: - Implement struct ksz90x1_reg_field to describe the skew register fields more accurately. - Fix RXDV/TXEN skew register default value and offset.
* | altera_qspi: initialize instr.mtd in flash_eraseThomas Chou2015-12-19-0/+1
| | | | | | | | | | | | | | | | Initialize instr.mtd in flash_erase(). This fixes the system hang issue when CONFIG_MTD_PARTITIONS is selected. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Acked-by: Marek Vasut <marex@denx.de>
* | serial-howto: remove altera_jtag_uart and altera_uart from the listThomas Chou2015-12-19-2/+0
| | | | | | | | | | | | | | | | Since both altera_jtag_uart and altera_uart are converted to driver model, remove them from the list of drivers remaining to convert. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Reviewed-by: Chin Liang See <clsee@altera.com>
* | nios2: display altera sysid at startupThomas Chou2015-12-19-0/+8
| | | | | | | | | | | | | | | | Display altera sysid at startup, which was once removed during the move. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Acked-by: Marek Vasut <marex@denx.de>
* | nios2: Soup up the shell experienceMarek Vasut2015-12-19-0/+4
| | | | | | | | | | | | | | | | Enable command auto completion and enable $version variable. This makes working with U-Boot far more enjoyable. Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
* | nios2: Enable support for fitImageMarek Vasut2015-12-19-0/+2
| | | | | | | | | | | | | | | | | | | | The uImage format is legacy for years now, enable support for the fitImage format, which allows combining multiple files (kernel and dtb) into a single file, offers better protection of the payload and so on. Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
* | nios2: Preconfigure $loadaddr variableMarek Vasut2015-12-19-2/+4
| | | | | | | | | | | | | | | | | | Preset the $loadaddr environment variable to some sane default, let's say half of the RAM. This variable is where the kernel is loaded using all sorts of .*load commands, so it's convenient to have it set. Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
* | nios2: Up the monitor size to 512kiBMarek Vasut2015-12-19-2/+2
| | | | | | | | | | | | | | | | | | The monitor is growing much larger with various additions, like fitImage, command line completion, UBI etc. Make the monitor area larger so these features can be safely added. Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
* | nios2: Calculate the env position from monitor sizeMarek Vasut2015-12-19-26/+26
|/ | | | | | | | | Reorder the 10m50 and 3c120 config files such, that the environment position can be calculated from the monitor size. The environment is placed right after the monitor. This removes one more ad-hoc variable. Signed-off-by: Marek Vasut <marex@denx.de> Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
* Merge branch 'master' of git://www.denx.de/git/u-boot-microblazeTom Rini2015-12-18-98/+12159
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| * microblaze: Do not handle watchdog and gpio in SPLMichal Simek2015-12-18-3/+6
| | | | | | | | | | | | watchdog and gpio are not validated for SPL that's why do not use them. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * microblaze: Enable DM by defaultMichal Simek2015-12-18-1/+1
| | | | | | | | | | | | Enable DM for the whole architecture. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * microblaze: Enable OF_CONTROL by defaultMichal Simek2015-12-18-1/+1
| | | | | | | | Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * microblaze: Remove support for LL_TEMACMichal Simek2015-12-18-46/+1
| | | | | | | | | | | | | | LL_TEMAC is available at big endian MB and it is not properly tested that's why the patch removes it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * microblaze: Use malloc setting via KconfigMichal Simek2015-12-18-6/+2
| | | | | | | | | | | | | | Clean board specific file. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * microblaze: Make room for malloc before ELFMichal Simek2015-12-18-1/+2
| | | | | | | | | | | | | | | | Create space below u-boot binary for early malloc. It means memory layout is stack grows down, space for early malloc, u-boot code. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * dm: net: Fix DM for targets which use MANUAL_RELOCMichal Simek2015-12-18-0/+28
| | | | | | | | | | | | | | | | All ethernet operation needs to be updated for architectures which requires MANUAL_RELOC. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * net: gem: Add driver dependencies to PHYLIBMichal Simek2015-12-18-15/+1
| | | | | | | | | | | | | | Clear driver dependecies via Kconfig. Remove PHYLIB dependency from the driver. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * net: gem: Fix typo in Kconfig entryMichal Simek2015-12-18-1/+1
| | | | | | | | | | Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * net: gem: Separate recv and free_pkt functionsMichal Simek2015-12-18-20/+32
| | | | | | | | | | | | | | | | Use core to call net_process_received_packet() instead of call inside the driver. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * net: gem: Fix return value from recvMichal Simek2015-12-18-1/+1
| | | | | | | | | | | | | | | | recv function should return 0 instead of frame_len not to proceed the same packet again in core. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * net: gem: Setup default phy address to -1Michal Simek2015-12-18-1/+2
| | | | | | | | | | | | | | Undefined phy address is -1 not 0. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * arm: zynq: Update ZYBO config optionsNathan Rossi2015-12-18-0/+20
| | | | | | | | | | | | | | | | | | | | | | Update the ZYBO device tree and enable config options that relate to the added devices in the device tree. Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Michal Simek <monstr@monstr.eu> Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * spi: zynq_qspi: Add configuration to disable LQSPI featureNathan Rossi2015-12-18-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the Zynq Boot ROM code loads the payload from QSPI it uses the LQSPI feature of the QSPI device, however it does not clean up its configuration before handing over to the payload which leaves the device confgured to by-pass the standard non-linear operating mode. This ensures the Linear QSPI mode is disabled before re-enabling the device. Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Cc: Jagan Teki <jteki@openedev.com> Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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