| Commit message (Collapse) | Author | Age | Lines |
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Move duplicated exception handling code into lib_arm.
Signed-off-by: Andreas Engel <andreas.engel@ericsson.com>
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We already have a vendor subdir for Atmel, so we should use it.
Signed-off-by: Haavard Skinnemoen <hskinnemoen <at> atmel.com>
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Kimmo Leppala / Sysart and
Timo Tuunainen / Sysart
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read_dataflash() takes a signed char pointer as a parameter. Silence a
few warnings dues to incorrect parameter types in env_dataflash.c.
Signed-off-by: Stelian Pop <stelian@popies.net>
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AT91CAP9 support : move at91cap9adk board files to Atmel vendor directory.
Signed-off-by: Stelian Pop <stelian@popies.net>
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Signed-off-by: Stelian Pop <stelian <at> popies.net>
Acked-by: Haavard Skinnemoen <hskinnemoen <at> atmel.com>
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Signed-off-by: Stelian Pop <stelian@popies.net>
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Signed-off-by: Stelian Pop <stelian <at> popies.net>
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Signed-off-by: Stelian Pop <stelian@popies.net>
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Signed-off-by: Stelian Pop <stelian@popies.net>
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Use a structure instead of the error prone unnamed array to
define the possible dataflash banks.
Signed-off-by: Stelian Pop <stelian@popies.net>
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Fix arm926ejs compile when SKIP_LOWLEVEL_INIT is on.
cpu/arm926ejs/start.o: In function `cpu_init_crit':
.../cpu/arm926ejs/start.S:227: undefined reference to `lowlevel_init'
Signed-off-by: Stelian Pop <stelian@popies.net>
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Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
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This patch tries to get rid of some assembler warnings about
changed .got2 section type while compiling x86 bios emulator
code.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
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Signed-off-by: Anatolij Gustschin <agust@denx.de>
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This patch extends PCI device id table of the
radeon driver so that the driver will also support
Radeon Mobility 9200 (M9+) based boards.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
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Adds ATI Radeon 9200 support for 1280x1024, 1024x768,
800x600, 640x480 at 24, 16 and 8 bpp.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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If the length of the memory address range passed to the "mtest" command is
not of the form 2^x - 1, not all address lines are tested. This bug is
inherited from the original software at
http://www.netrino.com/Embedded-Systems/How-To/Memory-Test-Suite-C. Fix
this.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
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Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
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Conflicts:
common/cmd_reginfo.c
Signed-off-by: Wolfgang Denk <wd@denx.de>
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sys_eeprom.c:82:9: warning: unknown escape sequence '\/'
Signed-off-by: Jon Loeliger <jdl@freescale.com>
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These replace direct structure references for IMMR sections.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
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Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
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This can be used for debug, and will be used by board code
to help implement reginfo.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
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This includes mpc8610hpcd, mpc8641hpcn, and sbc8641d.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
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Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
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Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
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Adds the support code in cpu/mpc86xx for the new law setup code
recently created fsl_law.c, and changes the MPC8641HPCN config
to use this code.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
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* split the BAT initialization so that only 2 BATs (for the boot page
and stack) are programmed very early on. The rest are initialized later.
* Move other BAT setup, ccsrbar setup, and law setup later in the code
after translation has been enabled.
These changes will facilitate the moving of law and BAT initialization
to C code, and will aid with 36-bit physical addressing support.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
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Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
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Signed-off-by: Larry Johnson <lrj@acm.org>
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The current ndfc HW ECC implementation swaps the first two ECC bytes.
But the 4xx NDFC already uses the SMC (Smart Media Card) ECC ordering,
so this swapping in the HW ECC driver is bogus. This patch fixes this
problem and now really uses the SMC ECC byte order.
Thanks to Sean MacLennan for pointing this out.
Signed-off-by: Stefan Roese <sr@denx.de>
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The SRD0_PFC0 register was not configured correctly to enable the GPIO's
49-63 for GPIO. They have been configured as trace signals. This patch
fixes this by clearing the corresponding bit.
Signed-off-by: Stefan Roese <sr@denx.de>
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