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| * | dfu: avoid memory leakPeng Fan2016-05-06-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When dfu_fill_entity fail, need to free dfu to avoid memory leak. Reported by Coverity: " Resource leak (RESOURCE_LEAK) leaked_storage: Variable dfu going out of scope leaks the storage it points to. " Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: "Łukasz Majewski" <l.majewski@samsung.com> Cc: Marek Vasut <marex@denx.de>
| * | usb: dwc2: Add delay to fix the USB detection problem on SoCFPGAStefan Roese2016-05-06-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With patch c998da0d (usb: Change power-on / scanning timeout handling), the USB scanning is started earlier and with a smaller timeout. This resulted on SoCFPGA (using the DWC2 driver) in some USB sticks not getting detected any more. This patch now adds a 1 second delay (in the host mode only) to the DWC2 driver before the scanning is started. With this delay, now all problematic USB keys are detected successfully again. And there is no need any more to change the delay / timeout in the common USB code (usb_hub.c). Signed-off-by: Stefan Roese <sr@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Hans de Goede <hdegoede@redhat.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Marek Vasut <marex@denx.de>
| * | usb: hub: Don't continue on get_port_status failureMarek Vasut2016-05-06-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The code shouldn't continue probing the port if get_port_status() failed. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Hans de Goede <hdegoede@redhat.com> Cc: Stefan Roese <sr@denx.de> Cc: Stephen Warren <swarren@nvidia.com>
| * | usb: Assure Get Descriptor request is in separate microframeMarek Vasut2016-05-06-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Kingston DT Ultimate USB 3.0 stick is sensitive to this first Get Descriptor request and if the request is not in a separate microframe, the stick refuses to operate. Add slight delay, which is enough for one microframe to pass on any USB spec revision. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Hans de Goede <hdegoede@redhat.com> Cc: Stefan Roese <sr@denx.de> Cc: Stephen Warren <swarren@nvidia.com>
| * | usb: Wait after sending Set Configuration requestMarek Vasut2016-05-06-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some devices, like the SanDisk Cruzer Pop need some time to process the Set Configuration request, so wait a little until they are ready. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Hans de Goede <hdegoede@redhat.com> Cc: Stefan Roese <sr@denx.de> Cc: Stephen Warren <swarren@nvidia.com>
| * | usb: Don't init pointer to zero, but NULLMarek Vasut2016-05-06-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The pointer should always be inited to NULL, not zero (0). These are two different things and not necessarily equal. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Hans de Goede <hdegoede@redhat.com> Cc: Stefan Roese <sr@denx.de> Cc: Stephen Warren <swarren@nvidia.com>
| * | usb: ehci-mx6: allow board_ehci_hcd_init to failStefan Agner2016-05-06-2/+5
| |/ | | | | | | | | | | | | | | | | | | | | There could be runtime determined board specific reason why a EHCI initialization fails (e.g. ENODEV if a Port is not available). In this case, properly return the error code. While at it, that function (board_ehci_hcd_init) has actually two documentation blocks... Use the correct function name for the documentation block of board_usb_phy_mode. Signed-off-by: Stefan Agner <stefan@agner.ch>
* | imx6: cache: disable L2 before touching Auxiliary Control RegisterPeng Fan2016-05-06-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According PL310 TRM, Auxiliary Control Register " The register must be written to using a secure access, and it can be read using either a secure or a NS access. If you write to this register with a NS access, it results in a write response with a DECERR response, and the register is not updated. Writing to this register with the L2 cache enabled, that is, bit[0] of L2 Control Register set to 1, results in a SLVERR. " So If L2 cache is already enabled by ROM, chaning value of ACR will cause SLVERR and uboot hang. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com>
* | test/py: dfu: wait for USB device to go away at bootStephen Warren2016-05-06-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | It can take a while for a host machine to notice that a USB device has disconnected, and process the change. At the end of the DFU test, we wait up to 10 seconds for this to happen. This change makes the test wait the same (up to) 10 seconds at the start of the test for any previously active USB device-mode session to be cleaned up. Such as session might have been used to download U-Boot into memory for example; this is certainly true on my Tegra test systems. This changes should solve the DFU test intermittency issues I've been seeing on some Tegra devices. Signed-off-by: Stephen Warren <swarren@nvidia.com>
* | ARM: am33xx: Fix DDR initialization delaysRuss Dill2016-05-06-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current delays in the DDR initialization routines for am33xx architectures are sometimes not running long enough leading to DDR init errors. On am437x, this shows up as an L3 NOC error after the kernel boots. This is due to the timer not being initialized properly, but instead still containing the timer init values from the boot ROM which cause timers to expire in 1/4th the time required. timer_init is typically not called until board_init_r, however on am33xx/am43xx udelay is required in sdram_init which is called from board_init_f, so a call to timer_init is required earlier. Note that this issue introduced in v2015.01 by: b352dde "am33xx: Drop timer_init call from s_init". Although this could instead fixed by reverting said commit, it would cause timer_init to be called twice in both SPL and non-SPL cases. This gives a little more fine grained control and also matches what is being done on omap-command and fsl-layerscape. Signed-off-by: Russ Dill <russ.dill@ti.com>
* | ARM: fix ifdefs in ARMv8 lowlevel_init()Stephen Warren2016-05-06-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 724219a65f55 "ARM: always perform per-CPU GIC init" removed some ifdefs to unify the MULTIENTRY-vs-non-MULTIENTRY paths. However, the wrong endif was removed. This patch adds back that missing endif, and adds a new ifdef to match the endif the now-correctly-terminated block used to match against. Use "git show -U25 724219a65f55" to see enough context to make the original issue clear. In practical terms, this makes no difference to runtime behaviour. The code that was incorrectly compiled into the binary when ifndef MULTIENTRY is a no-op for other cases, since branch_if_master evaluates to a hard- coded jump. The only issues were: - A few extra instructions were added to the binary. - The comment on the endif at the very end of the function, indicating which ifdef it matched, were wrong. An alternative might be to simply fix the comment on that trailing ifdef, but that only addresses the second point above, not the first. Fixes: 724219a65f55 ("ARM: always perform per-CPU GIC init") Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | Fix various typos, scattered over the code.Robert P. J. Day2016-05-05-29/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | Spelling corrections for (among other things): * environment * override * variable * ftd (should be "fdt", for flattened device tree) * embedded * FTDI * emulation * controller
* | mmc: Fix error in RPMB codeMarek Vasut2016-05-05-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Since we do not build any board with CONFIG_SUPPORT_EMMC_RPMB , this piece of code evaded conversion. Fix the following compiler error: cmd/mmc.c: In function 'do_mmcrpmb': cmd/mmc.c:316:32: error: 'struct blk_desc' has no member named 'part_num' original_part = mmc->block_dev.part_num; ^ Signed-off-by: Marek Vasut <marex@denx.de> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Tom Rini <trini@konsulko.com>
* | omap4: duovero: Disable EFI bootingAsh Charles2016-05-05-0/+1
| | | | | | | | | | | | | | | | The DuoVero board fails to compile with EFI enabled as the generated binaries are too large. As this platform doesn't currently need EFI, disable this feature. Signed-off-by: Ash Charles <ashcharles@gmail.com>
* | omap4: load files for legacy bootAsh Charles2016-05-05-1/+4
|/ | | | | | | Be sure to load the zImage and fdtfile prior to actually booting in case we are doing a legacy boot. Signed-off-by: Ash Charles <ashcharles@gmail.com>
* ARM: tegra: import latest Jetson TK1 spreadsheetStephen Warren2016-05-04-1/+14
| | | | | | | | | | | | | | | This imports v11 of "Jetson TK1 Development Platform Pin Mux" from https://developer.nvidia.com/embedded/downloads. The new version defines the mux option for the MIPI pad ctrl selection. The OWR pin no longer has an entry in the configuration table because the only mux option it support is OWR, that feature isn't supported, and hence can't conflict with any other pin. This pin can only usefully be used as a GPIO. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* pci: tegra: fix DM conversion issues on Tegra20Stephen Warren2016-05-04-11/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tegra20's PCIe controller has a couple of quirks. There are workarounds in the driver for these, but they don't work after the DM conversion: 1) The PCI_CLASS value is wrong in HW. This is worked around in pci_tegra_read_config() by patching up the value read from that register. Pre-DM, the PCIe core always read this via a 16-bit access to the 16-bit offset 0xa. With DM, 32-bit accesses are used, so we need to check for offset 0x8 instead. Mask the offset value back to 32-bit alignment to make this work in all cases. 2) Accessing devices other than dev 1 causes a data abort. Pre-DM, this was worked around in pci_skip_dev(), which the PCIe core code called during enumeration while iterating over a bus. The DM PCIe core doesn't use this function. Instead, enhance tegra_pcie_conf_address() to validate the bdf being accessed, and refuse to access invalid devices. Since pci_skip_dev() isn't used, delete it. I've also validated that both these WARs are only needed for Tegra20, by testing on Tegra30/Cardhu and Tegra124/Jetson TKx. So, compile them in conditionally. Fixes: e81ca88451cf ("dm: tegra: pci: Convert tegra boards to driver model for PCI") Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: tegra: enable GPU node by compatible valueStephen Warren2016-05-04-15/+22
| | | | | | | | | | | | | | | | | | | In current Linux kernel Tegra DT files, 64-bit addresses are represented in unit addresses as a pair of comma-separated 32-bit values. Apparently this is no longer the correct representation for simple busses, and the unit address should be represented as a single 64-bit value. If this is changed in the DTs, arm/arm/mach-tegra/board2.c:ft_system_setup() will no longer be able to find and enable the GPU node, since it looks up the node by name. Fix that function to enable nodes based on their compatible value rather than their node name. This will work no matter what the node name is, i.e for DTs both before and after any rename operation. Cc: Thierry Reding <treding@nvidia.com> Cc: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* include/configs: Numerous typo fixes: "controler" -> "controller".Robert P. J. Day2016-05-03-82/+82
| | | | Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
* net: increase maximum frame size to accomediate VLAN packetsStefan Agner2016-05-03-11/+5
| | | | | | | | | | | Ethernet packages with IEEE 802.1Q VLAN support may be up to 1522 bytes long. Increase the default size used to allocate packet storage by 4 bytes. While at it, let git care about history and rewrite the comment to represent the situation today only. Signed-off-by: Stefan Agner <stefan@agner.ch> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* net: fix vlan validationStefan Agner2016-05-03-2/+2
| | | | | | | | VLAN identifiers are 12-bit decimal numbers, not IP addresses. Signed-off-by: Stefan Agner <stefan@agner.ch> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* drivers: net: ldpaa: Memset pools_params as "0" before usePrabhakar Kushwaha2016-05-03-0/+1
| | | | | | | | Memset pools_params as "0" to avoid garbage value in dpni_set_pools. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reported-by: Jose Rivera <german.rivera@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* fdt: fix setting MAC addresses for multiple interfacesLev Iserovich2016-05-03-6/+14
| | | | | | | | | | For multiple ethernet interfaces the FDT offset of '/aliases' will change as we are adding MAC addresses to the FDT. Therefore only the first interface ('ethernet0') will get properly updated in the FDT, with the rest getting FDT errors when we try to set their MAC address. Signed-off-by: Lev Iserovich <iserovil@deshawresearch.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* usb: dwc2: Init desc_before_addrMarek Vasut2016-05-03-0/+3
| | | | | | | | | | | Initialize desc_before_addr, otherwise the USB core won't send the first 64B Get Device Descriptor request in common/usb.c function usb_setup_descriptor() . There are some USB devices which expect this sequence and otherwise can misbehave. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Tom Rini <trini@konsulko.com>
* usb: dwc2: Make OC protection configurableMarek Vasut2016-05-03-3/+14
| | | | | | | | | | Introduce a new flag in the controller private data, which allows selectively disabling the OC protection. Use the standard 'disable-over-current' OF prop to set this flag. This OC protection must be disabled on EBV SoCrates rev 1. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Dinh Nguyen <dinguyen@kernel.org>
* usb: dwc2: Pull Ext VBUS macro from dwc_otg_core_init()Marek Vasut2016-05-03-7/+14
| | | | | | | | | | | Introduce a boolean flag in the dwc2 controller private data and set it according to the macro (for now) instead of having this macro directly in the dwc_otg_core_init(). This will let us configure the flag from DT or such later on, if needed. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Dinh Nguyen <dinguyen@kernel.org>
* usb: dwc2: Pass private data into dwc_otg_core_init()Marek Vasut2016-05-03-2/+3
| | | | | | | | | | Pass the whole bulk of private data instead of just the regs, since the private data will soon contain important configuration flags. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Dinh Nguyen <dinguyen@kernel.org>
* igep00x0: Use the SRAM available for SPL.Enric Balletbo i Serra2016-05-03-0/+7
| | | | | | | | | | | Move CONFIG_SPL_TEXT_BASE down to 0x40200000 and set CONFIG_SPL_MAX_SIZE to (SRAM_SCRATCH_SPACE_ADDR - CONFIG_SPL_TEXT_BASE), so that it's clear what the limit is. This will also help some compilers to fit all the code into the allocated space. Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
* mkimage: fix generation of FIT imageAndreas Bießmann2016-05-03-6/+3
| | | | | | | | | | | Commit 7a439cadcf3192eb012a2432ca34670b676c74d2 broke generation of SPL loadable FIT images (CONFIG_SPL_LOAD_FIT). Fix it by removing the unnecessary storage of expected image type. This was a left over of the previous implementation. It is not longer necessary since the mkimage -b switch always has one parameter. Tested-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Andreas Bießmann <andreas@biessmann.org>
* i2c/eeprom: Always define I2C_RXTX_LENMario Six2016-05-03-0/+4
| | | | | | | | | | | I2C_RXTX_LEN from include/i2c.h is not defined if CONFIG_DM_I2C is enabled. This leads to a compilation error on boards that enable both CONFIG_CMD_EEPROM and CONFIG_DM_I2C. To avoid this, we define I2C_RXTX_LEN in cmd/eeprom.c if it is not already defined. Signed-off-by: Mario Six <mario.six@gdsys.cc>
* mx6ul_evk: Remove CONFIG_SUPPORT_EMMC_BOOTFabio Estevam2016-05-02-1/+0
| | | | | | | | | | | | | | | | | | mx6ul_evk does not come with a eMMC populated, so we should not define CONFIG_SUPPORT_EMMC_BOOT as it causes SPL to not be able to boot some brands of SD cards, such as SanDisk microSD HC - 8GB: U-Boot SPL 2016.05-rc1-28384-g108f841 (Apr 19 2016 - 11:19:11) Trying to boot from MMC1 spl: mmc block read error SPL: failed to boot from all boot devices ### ERROR ### Please RESET the board ### When CONFIG_SUPPORT_EMMC_BOOT is defined spl_boot_mode() returns MMCSD_MODE_EMMCBOOT, so remove this option to have a reliable boot via SD card. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
* kbuild: Do not append dtb for OF_EMBED caseMichal Simek2016-05-02-1/+1
| | | | | | | | | | | dtb is already included in binary that's why there is no need to replace u-boot-spl.bin with u-boot-spl-dtb.bin. This is only needed for OF_SEPARATE is enabled. Only copy -nodtb.bin version which is straight output from objcopy -O binary. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* fit_image: Fix a double close() on the error pathSimon Glass2016-05-02-1/+0
| | | | | | | There is an extra close() call which is not needed. Reported-by: Coverity (CID: 143065) Signed-off-by: Simon Glass <sjg@chromium.org>
* tools: env: fix config file loading in env libraryAnatolij Gustschin2016-05-02-0/+3
| | | | | | | | | | | | env library is broken as the config file pointer is only initialized in main(). When running in the env library parse_config() fails: Cannot parse config file '(null)': Bad address Ensure that config file pointer is always initialized. Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* config: am335x_evm: detect BoneGreen using BBG1matwey.kornilov@gmail.com2016-05-02-6/+3
| | | | | | | Since 770e68c0a37fded897d4bdda661614fc81cb33d2 BoneGreen is detected in board_late_init as board_name 'BBG1' Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com>
* Fix spelling of "occurred".Vagrant Cascadian2016-05-02-32/+32
| | | | | Signed-off-by: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* Change my mailaddressAndreas Bießmann2016-05-02-23/+24
| | | | | | I'll switch my mails to my own server, so drop all gmail references. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* mkimage: fix argument parsing on BSD systemsAndreas Bießmann2016-05-02-25/+16
| | | | | | | | | | | The getopt(3) optstring '-' is a GNU extension which is not available on BSD systems like OS X. Remove this dependency by implementing argument parsing in another way. This will also change the lately introduced '-b' switch behaviour. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* arch/arm/imx-common/Makefile: Update u-boot.uim MKIMAGEFLAGSTom Rini2016-05-02-1/+1
| | | | | | We need to be passing -T firmware here and aren't. Signed-off-by: Tom Rini <trini@konsulko.com>
* fs: ext4: fix symlink read functionRonald Zachariah2016-05-02-1/+1
| | | | | | | | | | The function ext4fs_read_symlink was unable to handle a symlink which had target name of exactly 60 characters. Signed-off-by: Ronald Zachariah <rozachar@cisco.com> Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Stephen Warren <swarren@nvidia.com> Cc: Tom Rini <trini@konsulko.com>
* Revert "rockchip: rk3288: correct sdram setting"Vagrant Cascadian2016-05-02-7/+7
| | | | | | | | | | This reverts commit b5788dc0dd9570e98552833767f4373db965985d. Ram size is incorrectly reported as 512MB on a firefly-rk3288 board with 2GB of ram. Reverting this patch displays the full amount of ram. Signed-off-by: Vagrant Cascadian <vagrant@debian.org> Acked-by: Simon Glass <sjg@chromium.org>
* Merge branch 'master' of git://git.denx.de/u-boot-uniphierTom Rini2016-05-02-29/+47
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| * ARM: uniphier: move pin-mux code into pin_init functionMasahiro Yamada2016-05-01-27/+5
| | | | | | | | | | | | | | The code in uniphier_sld3_sbc_init() is pin-muxing, so it would be a better fit in uniphier_sld3_early_pin_init(). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * ARM: uniphier: allow to use System Bus for ROM boot mode of PH1-LD20Masahiro Yamada2016-05-01-1/+37
| | | | | | | | | | | | | | | | | | The System Bus is not available by default on the ROM boot mode of PH1-LD20. To use devices connected to the System Bus, such as the Micro Support Card, it is necessary to set up pin-muxing and some System Bus Controller register. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * ARM: uniphier: enable Peripherl clock to use UART in SPLMasahiro Yamada2016-05-01-0/+4
| | | | | | | | | | | | This is needed to use UART on SPL. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * ARM: uniphier: fix boot mode table of PH1-LD20Masahiro Yamada2016-05-01-1/+1
| | | | | | | | | | | | | | PH1-LD20 does not have the dedicated boot swap select latch. Instead, it is controlled from the boot mode select. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | Revert "omap3: Use raw SPL by default for mmc1"Tom Rini2016-05-02-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | Unfortunately with this change we now are unable to do FS mode boots from MMC1 as with the way the code works today we will always load and assume that the hard-coded raw location contains U-Boot. Further, we cannot fix this by just changing other logic to try FS-then-RAW as it would also make us have to ignore what order the ROM is telling us to try. This reverts commit 22d90d560a2b01c47f180e196e6c6485eb8e65db. Signed-off-by: Tom Rini <trini@konsulko.com>
* | Revert "ti_armv7_common.h: Fix U-Boot location on eMMC"Tom Rini2016-05-02-2/+2
|/ | | | | | | | | We cannot change the long standing hard-coded offset for raw boot mode for everyone to accommodate how Android expects things to be done here. This reverts commit ef5ebe951bec72631cdbc7cef9079e6c684e5d0b. Signed-off-by: Tom Rini <trini@konsulko.com>
* Merge branch 'master' of git://git.denx.de/u-boot-videoTom Rini2016-04-28-7/+23
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| * drivers/video/am335x-fb: Properly point framebuffer behind paletteMartin Pietryka2016-04-28-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DMA was outputting the palette on the screen because the base for the DMA was not after the palette. In addition to that, the ceiling was also too high, this led that the output on the screen was shifted. NOTE: According to the TRM, even in 16/24bit mode a palette is required in the first 32 bytes of the framebuffer. See also: https://e2e.ti.com/support/arm/sitara_arm/f/791/p/234967/834483#834483 "In this mode, the LCDC will assume all information is data and thus you need to ensure that the DMA points to the first pixel of data and not the first entry in the frame buffer which is the beginning of the 512 byte palette." Signed-off-by: Martin Pietryka <martin.pietryka@chello.at> Reviewed-by: Hannes Schmelzer <oe5hpm@oevsv.at> Tested-by: Hannes Schmelzer <oe5hpm@oevsv.at>
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