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* test, tools: introduce tbot READMEHeiko Schocher2016-02-08-0/+734
| | | | | | | introduce a README how to use tbot for testing U-Boot and/or linux kernels. Signed-off-by: Heiko Schocher <hs@denx.de>
* ARM: omap3_logic: Fix pin muxingAdam Ford2016-02-08-65/+313
| | | | | | | Enhance pin muxing to enable more board features and reduce power based on Tony's device tree work. Signed-off-by: Adam Ford <aford173@gmail.com>
* tools: env: update usage stringsAndreas Fenkart2016-02-08-42/+75
| | | | Signed-off-by: Andreas Fenkart <andreas.fenkart@digitalstrom.com>
* tools: env: factor out parse_common_argsAndreas Fenkart2016-02-08-25/+37
| | | | Signed-off-by: Andreas Fenkart <andreas.fenkart@digitalstrom.com>
* tools: env: shift optind arguments and fix argument indicesAndreas Fenkart2016-02-08-43/+15
| | | | Signed-off-by: Andreas Fenkart <andreas.fenkart@digitalstrom.com>
* tools: env: parse aes key / suppress flag into argument structAndreas Fenkart2016-02-08-57/+53
| | | | | | | disabled original parsing, but not yet removed since the argument indexing needs to be fixed Signed-off-by: Andreas Fenkart <andreas.fenkart@digitalstrom.com>
* tools: env: introduce setenv/printenv argument structsAndreas Fenkart2016-02-08-38/+84
| | | | | | | goal is to use getopt for all argument parsing instead of adhoc parsing in fw_getenv/fw_setenv functions Signed-off-by: Andreas Fenkart <andreas.fenkart@digitalstrom.com>
* tools: env: make parse_aes_key statelessAndreas Fenkart2016-02-08-6/+6
| | | | Signed-off-by: Andreas Fenkart <andreas.fenkart@digitalstrom.com>
* tools: env validate: pass values as 0-based arrayAndreas Fenkart2016-02-08-12/+15
| | | | | | passing argv/argc can produce off-by-one errors Signed-off-by: Andreas Fenkart <andreas.fenkart@digitalstrom.com>
* Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-stagingTom Rini2016-02-08-621/+640
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| * net: davinci_emac: fix NULL check after pointer dereferenceVishwas Srivastava2016-02-06-1/+3
| | | | | | | | | | | | | | | | | | | | | | NULL check is made after the pointer dereference. This patch fixes this issue. Signed-off-by: Vishwas Srivastava <vishu.kernel@gmail.com> CC: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Anatolij Gustschin <agust@denx.de>
| * ppc: xilinx-ppc405-genericRicardo Ribalda2016-02-06-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix device tree name: +(xilinx-ppc405-generic) Device Tree Source is not correctly specified. +(xilinx-ppc405-generic) Please define 'CONFIG_DEFAULT_DEVICE_TREE' +(xilinx-ppc405-generic) or build with 'DEVICE_TREE=<device_tree>' argument +(xilinx-ppc405-generic) make[2]: *** [arch/powerpc/dts/xilinx-ppc440-generic.dtb] Error 1 +(xilinx-ppc405-generic) make[1]: *** [dts] Error 2 Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
| * net: fix wrong initialization in davinci-emac driverVishwas Srivastava2016-02-06-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | emac module of the davinci platform supports only 8 tx and 8 rx channels (total 16). emac driver for davinci platform, however, while doing initialization of the dma descriptor head pointers, wrongly initializes the 16 head pointers (instead of 8) for tx dma and 16 head pointers (insted of 8) for rx dma, which is wrong. The result is, that this register initilization spills over the other registers which was not intended and is undesirable. This patch fixes this problem. Signed-off-by: Vishwas Srivastava <vishu.kernel@gmail.com> CC: Joe Hershberger <joe.hershberger@ni.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Anatolij Gustschin <agust@denx.de>
| * fdt: introduce fdtdec_get_child_countPeng Fan2016-02-06-0/+20
| | | | | | | | | | | | | | | | | | Introduce fdtdec_get_child_count for get the number of subnodes of one parent node. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
| * rockchip: Drop old CONFIG_VIDEO_ROTATION optionSimon Glass2016-02-06-3/+0
| | | | | | | | | | | | | | | | | | | | The option was renamed to CONFIG_CONSOLE_ROTATION and Rockchip boards were not updated. However this option is is not needed by default for Rockchip since we don't need a rotated console for current boards. So just remove the old option. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
| * bzlib: Try another way to fix an unused variableSimon Glass2016-02-06-4/+3
| | | | | | | | | | | | | | | | | | Use __maybe_unused which should avoid the Coverity error. Reported-by: Coverity (CID: 134900) Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
| * video: test: Adjust order of file closureSimon Glass2016-02-06-1/+1
| | | | | | | | | | | | | | | | | | Close the file earlier to hopefully fix a Coverity error. Reported-by: Coverity (CID: 134901) Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
| * video: Use 'int' for loop variables instead of shortSimon Glass2016-02-06-1/+1
| | | | | | | | | | | | | | | | | | | | Using short doesn't save anything and is confusing when the width and height variables are ulong. This may fix Coverity CID134902 but I doubt it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
| * cmd: Fix control bmp_display()Simon Glass2016-02-06-2/+1
| | | | | | | | | | | | | | | | | | All paths should share the same return. Reported-by: Coverity (CID:134903) Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
| * microblaze: Correct build error in eth-uclass.cSimon Glass2016-02-06-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | This fixes the following error when building microblaze-generic: net/eth-uclass.c: In function 'eth_post_probe': net/eth-uclass.c:466:18: error: 'gd' undeclared (first use in this function) ops->start += gd->reloc_off; Fixes: db9391e1 ("net: Move driver-model code into its own file") Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * Use correct spelling of "U-Boot"Bin Meng2016-02-06-606/+606
| | | | | | | | | | | | | | | | | | | | Correct spelling of "U-Boot" shall be used in all written text (documentation, comments in source files etc.). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-niosTom Rini2016-02-08-0/+7
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| * | nios2: set up the debug UART earlyThomas Chou2016-02-06-0/+7
| |/ | | | | | | | | | | | | Set up the debug UART early if enabled, so that it is ready to use. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Acked-by: Chin Liang See <clsee@altera.com>
* | x86: Drop pci_type1.c and DEFINE_PCI_DEVICE_TABLEBin Meng2016-02-05-60/+0
| | | | | | | | | | | | | | | | | | Now that we have converted all x86 codes to DM PCI, drop pci_type1.c which is only built for legacy PCI. Also per checkpatch.pl warning, DEFINE_PCI_DEVICE_TABLE is now deprecated so drop that too. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | x86: Disable DM_PCI_COMPATBin Meng2016-02-05-3/+0
| | | | | | | | | | | | | | Now that all x86 codes have been converted to use proper DM PCI APIs, it's time to disable the legacy compatible layer. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
* | dm: pci: Add missing forward declarationsBin Meng2016-02-05-11/+5
| | | | | | | | | | | | | | | | When CONFIG_DM_PCI_COMPAT is not on, there is only a forward declaration for pci_write_config32(). Add other missing ones. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | x86: chromebox_panther: Convert to use driver model ethernetBin Meng2016-02-05-0/+1
| | | | | | | | | | | | | | This board uses RTL8169 which is a driver model ethernet driver. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | x86: chromebox_panther: Drop the cache line size hackBin Meng2016-02-05-2/+0
| | | | | | | | | | | | | | Now that the RTL8169 driver warning is fixed we can drop this. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | efi: app: Disable CONFIG_USB_EHCI_PCIBin Meng2016-02-05-0/+1
| | | | | | | | | | | | | | | | It does not build if without CONFIG_DM_PCI_COMPAT. For now we just disable it, until some day we add USB support to EFI application. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | efi: app: Clean up defconfigBin Meng2016-02-05-4/+1
| | | | | | | | | | | | | | | | Move some #undef from efi-x86.h to efi-x86_defconfig as these are already Kconfig options. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | x86: quark: Use Quark's own PCI config APIsBin Meng2016-02-05-2/+3
| | | | | | | | | | | | | | | | | | There are still two places in Quark's MRC codes that use the generic legacy PCI APIs, but as we are phasing out these legacy APIs, switch to use Quark's own PCI config routines. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | net: e1000: Convert to use DM PCI APIBin Meng2016-02-05-1/+78
| | | | | | | | | | | | | | Update this driver to use proper DM PCI APIs. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | net: designware: Use dm_pci_mem_to_phys() in the probe routineBin Meng2016-02-05-3/+1
| | | | | | | | | | | | | | Convert to use native DM PCI API dm_pci_mem_to_phys(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | net: pch_gbe: Convert to use DM PCI APIBin Meng2016-02-05-16/+13
| | | | | | | | | | | | | | Use native DM PCI APIs instead of legacy compatible ones. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | x86: pci: Drop legacy PCI APIsBin Meng2016-02-05-65/+0
| | | | | | | | | | | | | | | | | | Now that we have converted all x86 codes to use DM PCI APIs, drop those legacy ones. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* | x86: pci: Use DM PCI APIs in pci_assign_irqs()Bin Meng2016-02-05-3/+3
| | | | | | | | | | | | | | | | Drop legacy PCI APIs usage in pci_assign_irqs() as well. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* | x86: qemu: Convert to use DM PCI APIBin Meng2016-02-05-17/+17
| | | | | | | | | | | | | | | | Use pci_[read|write]_config intead of x86_pci_[read|write]_config. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* | x86: tnc: Remove IGD and SDVO devices from driver modelBin Meng2016-02-05-0/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With recent DM PCI changes to vesa_fb driver, external graphics card does not work any more. This is because: after setting the function disable bit, IGD and SDVO devices will disappear in the PCI configuration space. This however creates an inconsistent state from a driver model PCI controller point of view, as these two PCI devices are still attached to its parent's child device list as maintained by the driver model. Some driver model PCI APIs like dm_pci_find_class() used in the vesa_fb driver, are referring to the list to speed up the finding process instead of re-enumerating the whole PCI bus, so it gets the stale cached data which is wrong. To fix this, manually remove these two devices. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* | x86: tnc: Use DM PCI API in disable_igd()Bin Meng2016-02-05-3/+19
| | | | | | | | | | | | | | | | | | Once we get udevice of IGD and SDVO, we can use its udevice to access PCI configuration space with dm_pci_write_config32(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* | x86: tnc: Change disable_igd() to have a return valueBin Meng2016-02-05-3/+7
| | | | | | | | | | | | | | | | | | So far disable_igd() does not have any return value, but we may need that in the future. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* | x86: irq: Convert to use DM PCI APIBin Meng2016-02-05-4/+4
| | | | | | | | | | | | | | | | | | Now that we have irq router's udevice passed as a parameter, it's time to start using the DM PCI API instead of those legacy ones. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* | x86: irq: Move irq_router to a per driver privBin Meng2016-02-05-46/+51
| | | | | | | | | | | | | | | | | | | | | | At present irq_router is declared as a static struct irq_router in arch/x86/cpu/irq.c. Since it's a driver control block, it makes sense to move it to a per driver priv. Adjust existing APIs to accept an additional parameter of irq_router's udevice. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* | x86: irq: Get irq_router's bdf via dm_pci_get_bdf()Bin Meng2016-02-05-8/+1
| | | | | | | | | | | | | | | | | | There is no need to parse PCH's <reg> property as we have already a DM PCI API dm_pci_get_bdf() that can handle this. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* | x86: minnowmax: Drop io-base property in the pch_pinctrl nodeBin Meng2016-02-05-1/+0
| | | | | | | | | | | | | | | | IOBASE is now obtained from PCH driver, drop this <io-base> property. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* | x86: Drop asm/arch/gpio.hBin Meng2016-02-05-92/+2
| | | | | | | | | | | | | | | | | | asm/arch/gpio.h is not needed anymore as we get the GPIO base from PCH driver. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* | x86: ich6_gpio: Convert to use proper DM APIBin Meng2016-02-05-255/+186
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present this GPIO driver still uses the legacy PCI API. Now that we have proper PCH drivers we can use those to obtain the information we need. While the device tree has nodes for the GPIO peripheral it is not in the right place. It should be on the PCI bus as a sub-peripheral of the PCH device. Update the device tree files to show the GPIO controller within the PCH, so that PCI access works as expected. This also adds '#address-cells' and '#size-cells' to the PCH node. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* | x86: pch9: Implement get_io_base opBin Meng2016-02-05-0/+17
| | | | | | | | | | | | | | | | IO_BASE is only seen on PCH9 device, implement the get_io_base op. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* | dm: pch: Add get_io_base opBin Meng2016-02-05-0/+29
| | | | | | | | | | | | | | | | | | | | On some newer chipset (eg: BayTrail), there is an IO base address register on the PCH device which configures the base address of a memory-mapped I/O controller. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* | x86: pch: Implement get_gpio_base opBin Meng2016-02-05-0/+99
| | | | | | | | | | | | | | | | Implement get_gpio_base op for bd82x6x, pch7 and pch9 drivers. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* | dm: pch: Add get_gpio_base opBin Meng2016-02-05-0/+29
| | | | | | | | | | | | | | | | | | | | x86 GPIO registers are accessed via I/O port whose base address is configured in a PCI configuration register on the PCH device. Add an op get_gpio_base to get the GPIO base address from PCH. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
generated by cgit v1.1 at 2024-11-05 06:44:49 +0000