summaryrefslogtreecommitdiff
Commit message (Expand)AuthorAgeLines
* x86: pci: Assign pci irqs to all functionsBin Meng2015-07-28-14/+19
* x86: Enable DM RTC support for all x86 boardsBin Meng2015-07-28-9/+36
* x86: Change pci option rom area MTRR setting to cacheableBin Meng2015-07-28-7/+22
* x86: Simplify architecture defined exception handling in irq_llsr()Bin Meng2015-07-28-105/+46
* x86: Display correct CS/EIP/EFLAGS when there is an error codeBin Meng2015-07-28-4/+65
* Merge branch 'zynq' of git://www.denx.de/git/u-boot-microblazeTom Rini2015-07-28-117/+1427
|\
| * cmd_mp: Add support for showing all CPU status by one commandMichal Simek2015-07-28-0/+22
| * spi: zynq_spi: Simplify debug macroMichal Simek2015-07-28-1/+1
| * zynq: Fix typo in Makefile about custom ps7_init fileMichal Simek2015-07-28-1/+1
| * net: gem: Extend timeout valueMichal Simek2015-07-28-1/+1
| * zynqmp: Show EL level where U-Boot runsMichal Simek2015-07-28-0/+2
| * ARM: zynqmp: Wire up SATA for the boardMichal Simek2015-07-28-0/+24
| * ARM: zynqmp: Wire up ethernet controllersMichal Simek2015-07-28-0/+56
| * ARM: zynq: Add support for zc770-xm011Michal Simek2015-07-28-0/+82
| * ARM: zynq: DT: Update zc770 dtsesMichal Simek2015-07-28-12/+176
| * ARM: zynq: DT: Add zc702 pushbuttons to DT as gpio-keysMichal Simek2015-07-28-0/+21
| * ARM: zynq: DT: Add missing interrupt for L2 pl310Michal Simek2015-07-28-0/+1
| * ARM: zynq: DT: Get rid of ps-clk-frequencyMichal Simek2015-07-28-1/+0
| * ARM: zynq: DT: Update years in copyrightMichal Simek2015-07-28-1/+1
| * ARM: zynq: DT: Sync zc702/zc706/zed/zybo DT with kernelMichal Simek2015-07-28-13/+715
| * ARM: zynq: DT: Add reference to bus nodeMichal Simek2015-07-28-1/+1
| * ARM: zynq: DT: Add pinctrl nodeMichal Simek2015-07-28-1/+7
| * ARM: zynq: DT: Cleanup address-cells and size-cellsMichal Simek2015-07-28-1/+4
| * ARM: zynq: DT: Clean up timer device tree nodesMichal Simek2015-07-28-2/+2
| * ARM: zynq: DT: Use the zynq binding with macbMichal Simek2015-07-28-2/+2
| * ARM: zynq: DT: Fix GEM register area sizeMichal Simek2015-07-28-2/+2
| * spi: Fix zynq SPI bindingMichal Simek2015-07-28-19/+22
| * ARM: zynq: DT: Remove 222 MHz OPPMichal Simek2015-07-28-1/+0
| * ARM: zynq: DT: Migrate UART to Cadence bindingMichal Simek2015-07-28-4/+4
| * ARM: zynq: DT: Add a fixed regulator for CPU voltageMichal Simek2015-07-28-0/+10
| * ARM: zynq: DT: Add missing nodes to DTSIMichal Simek2015-07-28-0/+100
| * ARM: zynq: DT: Use the right names for nodesMichal Simek2015-07-28-10/+10
| * zynqmp: Add support for IP detection via SLCRMichal Simek2015-07-28-0/+74
| * zynqmp: mp: Simplify set_r5_start handlingMichal Simek2015-07-28-6/+1
| * zynqmp: Provide option to enable uart dcc support for zynqmpSiva Durga Prasad Paladugu2015-07-28-1/+8
| * Kconfig: zynqmp: Move CONFIG_SYS_TEXT_BASE to defconfigSiva Durga Prasad Paladugu2015-07-28-2/+2
| * zynqmp: Define ep config for ZynqMPSiva Durga Prasad Paladugu2015-07-28-16/+43
| * zynqmp: Kconfig: Move zynqmp KconfigSiva Durga Prasad Paladugu2015-07-28-1/+2
| * zynq: gem: Setting up WRAP bit for one TX bdMichal Simek2015-07-28-1/+2
| * zynq: gem: Increase the Rx buffer descriptors to 32Siva Durga Prasad Paladugu2015-07-28-1/+1
| * zynqmp: gem: Flush the rx buffers while transmittingSiva Durga Prasad Paladugu2015-07-28-3/+7
| * zynqmp: gem: Set data bus width to 64bit for arm64Siva Durga Prasad Paladugu2015-07-28-1/+8
* | am3517_evm: add FIT supportYegor Yefremov2015-07-27-0/+3
* | Reproducible U-Boot build support, using SOURCE_DATE_EPOCHPaul Kocialkowski2015-07-27-4/+36
* | tools: remove mpc86x_clk toolMasahiro Yamada2015-07-27-207/+0
* | configs: k2*_evm: rename skernel binary names to generated file namesNishanth Menon2015-07-27-3/+3
* | configs: ti_armv7_keystone2: switch to using kernel zImageNishanth Menon2015-07-27-6/+5
* | configs: ti_armv7_keystone2: switch addresses to generic addressesNishanth Menon2015-07-27-13/+9
* | configs: ti_armv7_keystone2: start using armv7_commonNishanth Menon2015-07-27-44/+22
* | configs: rename ks2_evm into ti_armv7_keystone2Nishanth Menon2015-07-27-3/+3
generated by cgit v1.1 at 2024-11-10 09:04:35 +0000