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* | | clock_am43xx:Set the MAC clock to /5 for OPP100Steve Kipisz2015-02-16-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | When EMAC is in the boot order, the boot ROM sets OPP50 and the MAC clock is set to /2. SPL needs to change it to /5 for Ethernet to generate the correct txclk. This patch sets it correctly. Signed-off-by: Steve Kipisz <s-kipisz2@ti.com>
* | | ARM: DRA7-evm: DDR3: Update leveling valuesLokesh Vutla2015-02-16-30/+30
| | | | | | | | | | | | | | | | | | | | | Update the software leveling parameters. This fixes the random crash seen on DRA7-evm. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | | ARM: DRA7: EMIF: Update SDRAM_REF_CTRL register valueLokesh Vutla2015-02-16-6/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The value in SDRAM_REF_CTRL controls the delay time between the initial rising edge of DDR_RESETn to rising edge of DDR_CKE (JEDEC specs this as 500us). In order to achieve this, SDRAM_REF_CTRL should be written with a value corresponding to 500us delay before starting DDR initialization sequence, and configure proper value at the end of sequence. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | | ARM: DRA72x: DDR3: Fix EMIF timings for 666MHz clockAngela Stegmaier2015-02-16-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DDR3 timing and latency paramenters were not configured correctly for 666MHz. Fixing the timing and latency values according to Data sheet. This fixes the random crashes seen on DRA72-evm. Signed-off-by: Angela Stegmaier <angelabaker@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | | mtd, omap: fix case NAND_OMAP_GPMC_PREFETCH not definedEgli, Samuel2015-02-16-1/+4
| |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch c316f577b4b72d1a1aeb559e9b3fad20808f1ffd breaks siemens boards because prefetch mode is not enabled. I assume it breaks other boards as well that don't use prefetch. This patch sets read_buf to nand_read_buf if NAND_OMAP_GPMC_PREFETCH is not defined. Signed-off-by: Samuel Egli <samuel.egli@siemens.com> CC: Daniel Mack <zonque@gmail.com> CC: Guido Martínez <guido@vanguardiasur.com.ar> CC: Tom Rini <trini@ti.com> CC: Heiko Schocher <hs@denx.de>
* | Merge git://git.denx.de/u-boot-marvellTom Rini2015-02-16-17/+164
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| * | lsxl: add a README fileMichael Walle2015-02-16-0/+139
| | | | | | | | | | | | | | | | | | | | | | | | The README describes the recovery method which can be used if the NAS box is not reachable anymore. Addionally, it describes the different boot scripts. Signed-off-by: Michael Walle <michael@walle.cc>
| * | lsxl: switch from bootm to bootz for boot commandsMichael Walle2015-02-12-13/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the bootz command to load zImages in case of any new boot scripts. Only the legacy one will still use bootm. Apart form the fact, that this will simplify the image generation process, it saves one copy of the kernel image: Common practice is to generate an uImage with a loading address of 0x8000. This uImage contains a compressed zImage, which will unpack the kernel image to the beginning of the RAM. But because there is already the compressed image the uncompressor first relocates the compressed image to a higher location. The load address is encoded into the uImage which is generated by the distributions and thus cannot be easily changed. By using the bootz command we can load the compressed image to a higher memory address and the decompressor doesn't have to reloacte the image. Signed-off-by: Michael Walle <michael@walle.cc>
| * | lsxl: place the dtb below the inital ramdiskMichael Walle2015-02-12-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The dtb was loaded at a memory address after the initial ramdisk. Thus a large ramdisk would overwrite the dtb. Move it to "ramdisk_start - 64k". 64k should be enough for the device tree blob. Also the kernel documentation arm/Booting suggests to put the dtb before the initial ramdisk. Signed-off-by: Michael Walle <michael@walle.cc>
| * | lsxl: use default load addresses for legacy bootMichael Walle2015-02-12-3/+3
| |/ | | | | | | | | | | | | | | | | | | The load addresses for the bootcmd_legacy script were taken from the original bootloader from Buffalo. But newer kernels are too big and the uncompressing will overwrite parts of the initial ramdisk. Therefore, we switch to the load addresses which are also used by the other boot script. Signed-off-by: Michael Walle <michael@walle.cc>
* | Merge branch 'sandbox' of git://git.denx.de/u-boot-x86Tom Rini2015-02-16-33/+43
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| * | sandbox: Adjust the order of the NO_SDL checkSimon Glass2015-02-15-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | An option is provided to avoid using SDL in U-Boot sandbox (and drop support for the LCD). However the check in the Makefile is too late and warnings are printed even if NO_SDL=y is given. Adjust the order to avoid this warning. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Jeroen Hofstee <jeroen@myspectrum.nl>
| * | sandbox: Return '-c command' exit value as sandbox exit codeJoe Hershberger2015-02-15-22/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When a command is passed into sandbox using the '-c' argument the command is run directly. This is most helpful when running tests (such as test-dm.sh). Previously the exit code was an unused enum. Change it to be the actual return code from the command so that the script calling sandbox can know if the command succeeded (tests passed). Also remove the now completely unused "exit_state" in sandbox. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | buildman: allow multiple toolchains in a single pathAlbert ARIBAUD2015-02-15-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When buildman scans a toolchain path, it stops at the first toolchain found. However, a single path can contains several toolchains, each with its own prefix. This patch lets buildman scan all toolchains in the path. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Acked-by: Simon Glass <sjg@chromium.org>
| * | patman: Read in the git-mailrc alias fileSimon Glass2015-02-15-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We should read this file to obtain a set of aliases. This reduces the need to create them in the ~/.patman file. This feature did exist in some version of patman, and is mentioned in the help but it did not find its way upstream. Reported-by: Graeme Russ <gruss@tss-engineering.com> Signed-off-by: Simon Glass <sjg@chromium.org>
| * | buildman: Fix incorrect arguemnt in GetUpstream()Simon Glass2015-02-15-1/+1
| |/ | | | | | | | | | | | | | | This causes an error when trying to build a local branch which has a local branch as its upstream. Signed-off-by: Simon Glass <sjg@chromium.org> Reported-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | Merge git://git.denx.de/u-boot-samsungTom Rini2015-02-13-335/+383
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| * | Exynos: Clock: Cleanup soc_get_periph_rateAkshay Saraswat2015-02-13-39/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since we have src, div and pre-div mask bits defined corresponding to peripherals, calculation of clock specific to I2C appears redundant and confusing. Using clk_bit_info struct we can write calculations generic to all peripherals which makes code easy to understand and free from peripheral specific exceptions. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | Exynos: clock: change mask bits as per peripheralAkshay Saraswat2015-02-13-73/+78
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We have assumed and kept mask bits for divider and pre-divider as 0xf and 0xff, respectively. But these mask bits change from one peripheral to another, and hence, need to be specified in accordance with the peripherals. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | Exynos5: Use clock_get_periph_rate generic APIAkshay Saraswat2015-02-13-235/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replacing SoC and peripheral specific function calls with generic clock_get_periph_rate calls to get the peripheral clocks. Also, removing dead code of peripheral and SoC specific function implementations which was used earlier for fetching peripheral clocks. This code is not being used anymore because of the introduction of generic clock_get_periph_rate function. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | Exynos5: Fix exynos5_get_periph_rate calculationsAkshay Saraswat2015-02-13-8/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | exynos5_get_periph_rate function reads incorrect div for SDMMC2 & 3. It also reads prediv and does division only for SDMMC0 & 2 when actually various other peripherals need that. Adding changes to fix these mistakes in periph rate calculation. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | Exynos542x: Add and enable get_periph_rate supportAkshay Saraswat2015-02-13-7/+150
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We planned to fetch peripheral rate through one generic API per peripheral. These generic peripheral functions are in turn expected to fetch apt values from a function refactored as per SoC versions. This patch adds support for fetching peripheral rates for Exynos5420 and Exynos5800. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | Exynos542x: Move exynos5420_get_pll_clk up and renameAkshay Saraswat2015-02-13-41/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Moving exynos5420_get_pll_clk function definition up in the code to keep it together with rest of SoC_get_pll_clk functions. This makes code more legible and also removes the need of declaration when called before the position of definition in code. Also, renaming exynos5420_get_pll_clk to exynos542x_get_pll_clk because it is being used for both Exynos 5420 and 5800. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | Exynos5: Fix compiler warnings due to clock_get_periph_rateAkshay Saraswat2015-02-13-31/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Apparently, members of clk_bit_info array do not map correctly to the members of enum periph_id. This mapping got broken after we changed periph_id(s) to reflect interrupt number instead of their position in a sequence. This patch intends to fix above mentioned issue. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | EXYNOS5: Add function to enable exynos5420 usbdev phy ctrlJoonyoung Shim2015-02-13-2/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | Exynos5420 has different registers with other exynos5 SoCs to control usb device phy, so need separated function to enable exynos5420 usb device phy. Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | odroid: fix g2d sclk rateJoonyoung Shim2015-02-13-2/+2
| | | | | | | | | | | | | | | | | | | | | G2D core should be provided 200MHz clock rate. Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | Odroid-XU3: Add eMMC-reset node on DTJoonyoung Shim2015-02-13-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | This needs for special handling of nRESET_OUT line(GPD1-0 gpio) for eMMC memory to perform complete reboot on Odroid XU3 board. Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | Odroid: Add eMMC-reset node on DTJoonyoung Shim2015-02-13-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | This needs for special handling of nRESET_OUT line(GPK1-2 gpio) for eMMC memory to perform complete reboot on Odroid X2/U3 boards. Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | samsung: board: support eMMC reset using DTJoonyoung Shim2015-02-13-8/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some exynos boards require special handling of nRESET_OUT line for eMMC memory to perform complete reboot e.g. Odroid X2/U3/XU3 boards. This will support eMMC reset using DT from reset_misc of samsung common board file. Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | arm: exynos: fix the div value for set_mmc_clkJaehoon Chung2015-02-13-0/+4
| |/ | | | | | | | | | | | | | | | | | | | | The most exynos used the "Ratio + 1" as div value. And value at register is "Ratio". So if want to set exact value, it needs to subtract one. Value at register ("Ratio") = div - 1 Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | Merge git://git.denx.de/u-boot-dmTom Rini2015-02-13-381/+2800
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| * | dm: mx6: sabre: Move driver model CONFIGs to KconfigSimon Glass2015-02-13-3/+12
| | | | | | | | | | | | | | | | | | | | | Remove driver model CONFIGs from the board config headers and use Kconfig instead. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | dm: stv0991: Move driver model CONFIGs to KconfigSimon Glass2015-02-13-10/+2
| | | | | | | | | | | | | | | | | | | | | Remove driver model CONFIGs from the board config headers and use Kconfig instead. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | dm: Add support for all targets which requires MANUAL_RELOCMichal Simek2015-02-12-0/+80
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Targets with CONFIG_NEEDS_MANUAL_RELOC do not use REL/RELA relocation (mostly only GOT) where functions aray are not updated. This patch is fixing function pointers for DM core and serial-uclass to ensure that relocated functions are called. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | dm:gpio:mxc add DT supportPeng Fan2015-02-12-17/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch add DT support for mxc gpio driver. There are one place using CONFIG_OF_CONTROL macro. 1. The U_BOOT_DEVICES and mxc_plat array are complied out. To DT, platdata is alloced using calloc, so there is no need to use mxc_plat. The following situations are tested, and all work fine: 1. with DM, without DT 2. with DM and DT 3. without DM Since device tree has not been upstreamed, if want to test this patch. The followings need to be done. + pieces of code does not gpio_request when using gpio_direction_xxx and etc, need to request gpio. + move the gpio settings from board_early_init_f to board_init + define CONFIG_DM ,CONFIG_DM_GPIO and CONFIG_OF_CONTROL + Add device tree file and do related configuration in `make ARCH=arm menuconfig` These will be done in future patches by step. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Acked-by: Igor Grinberg <grinberg@compulab.co.il> Acked-by: Simon Glass <sjg@chromium.org>
| * | dm:gpio:mxc add a bank_index entry in platdataPeng Fan2015-02-12-8/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a new entry in platdata structure and intialize bank_index in mxc_plat array. This new entry can avoid using `plat - mxc_plat` by using `plat->bank_index`. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Acked-by: Igor Grinberg <grinberg@compulab.co.il> Acked-by: Simon Glass <sjg@chromium.org>
| * | dm: introduce dev_get_addr interfacePeng Fan2015-02-12-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | Abstracting dev_get_addr can improve drivers that want to get device's address. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Acked-by: Igor Grinberg <grinberg@compulab.co.il> Acked-by: Simon Glass <sjg@chromium.org>
| * | dm: Drop unused driver model config_defaultsSimon Glass2015-02-12-12/+0
| | | | | | | | | | | | | | | | | | These are now in Kconfig so we can drop them from the header file. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | dm: Kconfig: Move CONFIG_SYS_MALLOC_F_LEN to KconfigSimon Glass2015-02-12-24/+97
| | | | | | | | | | | | | | | Move this option to Kconfig and update all boards. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | dm: at91: snapper: Move driver model CONFIGs to KconfigSimon Glass2015-02-12-4/+6
| | | | | | | | | | | | | | | | | | | | | Remove driver model CONFIGs from the board config headers and use Kconfig instead. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | dm: at91: Drop use of ATMEL_PIO_PORTS in the header fileSimon Glass2015-02-12-8/+4
| | | | | | | | | | | | | | | | | | | | | | | | With driver model the number of PIO ports is defined by platform data, so remove it from the header file. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * | dm: sh: serial: Add support driver modelNobuhiro Iwamatsu2015-02-12-113/+275
| | | | | | | | | | | | | | | | | | | | | | | | This adds driver model support with this driver. This was tested by Koelsch board and Gose board. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | dm: socfpga: Move driver model CONFIGs to KconfigSimon Glass2015-02-12-7/+3
| | | | | | | | | | | | | | | | | | | | | Remove driver model CONFIGs from the board config headers and use Kconfig instead. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | dm: mx6: Move driver model CONFIGs to KconfigSimon Glass2015-02-12-4/+3
| | | | | | | | | | | | | | | | | | | | | Remove driver model CONFIGs from the board config headers and use Kconfig instead. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | dm: sunxi: Move driver model CONFIGs to KconfigSimon Glass2015-02-12-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | Remove driver model CONFIGs from the board config headers and use Kconfig instead. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | dm: sandbox: Move driver model CONFIGs to KconfigSimon Glass2015-02-12-11/+24
| | | | | | | | | | | | | | | | | | | | | Remove driver model CONFIGs from the board config headers and use Kconfig instead. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | dm: omap3: Move driver model CONFIGs to KconfigSimon Glass2015-02-12-9/+134
| | | | | | | | | | | | | | | | | | | | | Remove driver model CONFIGs from the board config headers and use Kconfig instead. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | dm: tegra: Move driver model CONFIGs to KconfigSimon Glass2015-02-12-10/+18
| | | | | | | | | | | | | | | | | | | | | Remove driver model CONFIGs from the board config headers and use Kconfig instead. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | dm: x86: Move driver model CONFIGs to KconfigSimon Glass2015-02-12-5/+9
| | | | | | | | | | | | | | | | | | | | | Remove driver model CONFIGs from the board config headers and use Kconfig instead. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | dm: exynos: Move driver model CONFIGs to KconfigSimon Glass2015-02-12-16/+39
| | | | | | | | | | | | | | | | | | | | | Remove driver model CONFIGs from the board config headers and use Kconfig instead. Signed-off-by: Simon Glass <sjg@chromium.org>
generated by cgit v1.1 at 2024-11-06 16:27:04 +0000