summaryrefslogtreecommitdiff
Commit message (Collapse)AuthorAgeLines
...
* | drivers/net/phy/miiphybb.c: fix warning: no newline at end of fileWolfgang Denk2009-10-27-1/+1
| | | | | | | | | | | | | | | | Add missing newline. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Luigi Mantellini <luigi.mantellini@idf-hit.com> Cc: Ben Warren <biggerbadderben@gmail.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2009-10-27-81/+460
|\ \
| * | mpc85xx: Configure QE USB for MPC8569E-MDS boardsAnton Vorontsov2009-10-27-0/+38
| | | | | | | | | | | | | | | | | | | | | | | | Setup QE pin multiplexing for USB function, configure needed BCSRs and add some fdt fixups. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | mpc85xx: Configure QE UART for MPC8569E-MDS boardsAnton Vorontsov2009-10-27-21/+78
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To make QE UART usable by Linux we should setup pin multiplexing and turn UCC2 Ethernet node into UCC2 QE UART node. Also, QE UART is mutually exclusive with UART0, so we can't enable it if eSDHC is in 4-bits mode on pilot boards, or if it's a prototype board with eSDHC in 1- or 4-bits mode. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | mpc85xx: Setup QE pinmux for SPI Flash on MPC8569E-MDS boardsAnton Vorontsov2009-10-27-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | SPI Flash (M25P40) is connected to the SPI1 bus, we need a few qe_iop entries to actually enable SPI1 on these boards. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | mpc85xx: Setup SRIO memory region LAW for MPC8569E-MDS boardsAnton Vorontsov2009-10-27-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | This patch sets memory window for Serial RapidIO on MPC8569E-MDS boards. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | mpc85xx: Add eLBC NAND support for MPC8569E-MDS boardsAnton Vorontsov2009-10-27-19/+34
| | | | | | | | | | | | | | | | | | | | | | | | Simply add some defines, and adjust TLBe setup to include some space for eLBC NAND. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | mpc85xx: Add eSDHC support for MPC8569E-MDS boardsAnton Vorontsov2009-10-27-1/+138
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | eSDHC is mutually exlusive with UART0 (in 4-bits mode) and I2C2 (in 1-bit mode). When eSDHC is used, we should switch u-boot console to UART1, and make the proper device-tree fixups. Because of an erratum in prototype boards it is impossible to use eSDHC without disabling UART0 (which makes it quite easy to 'brick' the board by simply issung 'setenv hwconfig esdhc', and not able to interact with U-Boot anylonger). So, but default we assume that the board is a prototype, which is a most safe assumption. There is no way to determine board revision from a register, so we use hwconfig. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | xpedite5370: Enable multi-core supportPeter Tyser2009-10-27-4/+17
| | | | | | | | | | | | | | | Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | 85xx: MP Boot Page Translation updatePeter Tyser2009-10-27-31/+88
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change has 3 goals: - Have secondary cores be released into spin loops at their 'true' address in SDRAM. Previously, secondary cores were put into spin loops in the 0xfffffxxx address range which required that boot page translation was always enabled while cores were in their spin loops. - Allow the TLB window that the primary core uses to access the secondary cores boot page to be placed at any address. Previously, a TLB window at 0xfffff000 was always used to access the seconary cores' boot page. This TLB address requirement overlapped with other peripherals on some boards (eg XPedite5370). By default, the boot page TLB will still use the 0xfffffxxx address range, but this can be overridden on a board-by-board basis by defining a custom CONFIG_BPTR_VIRT_ADDR. Note that the TLB used to map the boot page remains in use while U-Boot executes. Previously it was only temporarily used, then restored to its initial value. - Allow Boot Page Translation to be disabled on bootup. Previously, Boot Page Translation was always left enabled after secondary cores were brought out of reset. This caused the 0xfffffxxx address range to somewhat "magically" be translated to an address in SDRAM. Some boards may not want this oddity in their memory map, so defining CONFIG_MPC8xxx_DISABLE_BPTR will turn off Boot Page Translation after the secondary cores are initialized. These changes are only applicable to 85xx boards with CONFIG_MP defined. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | ppc/85xx/pci: fsl_pci_init: pcie agent mode supportVivek Mahajan2009-10-27-13/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Originally written by Jason Jin and Mingkai Hu for mpc8536. When QorIQ based board is configured as a PCIe agent, then unlock/enable inbound PCI configuration cycles and init a 4K inbound memory window; so that a PCIe host can access the PCIe agents SDRAM at address 0x0 * Supported in fsl_pci_init_port() after adding pcie_ep as a param * Revamped copyright in drivers/pci/fsl_pci_init.c * Mods in 85xx based board specific pci init after this change Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | 85xx/p1_p2_rdb: Fixing DDR configuration for 800MHz data ratePoonam Aggrwal2009-10-27-2/+2
| | | | | | | | | | | | | | | Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | 85xx/p1_p2rdb: Fix crash while configuring 32 bit DDR i/f for P1020RDB.Poonam Aggrwal2009-10-27-8/+8
| | | | | | | | | | | | | | | | | | | | | The data being modified was in NOR flash which caused the crash. Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | fdt_support: Add multi-serial support for stdout fixupAnton Vorontsov2009-10-26-1/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently fdt_fixup_stdout() is using hard-coded CONFIG_CONS_INDEX constant. With multi-serial support, the CONS_INDEX may no longer represent actual console, so we should try to extract port number from the current stdio device name instead of always hard-coding the constant value. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Acked-by: Gerald Van Baren <vanbaren@cideas.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | ppc/85xx: Fix crashes due to generation of SPE instructionLeon Woestenberg2009-10-26-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | U-Boot crashed on the last instruction: int parse_stream_outer(struct in_str *inp, int flag) { effa4784: 94 21 ff 38 stwu r1,-200(r1) effa4788: 7c 08 02 a6 mflr r0 effa478c: 42 9f 00 05 bcl- 20,4*cr7+so,effa4790 <parse_stream_outer+0xc> effa4790: 7d 80 00 26 mfcr r12 effa4794: 13 c1 b3 21 evstdd r30,176(r1) ...which is a SPE instruction, although -mno-spe was used. tmp/cross/ppce500v2/bin/powerpc-angstrom-linux-gnuspe-gcc --version powerpc-angstrom-linux-gnuspe-gcc (GCC) 4.3.3 Seems to be a known issue (since 2008-04?!) Googled some, turns out this patch/workaround works for me on MPC8536DS. See http://gcc.gnu.org/ml/gcc-patches/2008-04/msg00311.html for more info Signed-off-by: Leon Woestenberg <leon@sidebranch.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | ppc/85xx: Make L2 support more robustDave Liu2009-10-26-1/+4
| | | | | | | | | | | | | | | | | | | | | According the user manual, we need loop-check the L2 enable bit set. Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | ppc/85xx: Fix compiler warning in nand_spl/.../p1_p2_rdb/nand_boot.cKumar Gala2009-10-26-1/+1
| | | | | | | | | | | | | | | | | | | | | nand_boot.c: In function 'board_init_f': nand_boot.c:44: warning: 'sys_clk' may be used uninitialized in this function Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | ppc/85xx: Fix building NAND_SPL out of treeKumar Gala2009-10-26-0/+12
| |/ | | | | | | | | | | | | We need to source files to exist in the O=<FOO> nand_spl dir when we build out of tree. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | Revert "env: only build env_embedded and envcrc when needed"Wolfgang Denk2009-10-27-13/+27
|/ | | | | | Breaks building on many boards, and no really clean fix available yet. This reverts commit 6dab6add2d8ee80905234b326abc3de11be1d178.
* License cleanup: Fix license header for some esd display configurationsMatthias Fuchs2009-10-24-44/+102
| | | | | | | | | | | These files were autogenerated by EPSON configuration tools. This patch replaces the autogenerated file headers by the GPL license notice. This change is done with the explicit permission of Epson Research & Development / IC Software Development. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* sf: add GPL-2 license infoMike Frysinger2009-10-24-0/+4
| | | | | | | Some of the new spi flash files were missing explicit license lines. Signed-off-by: Mike Frysinger <vapier@gentoo.org> CC: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* fdt: Fix fdt padding issue for initrd mem_rsvKumar Gala2009-10-24-2/+3
| | | | | | | | | | | | | Its possible that we end up with a device tree that happens to be a particular size that after we call fdt_resize() we don't have any space left for the initrd mem_rsv. Fix this be adding a second mem_rsv into the size calculation. We had one to cover the fdt itself and we have the potential of adding a second for the initrd. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Gerald Van Baren <vanbaren@cideas.com>
* Merge branch 'master' of /home/wd/git/u-boot/custodiansWolfgang Denk2009-10-24-2460/+6322
|\
| * Merge branch 'master-sync' of git://git.denx.de/u-boot-armWolfgang Denk2009-10-24-2460/+6322
| |\
| | * ARM: OMAP3: Refactors the SM911x driverSteve Sakoman2009-10-24-6/+6
| | | | | | | | | | | | | | | | | | | | | Move the test up in the function to not hang on systems without ethernet. Signed-off-by: Steve Sakoman <sakoman@gmail.com> Acked-by: Ben Warren <biggerbadderben@gmail.com>
| | * s5pc1xx: SMDKC100: fix compile warningsMinkyu Kang2009-10-24-113/+113
| | | | | | | | | | | | | | | | | | | | | fix the following compile warnings warning: dereferencing type-punned pointer will break strict-aliasing rules Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * arm926ejs: 8-byte align stack to avoid LDRD/STRD problemsSimon Kagstrom2009-10-24-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | U-boot for Marvell Kirkwood boards no longer work after the EABI changes introduced in commit f772acf8a584067033eff1e231fcd1fb3a00d3d9. This turns out to be caused by a stack alignment issue. The armv5te instructions ldrd/strd instructions require 8-byte alignment to work properly (otherwise undefined behavior). Tested on an OpenRD base board, where both printouts and ubifs stuff now works. Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
| | * TI OMAP3 SDP3430: Initial SupportTom Rix2009-10-24-0/+1077
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Start of support of Texas Instruments Software Development Platform(SDP) for OMAP3430 - SDP3430 Highlights of this platform are: Flash Memory devices: Sibley NOR, Micron 8bit NAND and OneNAND Connectivity: 3 UARTs and expanded 4 UART ports + IrDA Ethernet, USB Other peripherals: TWL5030 PMIC+Audio+Keypad VGA display Expansion ports: Memory devices plugin boards (PISMO) Connectivity board for GPS,WLAN etc. Completely configurable boot sequence and device mapping etc. Support default jumpering and: - UART1/ttyS0 console(legacy sdp3430 u-boot) - UART3/ttyS2 console (matching other boards, and SDP HW docs) - Ethernet - mmc0 - NOR boot Currently the UART1 is enabled by default. for compatibility with other OMAP3 u-boot platforms, enable the #define of CONSOLE_J9. Conflicts: Makefile Fixed the conflict with smdkc100_config by moving omap_sdp3430_config to it is alphabetically sorted location above zoom1. Signed-off-by: David Brownell <david-b@pacbell.net> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
| | * TI DaVinci: Adding Copyright for DM365 EVMSandeep Paulraj2009-10-24-0/+2
| | | | | | | | | | | | | | | | | | | | | Forgot to add Copyright while submitting the patch. This patch adds the copyright. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| | * TI DaVinci: Fix DM6467 EVM Compilation WarningSandeep Paulraj2009-10-24-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Due to new TI boards being added to U-Boot, the hardware.h is getting very messy. The warning being fixed is due to the EMIF addresses being redefined. The long term solution(after 2009.11) to this is to have SOC specific header files. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| | * TI DaVinci: DM355 Leopard: Fix compilation warningSandeep Paulraj2009-10-24-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We get a compliation warning when we enable the NAND driver for DM355 leopard. The waring we get is that we have an implicit declaration of davinci_nand_init. It is fixed by including the asm/arch/nand_defs.h header file Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| | * TI OMAP3: make gpmc_config as constNishanth Menon2009-10-24-8/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | gpmc_config should not be a variant as it is board specific hence make it a const parameter Fixes issues identified by Dirk: - build issue for zoom2 - warnings for all other OMAP3 platforms using nand/onenand etc Signed-off-by: Nishanth Menon <nm@ti.com>
| | * OMAP3: fix warnings when NAND/ONENAND is not usedNishanth Menon2009-10-18-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix build warnings by putting specific used variables under required #ifdefs for removing: mem.c:227: warning: unused variable 'f_sec' mem.c:226: warning: unused variable 'f_off' mem.c:225: warning: unused variable 'size' mem.c:224: warning: unused variable 'base' mem.c:222: warning: unused variable 'gpmc_config' Signed-off-by: Nishanth Menon <nm@ti.com>
| | * OMAP3: export enable_gpmc_cs_config to board filesNishanth Menon2009-10-18-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Export enable_gpmc_cs_config into common header to prevent warning: warning: implicit declaration of function 'enable_gpmc_cs_config' Signed-off-by: Nishanth Menon <nm@ti.com>
| | * Zoom2 Fix serial gpmc setupTom Rix2009-10-18-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The offset to the chip select is incorrect. The change 187af954cf7958c24efcf0fd62289bbdb4f1f24e, omap3: embedd gpmc_cs into gpmc config struct introduced a problem with the serial gpmc setup. This patch reverts the chip select to its previous value. The symptoms of this problem are that the Zoom2 currently hangs. This was run tested on Zoom2. Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
| | * TI DaVinci Sonata: Add Config option for 64 bit SupportSandeep Paulraj2009-10-18-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adding the CONFIG_SYS_64BIT_VSPRINTF fot the DM644x based Sonata Without this option enabled while performing NAND operations we will get wrong diagnostic messages. Example if the MTD NAND driver find a bad block while erasing from a certain address, it will say bad block skipped at 0x00000000. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| | * TI DaVinci DVEVM: Add Config option for 64 bit SupportSandeep Paulraj2009-10-18-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adding the CONFIG_SYS_64BIT_VSPRINTF in the DVEVM config. Without this option enabled while performing NAND operations we will get wrong diagnostic messages. Example if the MTD NAND driver find a bad block while erasing from a certain address, it will say bad block skipped at 0x00000000. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| | * TI DaVinci DM365: Add Config option for 64 bit SupportSandeep Paulraj2009-10-18-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adding the CONFIG_SYS_64BIT_VSPRINTF in the DM365 EVM config. Without this option enabled while performing NAND operations we will get wrong diagnostic messages. Example if the MTD NAND driver find a bad block while erasing from a certain address, it will say bad block skipped at 0x00000000. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| | * TI DaVinci DM355: Add Config option for 64 bit SupportSandeep Paulraj2009-10-18-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adding the CONFIG_SYS_64BIT_VSPRINTF in the DM355 EVM config. Without this option enabled while performing NAND operations we will get wrong diagnostic messages. Example if the MTD NAND driver find a bad block while erasing from a certain address, it will say bad block skipped at 0x00000000. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| | * TI: OMAP3: Remove SZ_xx referencesSandeep Paulraj2009-10-18-60/+53
| | | | | | | | | | | | | | | | | | | | | This patch removes dependency on the sizes.h header file and removes all references to SZ_xx. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| | * OMAP3: Update Overo and Beagle environmentSteve Sakoman2009-10-18-16/+38
| | | | | | | | | | | | | | | | | | | | | | | | Update default environment to support new kernel DSS2 subsystem and simplify rootfs type and location changes. Signed-off-by: Steve Sakoman <sakoman@gmail.com> Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
| | * TI DaVinci: Maintainer for DM355 and DM365 EVMSandeep Paulraj2009-10-18-0/+2
| | | | | | | | | | | | | | | | | | | | | Adding entries to the MAINTAINERS directory for the DM355 and DM365 EVM. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| | * TI: DaVinci: DM355 Leopard board supportSandeep Paulraj2009-10-18-0/+322
| | | | | | | | | | | | | | | | | | | | | This patch adds support for the leopard board which is based on the DM355 SOC. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| | * TI DaVinci DM646x: Adding initial support for DM6467 EVMSandeep Paulraj2009-10-18-0/+225
| | | | | | | | | | | | | | | | | | | | | This patch adds the initial support for DM6467 EVM. Other features like NET and NAND support will be added as follow up patches. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| | * TI DaVinci DM365: Fix Compilation warning for DM365 EVMSandeep Paulraj2009-10-18-2/+2
| | | | | | | | | | | | | | | | | | | | | This patch fixes a compilation warning while compiling the DM365 EVM. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| | * TI DaVinci DM355: Fix Compilation warning for DM355 EVMSandeep Paulraj2009-10-18-2/+2
| | | | | | | | | | | | | | | | | | | | | This patch fixes a compilation warning while compiling the DM355 EVM. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| | * AT91 CPUAT91 Fix compiler warningEric Benard2009-10-18-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change fixes the compiler warning main.c: In function 'abortboot': main.c:122: warning: too few arguments for format Signed-off-by: Eric Benard <eric@eukrea.com> Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
| | * AT91 CPU9260 CPU9G20 Fix compile warningsEric Benard2009-10-18-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change fixes the compiler warning nand_util.c:45:2: warning: #warning Please define CONFIG_SYS_64BIT_VSPRINTF for correct output! Signed-off-by: Eric Benard <eric@eukrea.com> Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
| | * AT91 CPU9260 Fix machine ID when using a CPU9G20.Eric Benard2009-10-18-1/+1
| | | | | | | | | | | | | | | Signed-off-by: Eric Benard <eric@eukrea.com> Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
| | * Clean-up of s3c24x0 nand driverkevin.morfitt@fearnside-systems.co.uk2009-10-13-37/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch re-formats the arm920t s3c24x0 nand driver in preparation for changes to add support for the Embest SBC2440-II Board. The changes are as follows: - re-indent the code using Lindent - make sure register layouts are defined using a C struct - replace the upper-case typedef'ed C struct names with lower case non-typedef'ed ones - make sure registers are accessed using the proper accessor functions - run checkpatch.pl and fix any error reports It assumes the following patch has been applied first: - [U-Boot][PATCH-ARM] CONFIG_SYS_HZ fix for ARM902T S3C24X0 Boards, 05/09/2009 - patches 1/4, 2/4 and 3/4 of this series Tested on an Embest SBC2440-II Board with local u-boot patches as I don't have any s3c2400 or s3c2410 boards but need this patch applying before I can submit patches for the SBC2440-II Board. Also, temporarily modified sbc2410x, smdk2400, smdk2410 and trab configs to use the mtd nand driver (which isn't used by any board at the moment), ran MAKEALL for all ARM9 targets and no new warnings or errors were found. Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
generated by cgit v1.1 at 2024-11-09 02:01:49 +0000