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* x86: ivybridge: Allow microcode to be collatedSimon Glass2016-08-30-1/+11
| | | | | | | | | | | Generally the microcode is combined into a single block only (and removed from the device tree) when there are multiple blocks. But this is not a requirement. Adjust the ivybridge code to avoid assuming this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Add debugging when a microcode update failsSimon Glass2016-08-30-1/+3
| | | | | | | | Add a debug() at this point to help figure out what is wrong. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher<hs@denx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* Merge branch 'master' of git://git.denx.de/u-boot-uniphierTom Rini2016-08-28-80/+123
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| * ARM: uniphier: enable CONFIG_CMD_CACHEMasahiro Yamada2016-08-28-0/+6
| | | | | | | | | | | | | | This will be useful, for example, to load firmware to DRAM and make it visible to other agents. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * ARM: uniphier: change UNIPHIER_SERIAL to default y optionMasahiro Yamada2016-08-28-6/+1
| | | | | | | | | | | | | | This is very likely to be necessary for normal use cases. Set its default to 'y' for shorter defconfig files. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * ARM: dts: uniphier: add u-boot, dm-pre-reloc to use eMMC boot on sLD3Masahiro Yamada2016-08-28-0/+9
| | | | | | | | | | | | | | The eMMC on sLD3 is assigned with dedicated pins (only multiplexed with GPIO), so it shouldn't hurt to enable eMMC on SPL all the time. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * ARM: uniphier: increase CONFIG_SYS_MALLOC_F_LEN for sLD3Masahiro Yamada2016-08-28-0/+1
| | | | | | | | | | | | | | | | | | | | Commit 76c52ce29fd7 ("ARM: uniphier: increase CONFIG_SYS_MALLOC_F_LEN to bind all nodes") missed to increase this config for sLD3. This change is needed to add "u-boot,dm-pre-reloc" to some nodes; more devices are bound, more malloc memory is needed. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * ARM: uniphier: display revision of Micro Support Card 3.6.x kindlyMasahiro Yamada2016-08-28-2/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The revision of the original support card (rev 3.5, rev 3.6) fits in the 8 bit width revision register. When it was extended in a weird way, it was versioned in the format of "3.6.x" (where it should have been "3.7", of course). What is worse, only the sub-level version "6.x" was recorded in the 8 bit width register, completely ignoring the compatibility of the revision register format. This patch saves madly-versioned support cards by assuming the major version "3" when the MSB 4 bit of the register is read as "6". With this, the support card revision that were displayed as "6.10" is now corrected to "3.6.10". Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * ARM: uniphier: support system reset functionality for PSCIMasahiro Yamada2016-08-28-2/+18
| | | | | | | | | | | | | | | | | | | | This supports the system reset via PSCI for ARMv7 SoCs. Because the system reset is not supported on PSCI 0.1, let's define CONFIG_ARMV7_PSCI_1_0. (it is supported since PSCI 0.2, but there is no CONFIG to enable it in U-Boot for now.) Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * mmc: uniphier-sd: just return if already set to desired clock rateMasahiro Yamada2016-08-28-2/+5
| | | | | | | | | | | | With this, we can save unnecessary udelay(). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * mmc: uniphier-sd: return error code if unsupported width is givenMasahiro Yamada2016-08-28-5/+9
| | | | | | | | | | | | | | | | With the CONFIG_DM_MMC_OPS migration, the .set_ios callback can return an integer now. Return an appropriate error value rather than sudden death by BUG(). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * mmc: uniphier-sd: move uniphier_sd_init() belowMasahiro Yamada2016-08-28-21/+19
| | | | | | | | | | | | | | | | No more reason to define this function above the ops structure. Move it near the caller. Also, change its return type to void because it never fails. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * mmc: uniphier-sd: migrate to CONFIG_DM_MMC_OPSMasahiro Yamada2016-08-28-47/+51
| | | | | | | | | | | | | | | | | | Catch up with the DM migration. As struct dm_mmc_ops does not have .init callback, call the init function directly from the probe function. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * mmc: uniphier-sd: add static qualifiers to probe and remove callbacksMasahiro Yamada2016-08-28-2/+2
| | | | | | | | | | | | They are both only referenced in this file. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | Merge git://git.denx.de/u-boot-rockchipTom Rini2016-08-27-0/+6
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| * | rockchip: rk3399: update MAINTAINER fileKever Yang2016-08-27-0/+6
| |/ | | | | | | | | | | | | | | This patch add maintainer information for rk3399 evb. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andreas Färber <afaerber@suse.de>
* | Merge branch 'master' of http://git.denx.de/u-boot-sunxiTom Rini2016-08-26-2193/+3846
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| * | sunxi: Tune H3 DRAM PLL to improve lock timeJens Kuske2016-08-26-1/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The H3 PLL5 used for DRAM barely manages to lock to the required frequency before DRAM controller starts, sometimes leading to wrong delay-line calibration results. This patch changes the PLL tuning parameters to the same values as boot0 used, which speeds up the locking and fixes the problem. Signed-off-by: Jens Kuske <jenskuske@gmail.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * | sunxi: display: Use PWM to drive backlight where applicableHans de Goede2016-08-26-0/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the backlight's pwm input is connected to a pwm output of the SoC, actually use pwm to drive the backlight. The mean reason for doing this is to fix the backlight turning off for aprox. 1 second while the kernel is booting. This is caused by the kernel actually using pwm to drive the backlight, so that it can dim the backlight. First the pwm driver loads and switches the pinmux for the pin driving the backlight's pwm input to the pwm controller. Then about 1s later the actual backlight driver loads and tells the pwm driver to actually update the pwm settings, which have a power-on-reset value of "off". An additional advantage is that this allows us to initatiate the backlight at 80%, which is the kernel default, avoiding a brightness change while the kernel loads. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed by: Peter Korsgaard <peter@korsgaard.com>
| * | sun5i: Add defconfig and dts file for the Empire Electronix M712 tabletHans de Goede2016-08-26-0/+75
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a defconfig and dts file for the Empire Electronix M712 tablet, this is a 7" A13 tablet, with micro-usb (otg), headphone and micro-sd slots on the outside. It uses a Goodix gt811 touchscreen controller, a RTL8188CTV wifi chip and a DMART06 (1238a4) accelerometer. The dts file is identical to the one submitted to the upstream kernel. Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * | sunxi: Sync dts files with upstream kernelHans de Goede2016-08-26-2192/+3384
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sync dts files with the current (Aug 18th 2016) state of Maxime's linux/sunxi/for-next repo. Note this commit also updates configs/MSI_Primo81_defconfig, adding: "# CONFIG_REQUIRE_SERIAL_CONSOLE is not set", this is necessary because the tablet does not have a reachable uart so the dts sync drops its serial0 alias. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * | sun6i: Add defconfig and dts file for tablets using the inet-q972 PCBHans de Goede2016-08-26-0/+318
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a defconfig and dts file for tablets using the generic inet-q972 PCB. Tablets with this PCB feature a mini-hdmi output, micro-usb usb-host, micro-usb usb-otg, 3.5mm headphone jack, a micro sd slot, (mini) power-barrel and an usb wifi module. This has been tested on a 9.7" 1024x768 qware qw tb9718-qhd tablet. The dts files are identical to the ones submitted to the upstream kernel. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | nand: Fix set_dev checks for no deviceTony Lindgren2016-08-26-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | If we do nand device 0 command in u-boot on a device that has NAND support enabled but no NAND chip, we can get data abort at least on omaps. Fix the issue by replacing the check with nand_info[dev] as suggested by Scott Wood. The check for name existed before because before the array-to-pointer conversion there was no way to directly test nand_info[dev] for emptiness. Signed-off-by: Tony Lindgren <tony@atomide.com>
* | treewide: fix "followings" to "following"Masahiro Yamada2016-08-26-6/+6
| | | | | | | | | | | | Most of them are my mistakes. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | tools: moveconfig: add Xtensa GCC prefix to CROSS_COMPILE listMasahiro Yamada2016-08-26-1/+2
| | | | | | | | | | | | | | | | | | | | This is needed to move CONFIG options for the recently-added xtfpga_defconfig. The tarball of the pre-built toolchain can be downloaded from: https://www.kernel.org/pub/tools/crosstool/files/bin/x86_64/4.9.0/ Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | arm: cache: always flush cache line size for page tableStefan Agner2016-08-26-1/+13
| | | | | | | | | | | | | | | | | | | | | | | | The page table is maintained by the CPU, hence it is safe to always align cache flush to a whole cache line size. This allows to use mmu_page_table_flush for a single page table, e.g. when configure only small regions through mmu_set_region_dcache_behaviour. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Tested-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de>
* | arm: cache: add support for LPAE for region D$ behaviorStefan Agner2016-08-26-0/+4
| | | | | | | | | | | | | | Add LPAE support for mmu_set_region_dcache_behaviour. The function is in use in some LPAE capable board such TI DRA7xx or NXP i.MX 7. Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
* | arch/arm/Kconfig: Whitespace correctionTom Rini2016-08-26-28/+28
| | | | | | | | | | | | Use a tab not 8 spaces. Signed-off-by: Tom Rini <trini@konsulko.com>
* | ARM: Move SYS_CACHELINE_SIZE over to KconfigTom Rini2016-08-26-182/+32
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This series moves the CONFIG_SYS_CACHELINE_SIZE. First, in nearly all cases we are mirroring the values used by the Linux Kernel here. Also, so long as (and in this case, it is true) we implement flushes in hunks that are no larger than the smallest implementation (and given that we mirror the Linux Kernel, again we are fine) it is OK to align higher. The biggest changes here are that we always use 64 bytes for CPU_V7 even if for example the underlying core is only 32 bytes (this mirrors Linux). Second, we say ARM64 uses 64 bytes not 128 (as found in the Linux Kernel) as we do not need multi-platform support (to this degree) and only the Cavium ThunderX 88xx series has a use for such large alignment. Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Prafulla Wadaskar <prafulla@marvell.com> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Stefan Roese <sr@denx.de> Cc: Nagendra T S <nagendra@mistralsolutions.com> Cc: Vaibhav Hiremath <hvaibhav@ti.com> Acked-by: Lokesh Vutla <lokeshvutla@ti.com> Cc: Steve Rae <steve.rae@raedomain.com> Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Nikita Kiryanov <nikita@compulab.co.il> Cc: Stefan Agner <stefan.agner@toradex.com> Acked-by: Heiko Schocher <hs@denx.de> Cc: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Cc: Peter Griffin <peter.griffin@linaro.org> Acked-by: Paul Kocialkowski <contact@paulk.fr> Cc: Anatolij Gustschin <agust@denx.de> Acked-by: "Pali Rohár" <pali.rohar@gmail.com> Cc: Adam Ford <aford173@gmail.com> Cc: Steve Sakoman <sakoman@gmail.com> Cc: Grazvydas Ignotas <notasas@gmail.com> Cc: Nishanth Menon <nm@ti.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Robert Baldyga <r.baldyga@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Thomas Weber <weber@corscience.de> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: David Feng <fenghua@phytium.com.cn> Cc: Alison Wang <b18965@freescale.com> Cc: Michal Simek <michal.simek@xilinx.com> Cc: Simon Glass <sjg@chromium.org> Cc: York Sun <york.sun@nxp.com> Cc: Shengzhou Liu <Shengzhou.Liu@nxp.com> Cc: Mingkai Hu <mingkai.hu@nxp.com> Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Cc: Aneesh Bansal <aneesh.bansal@freescale.com> Cc: Saksham Jain <saksham.jain@nxp.com> Cc: Qianyu Gong <qianyu.gong@nxp.com> Cc: Wang Dongsheng <dongsheng.wang@nxp.com> Cc: Alex Porosanu <alexandru.porosanu@freescale.com> Cc: Hongbo Zhang <hongbo.zhang@nxp.com> Cc: tang yuantian <Yuantian.Tang@freescale.com> Cc: Rajesh Bhagat <rajesh.bhagat@nxp.com> Cc: Josh Wu <josh.wu@atmel.com> Cc: Bo Shen <voice.shen@atmel.com> Cc: Viresh Kumar <viresh.kumar@linaro.org> Cc: Hannes Schmelzer <oe5hpm@oevsv.at> Cc: Thomas Chou <thomas@wytron.com.tw> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Sam Protsenko <semen.protsenko@linaro.org> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Christophe Ricard <christophe-h.ricard@st.com> Cc: Anand Moon <linux.amoon@gmail.com> Cc: Beniamino Galvani <b.galvani@gmail.com> Cc: Carlo Caione <carlo@endlessm.com> Cc: huang lin <hl@rock-chips.com> Cc: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Cc: Xu Ziyuan <xzy.xu@rock-chips.com> Cc: "jk.kernel@gmail.com" <jk.kernel@gmail.com> Cc: "Ariel D'Alessandro" <ariel@vanguardiasur.com.ar> Cc: Kever Yang <kever.yang@rock-chips.com> Cc: Samuel Egli <samuel.egli@siemens.com> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Hans de Goede <hdegoede@redhat.com> Cc: Ian Campbell <ijc@hellion.org.uk> Cc: Siarhei Siamashka <siarhei.siamashka@gmail.com> Cc: Boris Brezillon <boris.brezillon@free-electrons.com> Cc: Andre Przywara <andre.przywara@arm.com> Cc: Bernhard Nortmann <bernhard.nortmann@web.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Ben Whitten <ben.whitten@gmail.com> Cc: Tom Warren <twarren@nvidia.com> Cc: Alexander Graf <agraf@suse.de> Cc: Sekhar Nori <nsekhar@ti.com> Cc: Vitaly Andrianov <vitalya@ti.com> Cc: "Andrew F. Davis" <afd@ti.com> Cc: Murali Karicheri <m-karicheri2@ti.com> Cc: Carlos Hernandez <ceh@ti.com> Cc: Ladislav Michl <ladis@linux-mips.org> Cc: Ash Charles <ashcharles@gmail.com> Cc: Mugunthan V N <mugunthanvnm@ti.com> Cc: Daniel Allred <d-allred@ti.com> Cc: Gong Qianyu <Qianyu.Gong@freescale.com> Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Chin Liang See <clsee@altera.com> Tested-by: Stephen Warren <swarren@nvidia.com> Acked-by: Paul Kocialkowski <contact@paulk.fr>
* Merge branch 'master' of git://git.denx.de/u-boot-i2cTom Rini2016-08-26-2/+2
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| * i2c: mvtwsi: Fix order of address bytes (high to low)Stefan Roese2016-08-26-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | Patch f8a10ed1 [i2c: mvtwsi: Make address length variable] accidentally inverted the sequence of address bytes sent to the I2C device. This patch corrects this by sending the highest byte first and the lowest byte last again. Tested on theadorable Armada-XP board. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Mario Six <mario.six@gdsys.cc> Cc: Heiko Schocher <hs@denx.de>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-marvellTom Rini2016-08-26-43/+39
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| * | tools: kwboot: patch destaddr only for SoCs with header version 1Simon Baatz2016-08-26-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit f4db6c976cf ("arm: mvebu: Add runtime detection of UART (xmodem) boot-mode") added a change to hdr->destaddr when dynamically patching an image for UART boot mode. With this change, kwboot ceases to work on Kirkwood. Thus, let's change hdr->destaddr only when we are patching an image with header version 1 (Orion and Kirkwood use header version 0). Signed-off-by: Simon Baatz <gmbnomis@gmail.com> Fixes: f4db6c976cf ("arm: mvebu: Add runtime detection of UART (xmodem) boot-mode") Cc: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Kevin Smith <kevin.smith@elecsyscorp.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | arm: mvebu: a38x: typo fix cpabilities -> capbilitiesChris Packham2016-08-26-1/+1
| | | | | | | | | | | | | | | Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | arm: mvebu: a38x: update serdes error handlingChris Packham2016-08-26-19/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | Ensure appropriate error messages are generated. Previously all errors indicated that the serdes was already in use. Now appropriate error messages are given. Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | spl: Remove unused CONFIG_SPL_SPI_* definitionsChris Packham2016-08-26-14/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | As of commit 88e34e5 ("spl: replace CONFIG_SPL_SPI_* with CONFIG_SF_DEFAULT_*") these defines are not used. Remove them to avoid confusion. Signed-off-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | arm: mvebu: Add support for NAND interface on A-38xChris Packham2016-08-26-1/+10
| |/ | | | | | | | | | | | | | | | | | | | | The NAND interface on the Armada-38x series is similar to that on the Armada-XP. The key difference is that the NAND ECC clock ratio is provided via the DFX Server registers instead of the Core Clock. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Dirk Eibach <eibach@gdsys.de> Signed-off-by: Stefan Roese <sr@denx.de>
* | spi: tegra: fix hang in set_mode()Stephen Warren2016-08-25-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In tegra20_slink.c, the set_mode() function may be executed before the SPI bus is claimed the first time, and hence the clocks to the SPI controller may not be running. If so, any register read/write at this time will hang the CPU. Fix this by ensuring the clock is running as soon as the driver is probed. This is observed on the Tegra30 Beaver board. Apply the same clock initialization fix to all other Tegra SPI drivers so that if set_mode() is ever implemented there, the same bug will not appear. Note that tegra114_spi.c already operates in this fashion. The clock manipulation code is copied from claim_bus() to probe() rather than moved. This ensures that any calls to set_speed() take effect; the clock can't be set once during probe and left unchanged. Fixes: 5cb1b7b395c0 ("spi: tegra20: Add support for mode selection") Cc: Mirza Krak <mirza.krak@hostmobility.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | ARM: tegra: remove stale nvidia, bpmp I2C DT propertyStephen Warren2016-08-25-11/+0
| | | | | | | | | | | | | | | | | | | | The nvidia,bpmp property is left over from an old BPMP I2C binding, and shouldn't be present. Remove it from the SoC DT file, and update the I2C driver not to parse it; the value wasn't used for anything any more anyway. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | ARM: tegra: fix Tegra186 SDHCI clock/reset namesStephen Warren2016-08-25-7/+5
| | | | | | | | | | | | | | | | | | The Tegra SDHCI binding dictates that the reseet name for the Tegra SDHCI clock be "sdhci" not "sdmmc", and that the clock is accessed by index rather than by name. Fix the Tegra186 DT and MMC driver to honor this. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | ARM: tegra: fix Tegra186 I2C clock nameStephen Warren2016-08-25-9/+9
|/ | | | | | | | The Tegra I2C binding dictates that the clock name for the Tegra I2C clock be "div-clk" not "i2c". Fix the Tegra186 DT and I2C driver to honor this. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* Merge branch 'master' of git://git.denx.de/u-boot-netTom Rini2016-08-23-174/+293
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| * net: mii: check phy advertising register when geting link statusDongpo Li2016-08-22-4/+14
| | | | | | | | | | | | | | | | | | | | | | | | When phy autoneg on, the link speed and duplex should be determined by phy advertising register and phy link partner ability register. Check phy advertising register when geting phy link speed and duplex if autoneg on. Signed-off-by: Dongpo Li <lidongpo@hisilicon.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * net: davinci_emac: Restore the internal MDIO accessors return valueskarl beldan2016-08-22-7/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The spatch series converting legacy drivers from miiphy_register to mdio_register changed the return convention of the davinci_emac internal MDIO accessors, making the internal code relying on it misbehaving: no mdiodev get registered and U-Boot crashes when using net cmds in the context of the old legacy net API. ATM davinci_emac_initialize and cpu_eth_init don't return a proper value in that case but fixing them would not avoid the crash. This change is just a follow-up to the spatch pass, the MDIO accessors of the mdiodev introduced by the spatch pass retain their proper values. Signed-off-by: Karl Beldan <karl.beldan+oss@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * net/fm: Remove unused code of FMan QMIHou Zhiqiang2016-08-22-3/+0
| | | | | | | | | | | | | | | | The QMan is not used in FMan IM mode, so no QMI enqueue or QMI dequeue are performed. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * net: davinci_emac: Invalidate only the received portion of a bufferkarl beldan2016-08-22-5/+5
| | | | | | | | | | | | | | | | | | | | ATM when receiving a packet the whole buffer is invalidated, this change optimizes this behaviour. Signed-off-by: Karl Beldan <karl.beldan+oss@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
| * net: davinci_emac: Round up top tx buffer boundaries for dcache opskarl beldan2016-08-22-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | check_cache_range() warns that the top boundaries are not properly aligned when flushing or invalidating the buffers and make these operations fail. This gets rid of the remaining warnings: CACHE: Misaligned operation at range Signed-off-by: Karl Beldan <karl.beldan+oss@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
| * net: davinci_emac: Remove useless dcache ops on descriptorskarl beldan2016-08-22-28/+0
| | | | | | | | | | | | | | | | | | | | | | | | ATM the rx and tx descriptors are handled as cached memory while they lie in a dedicated RAM of the SoCs, which is an uncached area. Removing the said dcache ops, while optimizing the logic and clarifying the code, also gets rid of most of the check_cache_range() incurred warnings: CACHE: Misaligned operation at range Signed-off-by: Karl Beldan <karl.beldan+oss@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * net: nfs: Simplify rpc_add_credentials()Joe Hershberger2016-08-22-16/+3
| | | | | | | | | | | | | | We use an empty hostname, so remove all the "processing" of the known-to-be-empty hostname and just write 0's where needed. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
| * net: nfs: Use the tx buffer to construct rpc msgsJoe Hershberger2016-08-22-43/+45
| | | | | | | | | | | | | | | | | | Instead of always allocating a huge temporary buffer on the stack and then memcpy()ing the result into the transmit buffer, simply figure out where in the transmit buffer the bytes will belong and write them there directly as each message is built. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
generated by cgit v1.1 at 2024-11-10 02:54:00 +0000