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* | | gpio: Add driver for TI PCF8575 I2C GPIO expanderVignesh R2016-08-08-0/+259
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | TI's PCF8575 is a 16-bit I2C GPIO expander.The device features a 16-bit quasi-bidirectional I/O ports. Each quasi-bidirectional I/O can be used as an input or output without the use of a data-direction control signal. The I/Os should be high before being used as inputs. Read the device documentation for more details[1]. This driver is based on pcf857x driver available in Linux v4.7 kernel. It supports basic reading and writing of gpio pins. [1] http://www.ti.com/lit/ds/symlink/pcf8575.pdf Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
* | | spl_nor.c: Support devicetree sizes different from 16kMike Looijmans2016-08-08-2/+4
|/ / | | | | | | | | | | | | | | | | The devicetrees for various platforms already exceed 16k. Add a define CONFIG_SYS_FDT_SIZE to specify the FDT size, and set to 16k for the two boards that define this CONFIG_SYS_FDT_BASE parameter. This allows platforms with larger devicetree blobs to boot from NOR. Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
* | spi: cadence_qspi_apb: Ensure baudrate doesn't exceed max valueChin Liang See2016-08-07-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Ensuring the baudrate divisor value doesn't exceed the max value in the calculation.It will be capped at max value to ensure the correct value being written into the register. Example of the existing bug is when calculated div = 16. After and with the mask, the value written to register is actually 0 (register field for baudrate divisor). With this fix, the value written is now 15 which is max value for baudrate divisor. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Jagan Teki <jteki@openedev.com> Cc: Dinh Nguyen <dinguyen@altera.com>
* | ARM: socfpga: use the default CONFIG_BOOTDELAY=2Masahiro Yamada2016-08-07-8/+0
|/ | | | | | | | This option controls how long it should be paused before entering the auto-boot mode. The default value from Kconfig should be fine except socfpga_vining_fpga_defconfig. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* Merge git://git.denx.de/u-boot-rockchipTom Rini2016-08-06-29/+1901
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| * rockchip: remove log2 reimplementation from clock driversHeiko Stübner2016-08-05-14/+6
| | | | | | | | | | | | | | | | | | The already available ilog2 function does exactly the same in the common case than the log2 function the current clock-driver reimplement. So, simply move to that one. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Simon Glass <sjg@chromium.org>
| * config: rk3399: enable dwmmc controllerKever Yang2016-08-05-0/+2
| | | | | | | | | | | | | | Enable the rockchip dwmmc driver for rk3399 and its evb. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
| * dts: rk3399: enable dwmmc for sdcardKever Yang2016-08-05-2/+6
| | | | | | | | | | | | | | | | | | rk3399 sdcard is using dwmmc controller, enable it for sdcard. SCLK_SDMMC is the clock for controller operation clock, move it to the first place. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
| * clock: rk3399: add support for dwmmc 400KKever Yang2016-08-05-8/+21
| | | | | | | | | | | | | | | | | | MMC core will use 400KHz for card initialize first and then switch to higher frequency like 50MHz, we need to support both 400KHz and about 50MHz for dwmmc controller. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
| * configs: rk3399: add gpt and fs supportKever Yang2016-08-05-0/+14
| | | | | | | | | | | | | | | | | | To compatible with distro boot, we need to add gpt and fs support, including gpt table and vfat, ext2, ext4 support. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
| * rockchip: add usb mass storage feature support for rk3288Xu Ziyuan2016-08-05-0/+4
| | | | | | | | | | | | | | | | Enable ums feature for rk3288 boards, so that we can mount the mmc device to PC. Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
| * rockchip: add basic partitions support for rk3288Xu Ziyuan2016-08-05-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For compatibility with distro boot, fastboot, and mount the mmc deivce to PC via usb mass storage feature, GPT partitions are essential. You should write the partitions to mmc device prior to use above feature. => gpt write mmc 1 $partitions GPT successfully written to block device! success! Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
| * rockchip: add support for rk3288 miniarm boardXu Ziyuan2016-08-05-6/+746
| | | | | | | | | | | | | | | | Miniarm is a rockchip rk3288 based development board, which has lots of interface such as HDMI, USB, micro-SD card, Audio etc. Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
| * move: rockchip: move clock drivers into a subdirectoryHeiko Stübner2016-08-05-3/+10
| | | | | | | | | | | | | | | | | | | | | | | | With the number of Rockchip clock drivers increasing, don't clutter up the core drivers/clk directory with them and instead move them out of the way into a separate subdirectory. Suggested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Simon Glass <sjg@chromium.org> Updated for rk3399: Signed-off-by: Simon Glass <sjg@chromium.org>
| * rk3399: add basic soc driverKever Yang2016-08-05-0/+980
| | | | | | | | | | | | | | | | | | | | This patch add driver for: - clock driver including set_rate for cpu, mmc, vop, I2C. - sysreset driver - grf syscon driver Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
| * rockchip: rockchip, sdram-channel 0xff fix remaining dtsSandy Patterson2016-08-05-2/+2
| | | | | | | | | | | | | | Add an extra byte so that this data is not byteswapped. Signed-off-by: Sandy Patterson <apatterson@sightlogix.com> Acked-by: Simon Glass <sjg@chromium.org>
| * rockchip: add fastboot support for rk3036 boardXu Ziyuan2016-08-05-3/+112
| | | | | | | | | | | | | | | | Enable fastboot feature on rk3036, please refer to doc/README.rockchip for more detailed usage. Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | zynq_sdhci.c: Fix warning in arasan_sdhci_probeTom Rini2016-08-05-2/+0
| | | | | | | | | | | | | | | | | | We no longer need to set 'caps' as it's not passed to sdhci_setup_cfg anymore. Fixes: 14bed52d276a ("mmc: sdhci: remove the unnecessary arguments for sdhci_setup_cfg") Signed-off-by: Tom Rini <trini@konsulko.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-tegraTom Rini2016-08-05-32/+1698
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| * | ARM: tegra: call tegra_board_init on Tegra186Stephen Warren2016-08-04-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce tegra_board_init() and call it from board_init(). Tegra wil use tegra_board_init() for board-specific initialization, and board_init() for SoC-specific initialization. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | ARM: tegra: add I2C controllers to Tegra186 DTBryan Wu2016-08-04-0/+104
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tegra186 has 8 I2C controllers including BPMP I2C. This patch adds the other 7 generic controllers to Tegra186's DT. Signed-off-by: Bryan Wu <pengw@nvidia.com> (swarren, fixed DT node sort order, tweak patch description) Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | ARM: tegra: add PCIe controller to Tegra186 SoC DTStephen Warren2016-08-04-0/+92
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Tegra186 PCIe DT content is almost identical to previous chips, except that the: - There are 3 ports instead of 2. - Some physical addresses have moved. - PHY programming is handled by firmware, so CCPLEX DTs don't need to reference any PHY. - The power domain is explicitly represented in DT. This change is mandatory for Tegra186 since standard power domain APIs are used, and should be made to the DT for older SoCs, although we get away without doing so since U-Boot currently uses custom APIs that hard-code power domain IDs. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | ARM: tegra: add BPMP I2C to Tegra186 device treeStephen Warren2016-08-04-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | This allows the BPMP I2C device to be instantiated, which makes it available to other drivers and the user. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | ARM: tegra: add BPMP and dependencies to Tegra186 DTStephen Warren2016-08-04-2/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | This adds the DT content that's needed to allow board DTs to enable use of BPMP, clocks, resets, GPIOs, eMMC, and SD cards. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | dt-bindings: add Tegra186 BPMP I2C bindingStephen Warren2016-08-04-0/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In Tegra186, the BPMP (Boot and Power Management Processor) owns certain HW devices, such as the I2C controller for the power management I2C bus. Software running on other CPUs must perform IPC to the BPMP in order to execute transactions on that I2C bus. This binding describes an I2C bus that is accessed in such a fashion. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | dt-bindings: allow child nodes inside the Tegra BPMPStephen Warren2016-08-04-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The BPMP implements some services which must be represented by separate nodes. For example, it can provide access to certain I2C controllers, and the I2C bindings represent each I2C controller as a device tree node. Update the binding to describe how the BPMP supports this. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | ARM: tegra: add BPMP DT bindingsStephen Warren2016-08-04-0/+1256
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Tegra BPMP (Boot and Power Management Processor) is a separate auxiliary CPU embedded into Tegra to perform power management work, and controls related features such as clocks, resets, power domains, PMIC I2C bus, etc. These bindings dictate how to represent the BPMP in device tree. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | ARM: tegra: adapt to latest HSP DT bindingStephen Warren2016-08-04-29/+113
| |/ | | | | | | | | | | | | | | | | | | The DT binding for the Tegra186 HSP module apparently wasn't quite final when I posted initial U-Boot support for it. Add the final DT binding doc and adapt all code and DT files to match it. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-mmcTom Rini2016-08-05-150/+135
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| * | mmc: sdhci: fix the compiler warning when disable CONFIG_MMC_SDMAJaehoon Chung2016-08-05-1/+1
| | | | | | | | | | | | | | | | | | | | | When disabled CONFIG_MMC_SDMA, variable caps didn't use. This patch fixes the compiler error for -Wunused-but-set-variable Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
| * | mmc: dw_mmc: fix the wrong Mask bit boundary for fifo_count bitJaehoon Chung2016-08-05-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | According to DesignWare TRM, FIFO_COUNT is bit[29:17]. If get the correct fifo_count value, it has to use the FIFO_MASK as 0x1FFF, not 0x1FF. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Ziyuan Xu <xzy.xu@rock-chips.com>
| * | mmc: dw_mmc: fix data starvation by host timeout under FIFO modeXu Ziyuan2016-08-05-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes data starvation by host timeout(HTO) error interrupt which occurred under FIFO mode transfer on rk3036 board. The former implement, the actual bytes were transmitted may be less than should be. The size will still subtract value of len in case of there is no receive/transmit FIFO data request interrupt. Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
| * | mmc: dw_mmc: transfer proper bytes to FIFOXu Ziyuan2016-08-05-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The former implement, dw_mmc will push and pop the redundant data to FIFO, we should transfer it according to the real size. Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
| * | mmc: sdhci: remove the unnecessary arguments for sdhci_setup_cfgJaehoon Chung2016-08-05-34/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some arguments don't need to pass to sdhci_setup_cfg. Generic variable can be used in sdhci_setup_cfg, and some arguments are already included in sdhci_host struct. It's enough that just pass the board specific things to sdhci_setup_cfg(). After removing the unnecessary arguments, it's more simpler than before. It doesn't consider "Version" and "Capabilities" anymore in each SoC driver. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | mmc: sdhci: remove the unused argument for sdhci_setup_cfgJaehoon Chung2016-08-05-7/+6
| | | | | | | | | | | | | | | | | | | | | | | | buswidth isn't used anywhere in sdhci_setup_cfg. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Minkyu Kang <mk7.kang@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | mmc: sdhci: revert "mmc: sdhci: Claer high speed if not supported"Jaehoon Chung2016-08-05-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This "commit 429790026021d522d51617217d4b86218cca5750" is wrong. SDHCI_QUIRK_NO_HISPD_BIT is for skipping to set CTRL_HISPD bit. For example, Exynos didn't have CTRL_HISPD. But Highspeed mode is supported. (This quirks doesn't mean that driver didn't support the Highseepd mode.) Note: If driver didn't support the Highspeed Mode, use or add the other quirks. After applied this patch, all Exynos SoCs are just running with 25MHz. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
| * | mmc: display mmc list information like mmc_legacy typeXu Ziyuan2016-08-05-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It's nicer to see this: => mmc list dwmmc@ff0c0000: 0 dwmmc@ff0f0000: 1 (eMMC) than this: => mmc list dwmmc@ff0c0000: 0dwmmc@ff0f0000: 1 (eMMC) With the former, it's much clearer which mmc devices are on. Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
| * | mmc: use the generic error numberJaehoon Chung2016-08-05-96/+95
| | | | | | | | | | | | | | | | | | | | | | | | | | | Use the generic error number instead of specific error number. If use the generic error number, it can debug more easier. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
| * | mmc: fsl_esdhc: remove the duplicated header fileJaehoon Chung2016-08-05-1/+0
| | | | | | | | | | | | | | | | | | | | | "mmc.h" is already included. It's duplicated. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | mmc: dw_mmc: remove the duplicated header fileJaehoon Chung2016-08-05-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | <asm-generic/errno.h> is already included in <errno.h>. It can use <errno.h> instead of <asm-generic/errno.h> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | mmc: s5p_sdhci: unset the SDHCI_QUIRK_BROKEN_R1BJaehoon Chung2016-08-05-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Unset the SDHCI_QUIRK_BROKEN_R1B for exynos SoC. (Tested on Exynos4 Boards.) Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com>
| * | mmc: sdhci: set to INT_DATA_END when there are dataJaehoon Chung2016-08-05-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no data, it doesn't needs to wait for completing data transfer. (It seems that it can be removed.) Almost all timeout error is occured from stop command without data. After applied this patch, I hope that we don't need to increase timeout value anymore. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> Acked-by: Minkyu Kang <mk7.kang@samsung.com>
| * | mmc: sdhci: clean up timeout detectionMasahiro Yamada2016-08-05-9/+9
| |/ | | | | | | | | | | | | | | | | | | | | | | | | The current timeout detection logic is not very nice; it calls get_timer(start) in the while() loop, and then calls it again after the loop to check if a timeout error happened. Because of the time difference between the two calls of get_timer(), the timeout detected after the loop may not be true. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
* | configs: Fix mmc rescan misusesKarl Beldan2016-08-05-1/+1
| | | | | | | | | | | | | | | | This follows 9fd383724cf4 ("mmc: don't allow extra cmdline arguments"), and affects omapl138_lcdk and omap3_evm_quick_mmc. Signed-off-by: Karl Beldan <kbeldan@baylibre.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | mkimage: Fix argument parsing with signature commentKarl Beldan2016-08-05-1/+1
| | | | | | | | | | | | | | | | Inform getopt that '-c' requires a parameter. Fixes: a02221f29deb ("mkimage: Convert to use getopt()") Signed-off-by: Karl Beldan <kbeldan@baylibre.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | test: Adjust run_command_list() to return a list of stringsSimon Glass2016-08-05-4/+5
| | | | | | | | | | | | | | | | Return one string for each command that was executed. This seems cleaner. Suggested-by: Teddy Reed <teddy.reed@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Stephen Warren <swarren@nvidia.com>
* | test: Add a function to restart U-BootSimon Glass2016-08-05-2/+8
| | | | | | | | | | | | | | | | | | | | | | Add a proper function for this rather than using internal functions. Use it in the single call site. Also, do a restart at the end of the vboot test to reset to the normal device tree. Signed-off-by: Simon Glass <sjg@chromium.org> Suggested-by: Stephen Warren <swarren@nvidia.com>
* | test: vboot: Put each test variant in its own sectionSimon Glass2016-08-05-5/+5
| | | | | | | | | | | | | | | | | | Use 'cons.log.section' feature to split up the test output. This makes it easier to read. Suggested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org>
* | test: Rename sha to sha_algo and pass it aroundSimon Glass2016-08-05-25/+28
| | | | | | | | | | | | | | | | | | | | Rename this argument and pass it to each function that needs it, instead of making it global. Suggested-by: Stephen Warren <swarren@nvidia.com> Suggested-by: Teddy Reed <teddy.reed@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org>
* | test: Drop the cmd() functionSimon Glass2016-08-05-24/+17
| | | | | | | | | | | | | | | | | | Instead of this, use the existing run_and_log() function, enhanced to support a command string as well as a list of arguments. Suggested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org>
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