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* armv8: ls2080a: Add serdes1 protocol 0x3b supportPriyanka Jain2016-12-05-0/+1
| | | | | Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* fsl/ddr: Add erratum_a009942_check_cpo and clean related erratumShengzhou Liu2016-12-05-38/+155
| | | | | | | | | | | | | - add additional function erratum_a009942_check_cpo to check if the board needs tuning CPO calibration for optimal setting. - move ERRATUM_A009942(with revision to check cpo_sample option) from fsl_ddr_gen4.c to ctrl_regs.c for reuse on all DDR4/DDR3 parts. - move ERRATUM_A008378 from fsl_ddr_gen4.c to ctrl_regs.c - remove obsolete ERRATUM_A004934 which is replaced with ERRATUM_A009942. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> [YS: Replaced CONFIG_QEMU_E500 with CONFIG_ARCH_QEMU_E500] Reviewed-by: York Sun <york.sun@nxp.com>
* fsl/ddr: Fix compiling warningShengzhou Liu2016-12-05-32/+25
| | | | | | | | | Fix following warning in case multiple erratum macro was not defined. warning: unused variable 'tmp' warning: unused variable 'ddr_freq' Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* sata: sata_mv: Fix misaligned cache warningsStefan Roese2016-12-05-3/+9
| | | | | | | | This patch fixes the warnings about misaligned cache on Armada XP: CACHE: Misaligned operation at range [7facb400, 7facb460] Signed-off-by: Stefan Roese <sr@denx.de>
* arm64: mvebu: Restrict memory size to a usable maximumStefan Roese2016-12-05-0/+17
| | | | | | | | | | | | | | | | | Not all memory is mapped in the MMU. So we need to restrict the memory size so that U-Boot does not try to access it. Also, the internal registers are located at 0xf000.0000 - 0xffff.ffff. Currently only 2GiB are mapped for system memory. This is what we pass to the U-Boot subsystem here. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
* arm64: mvebu: Add PCI support to DB-88F8040 boardStefan Roese2016-12-05-0/+11
| | | | | | | | | | | | | | | | This patch adds PCI support to the Marvell Armada-8K devel board. Additionally the Intel E1000 ethernet driver is enabled so that network support is available on this board, even without the internal network interfaces being supported (yet). Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
* arm64: mvebu: Add regions for PCI spaces to the memory mapStefan Roese2016-12-05-0/+8
| | | | | | | | | | | | | | To use the PCIe driver, its controller memory and the PCIe regions need to get mapped in the MMU. Otherwise these areas can't be accessed. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
* pci: mvebu: Add PCIe driver for Armada-8KShadi Ammouri2016-12-05-0/+546
| | | | | | | | | | | | | | | | | | | | | | | This patch adds a driver for the PCIe controller integrated in the Marvell Armada-8K SoC. This controller is based on the DesignWare IP core. The original version was written by Shadi and Yehuda. I ported this driver to the latest mainline U-Boot version with DM support. Tested on the Marvell DB-88F8040 Armada-8K eval board. Signed-off-by: Shadi Ammouri <shadi@marvell.com> Signed-off-by: Yehuda Yitschak <yehuday@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
* drivers/phy: marvell: Add support for the slave CP COMPHY deviceStefan Roese2016-12-05-3/+14
| | | | | | | | | | | | | | | With the support for the Armada 8k, a 2nd COMPHY controller now needs to get supported from the CP110 slave controller. This patch adds support for this 2nd contoller in the COMPHY driver. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
* arm64: mvebu: Init COMPHY from the slave-CP on the A8kStefan Roese2016-12-05-6/+14
| | | | | | | | | | | | | | | | The Armada8k implements 2 CPs (communication processors) and the 2nd CP also is equipped with a COMPHY controller. This patch now loops over all enabled MISC devices (CP110) enabled in the DT to initialize all CPs. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
* arm64: mvebu: armada-8040-db.dts: Add I2C and SPI aliasesStefan Roese2016-12-05-0/+5
| | | | | | | | | | | | | | | Add I2C and SPI aliases to enable usage in U-Boot. Otherwise U-Boot will not be able to use the SPI NOR chip for environment storage and use "i2c dev 0" to select this I2C bus. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
* arm64: mvebu: armada-8040-db.dts: Add COMPHY configurationStefan Roese2016-12-05-0/+84
| | | | | | | | | | | | | | This patch adds the COMPHY device tree configuration to the DT file for the Marvell DB-88F8040 devel board. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
* arm64: mvebu: armada-cp110-slave.dtsi: Add COMPHY / UTMI device tree nodesStefan Roese2016-12-05-0/+19
| | | | | | | | | | | | | | This patch adds the COMPHY and UTMI device tree nodes to the cp110-slave dtsi file for the Armada 8K. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
* arm64: mvebu: armada-cp110-master.dtsi: Rename comphy DT node namesStefan Roese2016-12-05-6/+6
| | | | | | | | | | | | | | | Since the cp110 slave also has comphy DT nodes, the names need to be renamed to avoid a name clash. Lets use the common naming scheme: "cpm_xxx" for master and "cps_xxx" for slave. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
* arm64: mvebu: Add support for the DB-88F8040 Armada 8k devel boardStefan Roese2016-12-05-0/+54
| | | | | | | | | | | | | | | | | This patch adds the necessary files to support the Marvell Armada 8k devel board. Most board specfic files are shared with the Armada 7k boards under the name "armada-8k*". So only minimal changes are necessary to add this basic board support (except the DT files of course). Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
* arm64: mvebu: Add slave CP area to the memory mapStefan Roese2016-12-05-1/+9
| | | | | | | | | | | | | | To enable access to the slave CP its memory needs to be added to the MMU memory map. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
* arm64: mvebu: armada-8k: Only configure xHCI power on DB-88F7040 boardStefan Roese2016-12-05-68/+78
| | | | | | | | | | | | | | | | This patch uses of_machine_is_compatible() to detect the board at runtime and only configured the I2C IO expander for the xHCI power / reset on the DB-88F7040 board. As this code will be used by other Armada-7k/8k ports, its necessary to use this runtime detection here. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
* arm64: mvebu: Add Armada-80x0 dts/dtsi filesStefan Roese2016-12-05-0/+511
| | | | | | | | | | | | | Add the latest version of the DT files from the Linux kernel. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
* arm64: mvebu: Rename db-88f7040 files to armada-8kStefan Roese2016-12-05-15/+17
| | | | | | | | | | | | | | | | | This moves some of the Armada DB-88F7040 board specific files to a more generic name: armada-8k. This is in preparation for the Armada-8k support which will be added soon. And since both platforms share most devices, lets also share most source files to not duplicate the code here. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
* Merge git://git.denx.de/u-boot-mpc85xxTom Rini2016-12-04-227/+276
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| * powerpc: mpc86xx: Convert CONFIG_SYS_FSL_NUM_LAWS to Kconfig optionYork Sun2016-12-04-13/+6
| | | | | | | | | | | | Use Kconfig instead of defining this macro in header file. Signed-off-by: York Sun <york.sun@nxp.com>
| * powerpc: mpc85xx: Convert CONFIG_SYS_FSL_NUM_LAWS to Kconfig optionYork Sun2016-12-02-32/+48
| | | | | | | | | | | | Move the macro to Kconfig SYS_FSL_NUM_LAWS. Signed-off-by: York Sun <york.sun@nxp.com>
| * powerpc: mpc86xx: Move CONFIG_FSL_LAW to KconfigYork Sun2016-12-02-5/+7
| | | | | | | | | | | | Clean up existing definitions and drop from white list. Signed-off-by: York Sun <york.sun@nxp.com>
| * powerpc: mpc85xx: Move CONFIG_FSL_LAW to KconfigYork Sun2016-12-02-68/+42
| | | | | | | | | | | | | | Some header files have this macro defined conditionally and redefined unconditionally. Remove all existing definitions. Signed-off-by: York Sun <york.sun@nxp.com>
| * powerpc: mpc85xx: Move SECURE_BOOT to KconfigYork Sun2016-12-02-45/+77
| | | | | | | | | | | | Move from CONFIG_SYS_EXTRA_OPTIONS to Kconfig option. Signed-off-by: York Sun <york.sun@nxp.com>
| * armv8: fsl-layerscape: Move SECURE_BOOT to KconfigYork Sun2016-12-02-3/+10
| | | | | | | | | | | | Move from CONFIG_SYS_EXTRA_OPTIONS to Kconfig option. Signed-off-by: York Sun <york.sun@nxp.com>
| * armv7: ls1021a: Move SECURE_BOOT option to KconfigYork Sun2016-12-02-3/+10
| | | | | | | | | | | | Move from CONFIG_SYS_EXTRA_OPTIONS to Kconfig option. Signed-off-by: York Sun <york.sun@nxp.com>
| * script: remove CONFIG_SYS_CCSRBAR_DEFAULT from white listYork Sun2016-12-02-4/+2
| | | | | | | | | | | | | | Now all mpc85xx and mpc86xx have converted to use SYS_CCSRBAR_DEFAULT in Kconfig. Drop this macro for LSCH2 and remove from white list. Signed-off-by: York Sun <york.sun@nxp.com>
| * powerpc: mpc86xx: Convert CONFIG_SYS_CCSRBAR_DEFAULT to Kconfig optionYork Sun2016-12-02-4/+9
| | | | | | | | | | | | Move default value definitions to Kconfig SYS_CCSRBAR_DEFAULT. Signed-off-by: York Sun <york.sun@nxp.com>
| * powerpc: mpc85xx: Convert CONFIG_SYS_CCSRBAR_DEFAULT to Kconfig optionYork Sun2016-12-02-43/+52
| | | | | | | | | | | | Move default value definitions to to Kconfig SYS_CCSRBAR_DEFAULT. Signed-off-by: York Sun <york.sun@nxp.com>
| * powerpc: cyrus: Separate P5020/P5040 config optionsYork Sun2016-12-02-7/+13
| | | | | | | | | | | | | | Instead of using EXTRA options in defconfig, use two targets in Kconfig to select correct SoC. Signed-off-by: York Sun <york.sun@nxp.com>
* | defconfig: am43xx_evm: Enable DM_SPI and DM_SPI_FLASHVignesh R2016-12-04-0/+4
| | | | | | | | | | | | | | | | | | | | Commit 4c4e3b37750f3("ARM: AM43xx: Enable FIT") accidentally disabled DM_SPI and DM_SPI_FLASH. Add back DM_SPI and DM_SPI_FLASH to am43xx_evm_defconfig in order to make use of DM framework for QSPI. Signed-off-by: Vignesh R <vigneshr@ti.com> Acked-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
* | common: image: Remove FIT header update from image post-processingAndrew F. Davis2016-12-04-23/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After an image is selected out of a FIT blob for further processing we run an optional, platform specific, post-processing function on this component. This post-processing may modify the position and size of the image, so after post-processing we update the location and size for this image in the FIT header. This can cause problems as the position of subsequent components in the FIT blob are only referenced by relative position to the end of the last component. When we resize or move a component the following components position will be calculated incorrectly. To fix this, we do not update the FIT header but instead only update our local understanding of the image data. This also allows us to re-run post-processing steps if needed. Signed-off-by: Andrew F. Davis <afd@ti.com> Tested-by: Carlos Hernandez <ceh@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
* | usb: gadget: remove unused shortname variableAndre Przywara2016-12-04-1/+0
| | | | | | | | | | | | | | | | | | | | | | The shortname variable isn't referenced anywhere in the code, so just remove it. Pointed out by a GCC 6.2 default warning option. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Marek Vasut <marex@denx.de> Acked-by: Lukasz Majewski <l.majewski@samsung.com>
* | davinci: da8xxevm: fix indentationAndre Przywara2016-12-04-2/+2
| | | | | | | | | | | | | | | | | | | | | | Apparently the indentation is wrong in this case, as the second message should be printed indepdently of the if statement. Fix this indentation to avoid both compiler warnings and puzzled readers. Pointed out by GCC 6.2's -Wmisleading-indentation warning. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
* | usb: eth: r8152_fw: fix indentationAndre Przywara2016-12-04-4/+4
| | | | | | | | | | | | | | | | | | | | | | Apparently the indentation is wrong here, fix this to avoid compiler warnings and puzzled readers. Pointed out by GCC 6.2's -Wmisleading-indentation warning. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Marek Vasut <marex@denx.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | marvell: comphy_a3700: fix bitmaskAndre Przywara2016-12-04-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | Obviously the mask for the rx and tx select field cannot be right, as it would overlap in one and exceed the 32-bit register in the other case. From looking at the neighbouring bits it looks like the mask should be really 4 bits wide instead of 8. Pointed out by a GCC 6.2 (default) warning. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Stefan Roese <sr@denx.de>
* | net: rtl8169: remove unneeded definitionAndre Przywara2016-12-04-3/+0
| | | | | | | | | | | | | | | | The rtl8169_intr_mask variable isn't used anywhere in the code, so just remove it to avoid a GCC 6.2 compiler warning. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | net: e1000: fix indentationAndre Przywara2016-12-04-3/+2
| | | | | | | | | | | | | | | | | | | | | | Apparently the indentation is off here, for the IGB model just want to bail out early. Fix this to avoid both compiler warnings and puzzled readers. Pointed out by GCC 6.2's -Wmisleading-indentation warning. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | mtd: cfi_flash: fix indentationAndre Przywara2016-12-04-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | The indentation is misleading here and suggests that the write command will be only executed in the else clause. It seems like this is not intended, so fix the indentation to avoid both compiler warnings and puzzled readers. Pointed out by GCC 6.2's -Wmisleading-indentation warning. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Stefan Roese <sr@denx.de>
* | serial: Drop the s3c24x0 serial driverSimon Glass2016-12-04-211/+0
| | | | | | | | | | | | | | | | This is not used by any boards. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: David Müller <d.mueller@elsoft.ch> Reviewed-by: Jagan Teki <jagan@openedev.com>
* | arm: Remove VCMA9 boardSimon Glass2016-12-04-1139/+0
| | | | | | | | | | | | | | | | | | This board has not been converted to DM_SERIAL by the deadline. Remove it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: David Müller <d.mueller@elsoft.ch> Reviewed-by: Jagan Teki <jagan@openedev.com>
* | arm: Remove smdk2410 boardSimon Glass2016-12-04-520/+0
| | | | | | | | | | | | | | | | This board has not been converted to DM_SERIAL by the deadline. Remove it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: David Müller <d.mueller@elsoft.ch>
* | serial: Update docs to indicate mcfuart supports DM_SERIALSimon Glass2016-12-04-1/+0
| | | | | | | | | | | | This driver was converted so we should remove it from the list. Signed-off-by: Simon Glass <sjg@chromium.org>
* | post: cosmetic: fix typoNiko Mauno2016-12-04-1/+1
| | | | | | | | | | | | Change 'date' to 'data'. Signed-off-by: Tomas Melin <tomas.melin@vaisala.com>
* | Cosmetic api: api_storage.c Spelling correctionWalt Feasel2016-12-04-1/+1
| | | | | | | | | | | | Make spelling correction for 'from' Signed-off-by: Walt Feasel <waltfeasel@gmail.com>
* | Cosmetic api: api_storage.c Comment styleWalt Feasel2016-12-04-15/+17
| | | | | | | | | | | | Make comment style modifications Signed-off-by: Walt Feasel <waltfeasel@gmail.com>
* | Cosmetic api: api_storage.c Line over 80 charWalt Feasel2016-12-04-1/+1
| | | | | | | | | | | | | | Make checkpatch style modification for WARNING: line over 80 characters Signed-off-by: Walt Feasel <waltfeasel@gmail.com>
* | Cosmetic api: api_storage.c Blank line after {Walt Feasel2016-12-04-3/+0
| | | | | | | | | | | | | | | | Make checkpatch style modification for CHECK: Blank lines aren't necessary after an open brace '{' Signed-off-by: Walt Feasel <waltfeasel@gmail.com>
* | Cosmetic api: api_storage.c Align parenthesisWalt Feasel2016-12-04-1/+1
| | | | | | | | | | | | | | Make checkpatch style modification for CHECK: Alignment should match open parenthesis Signed-off-by: Walt Feasel <waltfeasel@gmail.com>
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