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* Merge git://git.denx.de/u-boot-nand-flashTom Rini2016-06-20-190/+383
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| * mtd: nand: Patch remaining places where nand_to_mtd() should be usedBoris Brezillon2016-06-19-6/+6
| | | | | | | | | | | | | | Some drivers are still directly accessing the chip->mtd field. Patch them to use nand_to_mtd() instead. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
| * nand: doc: fix example ecc scheme calculationFabian Mewes2016-06-19-1/+1
| | | | | | | | Signed-off-by: Fabian Mewes <architekt@coding4coffee.org>
| * nand: extend nand tortureMax Krummenacher2016-06-19-7/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | nand torture currently works on exactly one nand block which is specified by giving the byteoffset to the beginning of the block. Extend this by allowing for a second parameter specifying the byte size to be tested. e.g. ==> nand torture 1000000 NAND torture: device 0 offset 0x1000000 size 0x20000 (block size 0x20000) Passed: 1, failed: 0 ==> nand torture 1000000 40000 NAND torture: device 0 offset 0x1000000 size 0x40000 (block size 0x20000) Passed: 2, failed: 0 Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com> [scottwood: fix usage to show size as optional, and add misssing braces] Signed-off-by: Scott Wood <oss@buserror.net>
| * nand: nand torture: follow sync with linux v4.6Max Krummenacher2016-06-19-1/+1
| | | | | | | | | | | | follow parameter name change (nand to mtd) to fix compiler error. Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
| * common: fb_nand: won't compileSergey Kubushyn2016-06-19-1/+1
| | | | | | | | | | | | | | | | | | Somehow this got overlooked when getting rid of nand_info. Small patch, won't affect anything else, no reason to wait for the next cycle. Signed-off-by: Sergey Kubushyn <ksi@koi8.net>
| * spl: nand: sunxi: add support for NAND config auto-detectionBoris Brezillon2016-06-19-58/+204
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | NAND chips are supposed to expose their capabilities through advanced mechanisms like READID, ONFI or JEDEC parameter tables. While those methods are appropriate for the bootloader itself, it's way to complicated and takes too much space to fit in the SPL. Replace those mechanisms by a dumb 'trial and error' mechanism. With this new approach we can get rid of the fixed config list that was used in the sunxi NAND SPL driver. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com>
| * spl: nand: sunxi: split 'load page' and 'read page' logicBoris Brezillon2016-06-19-71/+114
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Split the 'load page' and 'read page' logic in 2 different functions so we can later load the page and test different ECC configs without the penalty of reloading the same page in the NAND cache. We also move common setup to a dedicated function (nand_apply_config()) to avoid rewriting the same values in NFC registers each time we read a page. These new functions are passed a pointer to an nfc_config struct to limit the number of parameters. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com>
| * spl: nand: sunxi: rework status polling loopBoris Brezillon2016-06-19-16/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | check_value_xxx() helpers are using a 1ms delay between each test, which can be quite long for some operations (like a page read on an SLC NAND). Since we don't have anything to do but to poll this register, reduce the delay between each test to 1us. While we're at it, rename the max_number_of_retries parameters and the MAX_RETRIES macro into timeout_us and DEFAULT_TIMEOUT_US to reflect that we're actually waiting a given amount of time and not only a number of retries. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com>
| * spl: nand: sunxi: stop guessing the redundant u-boot offsetBoris Brezillon2016-06-19-20/+0
| | | | | | | | | | | | | | | | | | | | | | | | Use CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND value instead of trying to guess where the redundant u-boot image is based on simple (and most of the time erroneous) heuristics. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com> # Conflicts: # drivers/mtd/nand/sunxi_nand_spl.c
| * spl: nand: support redundant u-boot imageBoris Brezillon2016-06-19-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On modern NAND it's more than recommended to have a backup copy of the u-boot binary to recover from corruption: bitflips are quite common on MLC NANDs, and the read-disturbance will corrupt your u-boot partitition more quickly than what you would see on an SLC NAND. Add an extra Kconfig option to specify the offset of the redundant u-boot image. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com> [scottwood: added ifdef to fix build break] Signed-off-by: Scott Wood <oss@buserror.net>
| * spl: nand: rework SYS_NAND_U_BOOT_OFFS Kconfig option dependencyBoris Brezillon2016-06-19-4/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | The SYS_NAND_U_BOOT_OFFS is quite generic, but the Kconfig entry is forced to explicitly depend on platforms that are not already defining it in their include/configs/<board>.h header. Add the SYS_NAND_U_BOOT_LOCATIONS option, make the SYS_NAND_U_BOOT_OFFS depends on it, remove the dependency on NAND_SUNXI and make it dependent on SPL selection. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com>
| * spl: nand: sunxi: remove support for so-called 'syndrome' modeBoris Brezillon2016-06-19-42/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The sunxi SPL NAND controller driver supports use 'BootROM'-like configs, that is, configs where the ECC bytes and real data are interleaved in the page instead of putting ECC bytes in the OOB area. Doing that has several drawbacks: - since you're interleaving data and ECC bytes you can't use the whole page otherwise you might override the bad block marker with non-FF bytes. - to solve the bad block marker problem, the ROM code supports partially using the page, but this introduces a huge penalty both in term of read speed and NAND memory usage. While this is fine for rather small binaries(like the SPL one which is at maximum 24KB large), it becomes non-negligible for the bootloader image (several hundred of KB). - auto-detection of the page size is not reliable (this is in my opinion the biggest problem). If you get the page size wrong, you'll end up reading data at a different offset than what was specified by the caller and the reading may succeed (if valid data were written at this address). For all those reasons I think it's wiser to completely remove support for 'syndrome' configs. If we ever need to support it again, then I'd recommend specifying all the config parameters through Kconfig options. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com>
* | mmc: add MMC_VERSION_5_1Stefan Wahren2016-06-20-0/+4
| | | | | | | | Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
* | dragonboard410c: Increase default environment size.Mateusz Kulikowski2016-06-20-1/+1
| | | | | | | | | | | | | | Due to changes in distro environment, ENV_SIZE limit was reached on Dragonboard. This patch increases environment size to 8KiB. Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
* | Merge git://git.denx.de/u-boot-dmTom Rini2016-06-20-687/+2028
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| * | clk: convert API to match reset/mailbox styleStephen Warren2016-06-19-570/+985
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following changes are made to the clock API: * The concept of "clocks" and "peripheral clocks" are unified; each clock provider now implements a single set of clocks. This provides a simpler conceptual interface to clients, and better aligns with device tree clock bindings. * Clocks are now identified with a single "struct clk", rather than requiring clients to store the clock provider device and clock identity values separately. For simple clock consumers, this isolates clients from internal details of the clock API. * clk.h is split so it only contains the client/consumer API, whereas clk-uclass.h contains the provider API. This aligns with the recently added reset and mailbox APIs. * clk_ops .of_xlate(), .request(), and .free() are added so providers can customize these operations if needed. This also aligns with the recently added reset and mailbox APIs. * clk_disable() is added. * All users of the current clock APIs are updated. * Sandbox clock tests are updated to exercise clock lookup via DT, and clock enable/disable. * rkclk_get_clk() is removed and replaced with standard APIs. Buildman shows no clock-related errors for any board for which buildman can download a toolchain. test/py passes for sandbox (which invokes the dm clk test amongst others). Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | reset: implement a reset testStephen Warren2016-06-19-4/+251
| | | | | | | | | | | | | | | | | | | | | | | | | | | This adds a sandbox reset implementation (provider), a test client device, instantiates them both from Sandbox's DT, and adds a DM test that excercises everything. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | Add a reset driver framework/uclassStephen Warren2016-06-19-0/+446
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A reset controller is a hardware module that controls reset signals that affect other hardware modules or chips. This patch defines a standard API that connects reset clients (i.e. the drivers for devices affected by reset signals) to drivers for reset controllers/providers. Initially, DT is the only supported method for connecting the two. The DT binding specification (reset.txt) was taken from Linux kernel v4.5's Documentation/devicetree/bindings/reset/reset.txt. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | mailbox: add Tegra186 HSP driverStephen Warren2016-06-19-0/+200
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tegra186's HSP module implements doorbells, mailboxes, semaphores, and shared interrupts. This patch provides a driver for HSP, and hooks it into the mailbox API. Currently, only doorbells are supported. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
| * | mailbox: rename headersStephen Warren2016-06-19-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | Rename mailbox*.h to match the naming convention requested during review of the new reset subsystem. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | sandbox: gpio: doc: Fix parameter documentationmario.six@gdsys.cc2016-06-19-6/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The documentation of parameters in arch/sandbox/include/asm/gpio.h is either missing or faulty. This patch corrects the documentation. Signed-off-by: Mario Six <mario.six@gdsys.cc> Acked-by: Simon Glass <sjg@chromium.org>
| * | lib/libfdt/: General aesthetic/style fixes.Robert P. J. Day2016-06-19-97/+109
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A number of style fixes across the files in this directory, including: * Correct invalid kernel-doc content. * Tidy up massive comment in fdt_region.c. * Use correct spelling of "U-Boot". * Replace tests of "! <var>" with "!<var>". * Replace "libfdt_env.h" with <libfdt_env.h>. Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca> Acked-by: Simon Glass <sjg@chromium.org>
| * | gpio: pca953x: Fix register reading past 8th GPIOmario.six@gdsys.cc2016-06-19-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A bug in the pca953x driver prevents correct reading of GPIO input values beyond the 8th GPIO; all values are reported as zero. Setting of GPIO output values is not affected. This patch fixes the reading behavior. Signed-off-by: Mario Six <mario.six@gdsys.cc> Reviewed-by: Peng Fan <van.freenix@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | dm: add manual relocation for devicesAngelo Dureghello2016-06-19-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | Some architectures as m68k still need to use CONFIG_NEEDS_MANUAL_RELOC, and are not still using the device tree. Signed-off-by: Angelo Dureghello <angelo@sysam.it> Acked-by: Simon Glass <sjg@chromium.org>
* | | ARM: uniphier: use the default CONFIG_BOOTDELAY=2Masahiro Yamada2016-06-20-6/+0
| | | | | | | | | | | | | | | | | | | | | I do not insist on CONFIG_BOOTDELAY=3. The default value in Kconfig, CONFIG_BOOTDELAY=2, is just fine for these boards. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | ARM: uniphier: reserve memory for DRAM PHY training on PH1-LD20Masahiro Yamada2016-06-20-0/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DRAM PHY layer on PH1-LD20 is able to calibrate PHY parameters periodically. This compensates for the voltage and temperature deviation and improves the PHY parameter adjustment. Instead, it requires 64 byte scratch memory in each DRAM channel for the dynamic training. The memory regions must be reserved in DT before jumping to the kernel. The scratch area can be anywhere in each DRAM channel, but the DRAM init code in SPL currently assigns it at the end of each channel. So, it makes sense to reserve the regions on run-time by U-Boot instead of statically embedding it in the DT in Linux. Anyway, a boot-loader should know much more about memory initialization than the kernel. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | ARM: uniphier: move CONFIG_ARMV8_MULTIENTRY to KconfigMasahiro Yamada2016-06-20-1/+1
| | | | | | | | | | | | | | | | | | I just did not notice this option had an entry in Kconfig. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | ARM: uniphier: introduce CONFIG_ARM_UNIPHIER_{32, 64}BITMasahiro Yamada2016-06-20-8/+15
| | | | | | | | | | | | | | | | | | | | | This will make it easier to select config options specific to particular ARM processor generation. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | ARM: uniphier: change CPU_RELEASE_ADDR to the head of DRAM spaceMasahiro Yamada2016-06-20-1/+1
|/ / | | | | | | | | | | | | | | | | At first, 256 byte of the head of DRAM space was reserved for some reasons. However, as the progress of development, it turned out unnecessary, and it was never used in the end. Move the CPU release address to leave no space. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | SPL ext: cosmetic: correct error message in spl_load_image_ext()Petr Kulhavy2016-06-19-1/+1
| | | | | | | | | | | | | | | | | | | | Correct the error message in spl_load_image_ext() when image parsing fails. Instead of "ext4fs_read failed" print "failed to parse image header". Signed-off-by: Petr Kulhavy <brain@jikos.cz> CC: Guillaume GARDET <guillaume.gardet@free.fr> CC: Tom Rini <trini@konsulko.com>
* | fs: cbfs: Fix build of fs/cbfs/cbfs.c when building u-boot sandbox on x86 32-bitGuillaume GARDET2016-06-19-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the following build errors when building sandbox on x86 32-bit: In file included from fs/cbfs/cbfs.c:8:0: include/malloc.h:364:7: error: conflicting types for 'memset' void* memset(void*, int, size_t); ^ In file included from include/compiler.h:123:0, from include/cbfs.h:10, from fs/cbfs/cbfs.c:7: include/linux/string.h:78:15: note: previous declaration of 'memset' was here extern void * memset(void *,int,__kernel_size_t); ^ In file included from fs/cbfs/cbfs.c:8:0: include/malloc.h:365:7: error: conflicting types for 'memcpy' void* memcpy(void*, const void*, size_t); ^ In file included from include/compiler.h:123:0, from include/cbfs.h:10, from fs/cbfs/cbfs.c:7: include/linux/string.h:81:15: note: previous declaration of 'memcpy' was here extern void * memcpy(void *,const void *,__kernel_size_t); ^ scripts/Makefile.build:280: recipe for target 'fs/cbfs/cbfs.o' failed Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | test/py: fix printenv signon message disable codeStephen Warren2016-06-19-1/+2
| | | | | | | | | | | | | | | | | | | | | | CONFIG_VERSION_VARIABLE isn't always defined, so we can't simply look up its value directly, or an exception will occur if it isn't defined. Instead, we must use .get() to supply a default value if the variable isn't defined. Fixes: da37f006e7c5 ("tests: py: disable main_signon check for printenv cmd") Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini2016-06-18-4/+1531
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| * | ARM: socfpga: Sort Kconfig entriesMarek Vasut2016-06-08-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | Just sort the board entries, no functional change. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
| * | ARM: socfpga: add support for IS1 boardPavel Machek2016-06-08-0/+1527
| | | | | | | | | | | | | | | | | | | | | | | | This adds support for IS1 board. Pretty usual socfpga board, 256MB of RAM, does not have MMC, two SPI chips, one ethernet port, two additional ethernet ports connected to the FPGA. Signed-off-by: Pavel Machek <pavel@denx.de>
* | | Merge branch 'master' of git://git.denx.de/u-boot-usbTom Rini2016-06-18-233/+333
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h
| * | | usb: ehci: only shutdown opened controllerPeng Fan2016-06-18-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the usb controller is not running, no need to shutdown it, otherwise `usb stop` complains about: "EHCI failed to shut down host controller". To i.MX7D SDB, there are two usb ports, one Host, one OTG. If we only plug one udisk to the Host port and then `usb start`, the OTG controller for OTG port does not run actually. Then, if `usb stop`, the OTG controller for OTG port will also be shutdown, but it is not running. This patch adds a check to only shutdown the running controller. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Mateusz Kulikowski <mateusz.kulikowski@gmail.com> Cc: Hans de Goede <hdegoede@redhat.com> Cc: "Stefan Brüns" <stefan.bruens@rwth-aachen.de> Cc: Stephen Warren <swarren@nvidia.com>
| * | | cmd: usb: check if_type before using this devicePeng Fan2016-06-18-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For legacy usb storage driver, USB_MAX_STOR_DEV is defined as 7. If we only have one usb disk on board, `usb dev 0` is ok. But if `usb dev 1`, still ok, then `usb read xxx` will trigger system fault and reboot. So check if_type before using this device. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Simon Glass <sjg@chromium.org> Cc: Hans de Goede <hdegoede@redhat.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stephen Warren <swarren@nvidia.com>
| * | | usb: xhci: fsl: Add workaround for USB erratum A008751Sriram Dash2016-06-13-0/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is doing the following: 1. Implementing the errata for LS2080. 2. Adding fixup for fdt for LS2080. Signed-off-by: Sriram Dash <sriram.dash@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
| * | | armv8/ls2080: Remove workaround for erratum A008751Sriram Dash2016-06-13-10/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This errata a008751 is applied on Soc specific file currently.This will be moved to a file where all the errata implementation will take place for usb for fsl. This patch removes the errata workaround from soc specific file for LS2080. Signed-off-by: Sriram Dash <sriram.dash@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
| * | | fsl: usb: make errata function common for PPC and ARMSriram Dash2016-06-13-185/+189
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch does the following things: 1. Makes the errata checking code common for PPC and ARM 2. Moves all these static inline functions into a dedicated C file Signed-off-by: Sriram Dash <sriram.dash@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
| * | | usb: xhci: fsl: code cleanup for device tree fixup for fsl usb controllersSriram Dash2016-06-13-38/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Performs code cleanup for device tree fixup for fsl usb controllers by making functions to handle these similar errata checking code. Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
| * | | arm64: fsl-layerscape: add get_svr and IS_SVR_REV helperSriram Dash2016-06-13-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds get_svr and IS_SVR_REV helpers for ARMv8 platforms, similar to PPC and ARMv7. Signed-off-by: Sriram Dash <sriram.dash@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
| * | | arm: bcm281xx: choose 8-bit phy bus widthSteve Rae2016-06-13-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The Kona PHY supports an 8-bit wide UTMI interface, therefore, choose this Kconfig setting. Signed-off-by: Steve Rae <srae@broadcom.com>
| * | | usb: dwc2_udc_otg: support 8-bit interfaceSteve Rae2016-06-13-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Define CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8 to allow the physical interface to be 8-bit (rather than 16-bit). Signed-off-by: Steve Rae <srae@broadcom.com>
* | | | Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2016-06-18-13/+107
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| * | | | warp7: Fix DFU supportFabio Estevam2016-06-18-5/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently DFU is not working. Adjust CONFIG_SYS_MALLOC_LEN and dfu_alt_info so that we are able to flash u-boot.imx into the eMMC via dfu using the following method: => dfu 0 mmc 0 In the host PC: dfu-util -D u-boot.imx -a boot This is the same approach done in the mx6sl warp board. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
| * | | | warp7: Add README fileMarco Franchi2016-06-18-0/+63
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a README file for helping users to install U-Boot into the eMMC. Signed-off-by: Marco Franchi <marco.franchi@nxp.com> Acked-by: Fabio Estevam <fabio.estevam@nxp.com>
| * | | | warp7: Fix watchdog resetMarco Franchi2016-06-18-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The latest version of warp7 board provides the connection of the WDOG1_B pin to the PMIC. Program the watchdog to enable the WDOG1_B output which causes a POR reset. Based on the imx7dsabresd code. Signed-off-by: Marco Franchi <marco.franchi@nxp.com> Acked-by: Fabio Estevam <fabio.estevam@nxp.com>
generated by cgit v1.1 at 2024-11-09 06:26:44 +0000