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* MLK-14250-6 mx6dq/dl: Add plugin boot support for arm2 boardsYe Li2017-04-05-2/+1304
| | | | | | | | | | | | | Add plugin.S for plugin boot initialization on mx6dq/dl arm2 board. Need to set "CONFIG_USE_IMXIMG_PLUGIN" for this feature. New build configurations are added for the plugin: mx6dlarm2_lpddr2_plugin_defconfig mx6dlarm2_plugin_defconfig mx6qarm2_lpddr2_plugin_defconfig configs/mx6qarm2_plugin_defconfig Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14250-5 mx6ulevk: Add plugin boot supportYe Li2017-04-05-0/+446
| | | | | | | | | | Add plugin.S for plugin boot initialization. Need to set "CONFIG_USE_IMXIMG_PLUGIN" for this feature. Add build configurations for the plugin: mx6ul_14x14_evk_plugin_defconfig mx6ul_9x9_evk_plugin_defconfig Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14250-4 mx6dq/dl/dqp: Add plugin boot support for sabre boardsYe Li2017-04-05-5/+1640
| | | | | | | | Add plugin.S for plugin boot initialization on mx6dq/dl/dqp sabresd and sabreauto boards. Need to set "CONFIG_USE_IMXIMG_PLUGIN" for this feature. Add the configurations for the plugin enabled buiding. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14250-3 mx6sxsabreauto: Add plugin boot supportYe Li2017-04-05-1/+199
| | | | | | | | Add plugin.S for plugin boot initialization. Need to set "CONFIG_USE_IMXIMG_PLUGIN" for this feature. Add the build configuration "mx6sxsabreauto_plugin_defconfig" to use the plugin. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14250-2 mx6sxsabresd: Add plugin boot supportYe Li2017-04-05-1/+176
| | | | | | | | Add plugin.S for plugin boot initialization. Need to set "CONFIG_USE_IMXIMG_PLUGIN" for this feature. Add the build configuration "mx6sxsabresd_plugin_defconfig" to use the plugin. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14250-1 mx6slevk: Add plugin boot supportYe Li2017-04-05-1/+232
| | | | | | | | Add plugin.S for plugin boot initialization. Need to set "CONFIG_USE_IMXIMG_PLUGIN" for this feature. Add the build configuration "mx6slevk_plugin_defconfig" to use the plugin. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-10647 armv7: Fix Dcache disable issue on i.MX7Ye.Li2017-04-05-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The issue on the i.MX7D is that, there is one cache-able memory access between the L1 and L2 cache flush by calling the flush_dache_all-> v7_maint_dcache_all() [Flush L1 and L2 cache) which written in the C code. L1-cache-flush -> This will flush L1 cache to L2 cache in the end. Cache-able memory access -> This will have the chance cause the L1 line-fill with dirty data from L2 cache(L1 cache-line dirty, L2 clean) L2-cache-flush -> This will only flush L2 cache to L3, but still some dirty data on the L1 cacheline. After C & M bit clean, -> The dirty data on the L1 cache line lost, which will cause memory coherent issue if that dirty cache line has some useful data The only problem here is: there is one cache-cable memory access between L1 and L2 cache flush. This patch should works fine on the i.MX6 and i.MX7. The second cache flush have zero impact on the i.MX6, but this is really need for the i.MX7D platform due to the L1 line-fill during the first dcache_flush. And the second flush will not bring in the L1 dirty cache line due to the C bit is clear now, which means the dcache is disabled. Acked-by: Jason Liu<r64343@freescale.com> Reviewed-by: Jason Liu<r64343@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit f5d5f07fba936c4bb05c887de9d72fb75b3dc0f2) (cherry picked from commit 86c784cf4c4b633d37a76de7d47155c08f75dc82) (cherry picked from commit d85cd484e6825631aa1ab572e5e0539f2191d795) (cherry picked from commit 2b29c1873c2293abe1c4b361392521223b9c9ecf)
* MLK-13782 net: fec_mxc: specify the registered eth index by dev_idAndy Duan2017-04-05-2/+9
| | | | | | | Specify the registered eth index by dev_id. Signed-off-by: Fugang Duan <fugang.duan@nxp.com> (cherry picked from commit df42b7b0c5e6847f32419075eb25f274ed039d6f)
* MLK-13777 net: fec_mxc: avoid transfer dev_id -1 to get mac address from fuseAndy Duan2017-04-05-2/+2
| | | | | | | | Avoid transfer parameter dev_id value with "-1" to .fec_get_hwaddr(), it should transfer fec->dev_id to get mac address from fuse. Signed-off-by: Fugang Duan <fugang.duan@nxp.com> (cherry picked from commit 7e4a55b068311d46d16e86e697d36f34a59bf47a)
* MLK-13486: imx: logos: use NXP logoPeng Fan2017-04-05-0/+0
| | | | | | | | | Use NXP logo. The vendor and board dir not changed, only replace the contents of freescale.bmp. Signed-off-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit 0b381fdf1a45cb06a057724e708ce0bbeee67f4d)
* MLK-13410 Android: Change to set mfgtool only for none android u-bootYe Li2017-04-05-2/+2
| | | | | | | | | | | The mfgtool environments only can set in BSP u-boot image, not for android u-boot. Since android u-boot may go into fastboot in board_r phase which is earlier than mfgtool environment check. The USB status from android fastboot will cause u-boot to configure mfgtool environment. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 066f001a19bdc51b0fc0d65bcb87081b01f957c2) (cherry picked from commit 03f995630f92462081e98412a0fbc86bb5106f10)
* MLK-13307-12 imx: mx6: update ccm macro settings for i.MX6SLLPeng Fan2017-04-05-10/+52
| | | | | | | | Update CCM macros for i.MX6SLL. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye.Li <ye.li@nxp.com> (cherry picked from commit f735f8ac328aa49759f6db524f7c2ba32622f711)
* MLK-13307-7 imx: mx6sll: update soc settingsPeng Fan2017-04-05-2/+11
| | | | | | | Update soc settings for i.MX6SLL. Signed-off-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit afa2d78f2b799337eae3dc67c0ed702d5520eee6)
* MLK-12883 usb: limit USB_MAX_XFER_BLK to 256Peng Fan2017-04-05-1/+3
| | | | | | | | | | | | | | | | | | | | For Some USB mass storage devices, such as: " - Kingston DataTraveler 2.0 001D7D06CF09B04199C7B3EA - Class: (from Interface) Mass Storage - PacketSize: 64 Configurations: 1 - Vendor: 0x0930 Product 0x6545 Version 1.16 " When `usb read 0x80000000 0 0x2000`, we met "EHCI timed out on TD - token=0x80008d80". The devices does not support scsi VPD page, we are not able to get the maximum transfer length for READ(10)/WRITE(10). So we limit this to 256 blocks as READ(6). Signed-off-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit df0052575b2bc9d66ae73584768e1a457ed5d914)
* MLK-12444-2 mx6: Modify kernel and fdt load address to align with mfgtoolYe Li2017-04-05-4/+5
| | | | | | | | | Change the CONFIG_LOADADDR to 0x80800000 and environment variable "fdt_addr" to 0x83000000 for i.MX6SX, i.MX6SL and i.MX6UL to align the address used in mfgtool. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 41a6f612f6ae638ac6db61c60e19dcfebf052820)
* MLK-12444-1 mfgtool: Add mfgtool supportYe Li2017-04-05-1/+137
| | | | | | | | | | | | | If boot from usb, reset environment to default value. Auto apply mfgtools setting and boot mfgtools kernel. Porting this from fsl uboot to uboot 2016. The 7dsabresd has already added the environment and usb boot related functions. No need to add them more. Only need to add NAND parts environment for mfgtools. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit a352ed3c5184b95c4c9f7468f5fbb5f43de5e412)
* MLK-14259-3 mx6ulevk: Add support for NANDYe Li2017-04-05-2/+77
| | | | | | | Add NAND pinmux settings, clock setting and related configurations. Default not enabled, need hardware rework. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14259-2 mx6ulevk: Add PHYS_SDRAM_SIZE and CMA macroYe Li2017-04-05-0/+10
| | | | | | | | Define PHYS_SDRAM_SIZE future usage. Define CMA for kernel usage, default is 320MB, but we do not have enough memory on 9x9 evk lpddr2 board, so swith to 96MB. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-14259-1 mx6ulevk: Change i.MX6UL EVK to non-SPL at defaultYe Li2017-04-05-22/+362
| | | | | | | Current i.MX6UL EVK boards enable the SPL u-boot. Change it to non-SPL for default configurations. Add two other build configurations for SPL. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-12767 imx6ull: fix runtime checking for i.MX6ULLPeng Fan2017-04-05-3/+3
| | | | | | | | Fix runtime checking for i.MX6ULL. Add is_cpu_type(MXC_CPU_MX6ULL) to avoid using wrong code path. Signed-off-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit 05922b0abf848949df778c19312cb1cf7fdfbe6a)
* MLK-12766 net: fec: do not access reserved register for i.MX6ULLPeng Fan2017-04-05-1/+1
| | | | | | | | | | The MIB RAM and FIFO receive start register does not exist on i.MX6ULL. Accessing these register will cause enet not work well or cause system report fault. Reported-by: Bai Ping <ping.bai@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> (cherry picked from commit 5fb09cab9bb3cc4cef02239299d02cec666396ab)
* MLK-12565 mx7: rdc: Change IS_ENABLED to remove build warningYe Li2017-04-05-2/+3
| | | | | | | | Change to use #ifdef not the IS_ENABLED, because we will get build warning when the CONFIG_IMX_RDC is not set. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit a212eff242efb8dc171479cbaca34049d508f87b)
* MLK-10708 imx:mx6qp Update Saturation THR for PRExPeng Fan2017-04-05-4/+4
| | | | | | | | | | Update settings for PRE. Value for Saturation THR of PREx, changed from 0x20 to 0x10 to make system more stable. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> (cherry picked from commit 02e7090604e55d9690532294b02b499609d46e63) (cherry picked from commit f7c5cf580fcc2c8ab95a8d835f5874d26216910f) (cherry picked from commit 1a90b60731cd60feba1ef7a11ede2613283bb4a8)
* MLK-12483-5 mx6ul: Enable module fuse check EVK boardYe Li2017-04-05-1/+24
| | | | | | | | Enable the configurations CONFIG_MODULE_FUSE and CONFIG_OF_SYSTEM_SETUP for module fuse check. And modify board level codes for SD, FEC and EIM. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 9232e9f7637afa3b71b43ab2d1361582ec5a080a)
* MLK-12483-4 mx6: Modify drivers to disable fused modulesYe Li2017-04-05-10/+136
| | | | | | | | | | | Add the fuse checking in drivers, when the module is disabled in fuse, the driver will not work. Changed drivers: BEE, GPMI, APBH-DMA, ESDHC, FEC, QSPI, ECSPI, I2C, USB-EHCI, GIS, LCDIF. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 1704e116f9b39aeb99201919a18bc2b1e19a980e)
* MLK-12483-3 mx6: Add a module fuse checkingYe Li2017-04-05-1/+401
| | | | | | | | | | | | | | | | Implement a functionality to read the soc fuses and check if any module is fused. For fused module, we have to disable it in u-boot dynamically, and change the its node in FDT to "disabled" status before starting the kernel. In this patch, we implement the ft_system_setup for FDT fixup. This function will be called during boot process or by "fdt systemsetup" command. To enable the module fuse checking, two configurations must be defined: CONFIG_MODULE_FUSE CONFIG_OF_SYSTEM_SETUP Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 7236051526b73a5a25cc8330a79f5c08b7d70726)
* ENGR00315894-55 iMX6SX: add debug monitor supportYe.Li2017-04-05-0/+22
| | | | | | | | | | | | | | Debug monitor will print out last failed AXI access info when system reboot is caused by AXI access failure, only works when debug monitor is enabled. Enable this module on i.MX6SX. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit df6ac8531d498021ed379c74fc1847bd2cec7179) Signed-off-by: Peng Fan <Peng.Fan@freescale.com> (cherry picked from commit 4f4ecdbf6fe2673b8ad117df1a4974bdb7e6aa4a)
* MLK-10674-2 imx: mx6qp settings for PREPeng Fan2017-04-05-2/+31
| | | | | | | | | | | | | | | | | | | | | | | Since the following piece settings can not be in DCD table, we add them in enable_ipu_clock. " setmem /32 0x00bb048c = 0x00000002 ## Bypass IPU1 QoS generator setmem /32 0x00bb050c = 0x00000002 ## Bypass IPU2 QoS generator setmem /32 0x00bb0690 = 0x00000200 ## Bandwidth THR for of PRE0 setmem /32 0x00bb0710 = 0x00000200 ## Bandwidth THR for of PRE1 setmem /32 0x00bb0790 = 0x00000200 ## Bandwidth THR for of PRE2 setmem /32 0x00bb0810 = 0x00000200 ## Bandwidth THR for of PRE3 setmem /32 0x00bb0694 = 0x00000020 ## Saturation THR for of PRE0 setmem /32 0x00bb0714 = 0x00000020 ## Saturation THR for of PRE1 setmem /32 0x00bb0794 = 0x00000020 ## Saturation THR for of PRE2 setmem /32 0x00bb0814 = 0x00000020 ## Saturation THR for of PRE " CONFIG_VIDEO_IPUV3 is always defined in mx6sabre_common.h, the settings sure will effect. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> (cherry picked from commit 61cec88a59ebf450dd1352d81e03b5aa842e1d71) (cherry picked from commit 3d25e2acd48f605678a98cf594a715809dea8286)
* MLK-10496: Check the PL310 version for applying errataNitin Garg2017-04-05-9/+18
| | | | | | | | | | | | Apply errata based on PL310 version instead of compile time. Also set Prefetch offset to 15, since it improves memcpy performance by 35%. Don't enable Incr double Linefill enable since it adversely affects memcpy performance by about 32MB/s and reads by 90MB/s. Tested with 4K to 16MB sized src and dst aligned buffer. Signed-off-by: Nitin Garg <nitin.garg@freescale.com> (cherry picked from commit 31751fa9cf29ef4056f49fe06a54700a89c9bdc5)
* MLK-10176-6 imx: mx7: Modify GPT timer driver for mx7Peng Fan2017-04-05-2/+8
| | | | | | | | | | | | | Modify the GPT common platform driver for mx7 which only use 24Mhz OSC as clock source. Note: at default, the mx7d will use system counter as timer. The GPT is disabled. Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit 6e250796d6a07d84093eeae96e5a6e4c593cdb0b) Signed-off-by: Peng Fan <Peng.Fan@freescale.com> (cherry picked from commit 708898fe547bd3d56f0abf7e40f1af91cf4271cf)
* ENGR00328312 i2c: imx: Optimize the i2c device recovery solutionFugang Duan2017-04-05-2/+26
| | | | | | | | | | | | | | | | | | | From i2c spec, if device pull down the SDA line that causes i2c bus dead, host can send out 9 clock to let device release SDA. But for some special device like pfuze100, it pull down SDA line and the solution cannot take effort. The patch just add NACK and STOP signal after 8 dummy clock, and pmic can release SDA line after the recovery. Test case catch 375 times of i2c hang, and all are recovered. Signed-off-by: Fugang Duan <B38611@freescale.com> (cherry picked from commit 53118db42d201d36ca9067b4bb0e2702399e100b) Signed-off-by: Peng Fan <Peng.Fan@freescale.com> (cherry picked from commit b8dcb812401026cb2189b24a4f6058830151c85a) (cherry picked from commit c5a44a2a0b2218221cb12645b10f0b34ecc6f79b)
* MLK-10576 ARM: i.MX6: exclude the ARM errata from i.MX6 UP systemNitin Garg2017-04-05-5/+9
| | | | | | | | | | | | | | | | | The ARM errata 751472, 794072, 761320, 845369 only applied to the following configuration: This erratum affects configurations with either: - One processor if the ACP is present - Two or more processors i.MX6 family does not have the ACP and thus only the MPCore system will be impacted, which are the i.MX6DQ, i.MX6DL, and i.MX6QP. Signed-off-by: Nitin Garg <nitin.garg@freescale.com> Signed-off-by: Jason Liu <r64343@freescale.com> (cherry picked from commit 0db960784ba4f631ee5c0321b5d25f3b1ac55640) (cherry picked from commit 850f27d137a083a141c99fe9828d596807937d38)
* MLK-10524: iMX6x: Implement workaround for Cortex-A9 errata 845369Nitin Garg2017-04-05-0/+10
| | | | | | | | | | | Under very rare timing circumstances, transitioning into streaming mode might create a data corruption. Present on Two or more processors or 1 core with ACP, all revisions. This erratum can be worked round by setting bit[22] of the undocumented Diagnostic Control Register to 1. Signed-off-by: Nitin Garg <nitin.garg@freescale.com> (cherry picked from commit 70ad44e523680de67dd8b7a7505d7f27799980ee) (cherry picked from commit f20a65847577ff40dc7e3739a0bb69926885c734)
* MLK-12557 mx6ul: Enable syscounter as default timerYe Li2017-04-05-3/+18
| | | | | | | | | Use syscounter for i.MX6UL platform as default timer, not use GPT. Add a CONFIG_GPT_TIMER for selecting GPT. Using CONFIG_SYSCOUNTER_TIMER for selecting system counter. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 1c27c9ecf80b3cc63a7c9751ebfd11755f847b1d)
* ENGR00325255 pcie:enable pcie support on imx6sx sdYe Li2017-04-05-6/+106
| | | | | | | | | | | | | | | | | Enable pcie support in uboot on imx6sx sd boards - enable_pcie_clock should be call before ssp_en is set, since that ssp_en control the phy_ref clk gate, turn on it after the source of the pcie clks are stable. - add debug info - add rx_eq of gpr12 on imx6sx - there are random link down issue on imx6sx. It's pcie ep reset issue. solution:reset ep, then retry link can fix it. (cherry picked from commit ec78595a24b5ff1020baa97b6d6e79a3a3326307) Signed-off-by: Richard Zhu <r65037@freescale.com> Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 81fd30250110d72992758f08b66c07306126892b)
* ENGR00319965 pcie: mask the imx6sl outRichard Zhu2017-04-05-15/+20
| | | | | | | | | | imx6sl doesn't have the pcie module, mask the pcie related codes from imx6sl. Signed-off-by: Richard Zhu <r65037@freescale.com> (cherry picked from commit acaff11da33f8f0cb1521d3c48e64e7ed9a87bec) Signed-off-by: Peng Fan <Peng.Fan@freescale.com> (cherry picked from commit 48a4606ef575c72e16e31c167dce042fcb66191c)
* ENGR00319415 pcie: random link down issue after warm-rstRichard Zhu2017-04-05-0/+18
| | | | | | | | | | | | | | | | | | | | | There are about 0.02% percentage on some imx6q/dl/solo hw boards, random pcie link down when warm-reset is used. Make sure to clear the ref_ssp_en bit16 of gpr1 before warm-rst, and set ref_ssp_en after the pcie clks are stable to workaround it. rootcause: * gpr regisers wouldn't be reset by warm-rst, while the ref_ssp_en is required to be reset by pcie. (work-around in u-boot) * ref_ssp_en should be set after pcie clks are stable. (work-around in kernel) Signed-off-by: Richard Zhu <r65037@freescale.com> (cherry picked from commit 5cc825b12c6b86a22f1a6a0535b52cf3ee142e77) Signed-off-by: Peng Fan <Peng.Fan@freescale.com> (cherry picked from commit 6193cf4e3384a59e29546d13a67657f7faeafc9e) (cherry picked from commit 7b4aabeddffabca46d7d6e7ef2611de468a6b4f7)
* MLK-11064 imx: mx6qp: Adjust AQos settings for peripheralsYe.Li2017-04-05-0/+3
| | | | | | | | | | | To resolve USB camera bandwidth issue, the patch sets recommended AQoS setting from IC team value for peripheral and only on imx6qp. The address is: 0xbb0608, the value is: 0x80000201 Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit 11906c712a52e7a20caf71d7c5da4e951a59db29) (cherry picked from commit 5dcf073b8f2479a2adbb8d9fb03d9c9c70664e32)
* MLK-12534 mx6: shutdown vddpu and PCIE phy to save powerYe Li2017-04-05-0/+42
| | | | | | | | | | | | | | | | | | | Shutdown VDDPU and PCIE phy to save power. For PCIE, the i.MX6SL and i.MX6UL does not have this module, so don't need it. For VDDPU, the i.MX6UL does not have GPU, does not need it. And on i.MX6QP there is narrow window that PRE driver is ready but GPU driver probe later, and the later GPU driver turn on PU may cause 'PRE hang' issue. To simplify thing, do not turn off PU in u-boot. Reference: commit: 6b0787b726e2ff32210d742d93ecd3f4bb2ae402 commit: 4bd0032c0eba50fa0caf43f50f735a3cfbe36a8d Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 5c96ea91fe89c67991c929c9b39ffaa940d28391)
* MLK-12533 mx6sx: select OSC as uart's clk parentYe Li2017-04-05-0/+13
| | | | | | | | | | | As M4 is sourcing UART clk from OSC, to make UART work when M4 is enabled, need to select OSC as clk parent, 24M OSC is enough for debug UART in uboot. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Anson Huang <b20788@freescale.com> (cherry picked from commit b5e1b393192099e91c5cb75b69291c87eacb9f60) (cherry picked from commit 416dea861c2dd5a197bf2354069bba8415a20b12)
* MLK-12452-4 mx6sxsabreauto: Add secondary enet supportYe Li2017-04-05-7/+39
| | | | | | | Add configurations and board codes for second enet. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 4dfd06dc649615f8dd3e1ac8018a0a7109fc4147)
* MLK-12452-3 mx6sxsabresd: Add secondary enet supportYe Li2017-04-05-6/+38
| | | | | | | Add configurations and board codes for second enet. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit b646262f1f201e11e08968ddf88aeb8ab41fcf21)
* MLK-12452-1 FEC: Update fec driver to support two MDIOYe Li2017-04-05-1/+24
| | | | | | | | | | | | | | | | | | | | On i.MX6SX, 6UL and 7D, there are two enet controllers each has a MDIO port. Some boards share the MDIO port for the two enets. So introduce a configuration CONFIG_FEC_MXC_MDIO_BASE to indicate the MDIO port for sharing. In Kconfig, user needs enable CONFIG_FEC_MXC_SHARE_MDIO first to enter the CONFIG_FEC_MXC_MDIO_BASE. Without defining this configuration, the enet will uses own MDIO port. Also add this configurationfor FEC DM driver, since the ENET PHY currently does not support FDT. Modify the dev_id for DM driver, the first fec will set dev_id with 0, while second fec sets the dev_id with 1. So the MII bus name won't be duplicated. Then we can add two FEC devices from DTB. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 088afc073c480bd02208145bfb04259ccdf391c1)
* MLK-12439 mx6sxsabreauto: Enable GIS for the AI boardYe Li2017-04-05-0/+6
| | | | | | | | | Enable the GIS feature for i.MX6SX sabreauto board. Need to define the "gis=vadc" environment variable for the gis input. At default this variable is not set. Signed-off-by: Ye Li <ye.li@nxp.com> (cherry picked from commit 2271dcfee3500e96503a9fc59929e73167e3c4a2)
* ENGR00315894-81 gis: Add gis moduleYe.Li2017-04-05-1/+611
| | | | | | | | | | | Add gis module, current gis is support vadc input. Add power down function to lcdif driver. Signed-off-by: Sandor Yu <R01008@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit a007b00dd8ef9f773dfdebef0b1deb0990281793) (cherry picked from commit a31dcdafb0963381e7213c59f79a340ef27ec2e2) (cherry picked from commit 02dfe2e4af5f51d39a51542fb0e81f93faf505bc)
* ENGR00315894-80 pxp: Add pxp moduleYe.Li2017-04-05-0/+324
| | | | | | | | | | | | Add pxp module. Support csc between YUV444 and RGB888 and scaling. Signed-off-by: Sandor Yu <R01008@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit 4c6e1f9ed1b2f5c98a34502b44b6414593fdd290) Signed-off-by: Peng Fan <Peng.Fan@freescale.com> (cherry picked from commit 92295fafcdbaa3a3fe0a63ede15f896dfc9ce0b0) (cherry picked from commit 096a63e81a8c78b3f8bbc65a9d418aa032d62231)
* ENGR00315894-79 csi: Add csi moduleYe.Li2017-04-05-0/+425
| | | | | | | | | | | Add csi module. Signed-off-by: Sandor Yu <R01008@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit 854ae26758ec8132ef749b98645dd2f43b84e5e2) Signed-off-by: Peng Fan <Peng.Fan@freescale.com> (cherry picked from commit 5f133bd9420109951fd03bd5168801327e929c3b) (cherry picked from commit 16960e59fa3334162d2e2212ee4bc1e7f0c420a3)
* ENGR00315894-78 vadc: Add vadc moduleYe.Li2017-04-05-0/+603
| | | | | | | | | | | | Add vadc module. Both PAL and NTSC mode can work. Signed-off-by: Sandor Yu <R01008@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit 03c31ae30c1e81c99f6824221e4801433445e04a) Signed-off-by: Peng Fan <Peng.Fan@freescale.com> (cherry picked from commit b5d776ffc1519c16091736445b3217ffb7fcd7db) (cherry picked from commit 2377eb9fd299b76888f11faf76383b68e77bcc8a)
* ENGR00321299 gis: clean csi0 input mux set bit in GPRSandor Yu2017-04-05-0/+6
| | | | | | | | | | | | When gis enable in uboot, the CSI0 input mux select setting to vadc module, clean the bit when gis disabled. Signed-off-by: Sandor Yu <R01008@freescale.com> (cherry picked from commit ae66b17b7da3be50dc81ca636b67e8e879f52e26) (cherry picked from commit c83fd326e810c2fff44b8b02e78406d5d04c977c) Signed-off-by: Peng Fan <Peng.Fan@freescale.com> (cherry picked from commit d6e803ed5f51d31ebe7e9d178aa11f16401b7fc8) (cherry picked from commit 2065b417ae93436736e49ca66b66aa0791d003fe)
* ENGR00315894-77 mx6 soc: Add vadc power up/down functionYe.Li2017-04-05-0/+49
| | | | | | | | | | | Add vadc power up/down function. Signed-off-by: Sandor Yu <R01008@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com> (cherry picked from commit 96d990ef754a879f6ca9da4adf6e0be3d21cdc51) Signed-off-by: Peng Fan <Peng.Fan@freescale.com> (cherry picked from commit 01b88201aa86bef26a4254ac43aff90e99fd2c06) (cherry picked from commit d50b53f138dd3b4c463c80ac8e14f41ac0fdd415)
generated by cgit v1.1 at 2024-07-08 16:01:53 +0000