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| * | patman: Use Patch-cc: instead of Cc:Simon Glass2014-03-22-11/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a new Patch-cc: tag which performs the service now provided by the Cc: tag. The Cc: tag is interpreted by git send-email but ignored by patman. So now: Cc: patman does nothing. (git send-email can cc patches) Patch-cc: patman Cc's patch and removes this tag from the patch Signed-off-by: Simon Glass <sjg@chromium.org>
| * | sandbox: Enable CONFIG_CMD_LZMADEC in sandbox.hPatrice Bouchand2014-03-22-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | As Simon Glass requested it, here's a patch that enables CONFIG_CMD_LZMADEC in sandbox. Signed-off-by: Patrice Bouchand <pbfwdlist@gmail.com> Signed-off-by: Simon Glass <sjg@chromium.org>
| * | Add lzmadec commandPatrice Bouchand2014-03-22-0/+55
| |/ | | | | | | | | | | | | | | | | I needed to be able to uncompress lzma files. I did this command based on unzip command and propose it if it could help. Signed-off-by: Patrice Bouchand <pbfwdlist@gmail.com> Changed to work with sandbox Signed-off-by: Simon Glass <sjg@chromium.org>
* | arm64 patch: gicv3 supportDavid Feng2014-04-08-114/+297
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch add gicv3 support to uboot armv8 platform. Changes for v2: - rename arm/cpu/armv8/gic.S with arm/lib/gic_64.S - move smp_kick_all_cpus() from gic.S to start.S, it would be implementation dependent. - Each core initialize it's own ReDistributor instead of master initializeing all ReDistributors. This is advised by arnab.basu <arnab.basu@freescale.com>. Signed-off-by: David Feng <fenghua@phytium.com.cn>
* | bootstage: arm: fix fdt stashing codeMela Custodio2014-04-07-2/+1
| | | | | | | | | | | | The conditional is using a variable that is not defined. Signed-off-by: Rommel G Custodio <sessyargc+u-boot@gmail.com>
* | ARMv8: fix bug for flush data cache by set/wayLeo Yan2014-04-07-3/+1
| | | | | | | | | | | | | | | | | | When flush the d$ with set/way instruction, it need calculate the way's offset = log2(Associativity); but in current uboot's code, it use below formula to calculate the offset: log2(Associativity * 2 - 1), so finally it cannot flush data cache properly. Signed-off-by: Leo Yan <leoy@marvell.com>
* | armv8: Flush dcache before switching to EL2York Sun2014-04-07-0/+1
| | | | | | | | | | | | | | | | | | | | For ARMv8, U-boot has been running at EL3 with cache and MMU enabled. Without proper setup for EL2, cache and MMU are both disabled (out of reset). Before switching, we need to flush the dcache to make sure the data is in the main memory. Signed-off-by: York Sun <yorksun@freescale.com> Acked-by: David.Feng <fenghua@phytium.com.cn>
* | arm: vf610: fix double iomux configuration for vf610twr boardMarcel Ziswiler2014-04-07-1/+0
| | | | | | | | | | | | Get rid of double VF610_PAD_DDR_A15__DDR_A_15 iomux configuration. Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
* | arm: vf610: add enet1 supportMarcel Ziswiler2014-04-07-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch contains several changes required for second Ethernet (enet1/RMII1) port on vf610 - ANADIG PLL5 control definitions required for Ethernet RMII1 clock - Secondary Ethernet (enet1) MAC RMII1 base address definition - RMII1 iomux definitions - VF610_PAD_PTA6__RMII0_CLKOUT iomux definition required for internal (e.g. crystal-less) Ethernet clocking. Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com> [stefan@agner.ch: regrouped patch] Signed-off-by: Stefan Agner <stefan@agner.ch>
* | arm: vf610: add uart0 clock/iomux definitionsMarcel Ziswiler2014-04-07-0/+3
| | | | | | | | | | | | | | | | | | Add CCM_CCGR0_UART0_CTRL_MASK clock definition and add TX/RX iomux definitions for UART0 (aka. SCI0). Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com> [stefan@agner.ch: regrouped patch] Signed-off-by: Stefan Agner <stefan@agner.ch>
* | arm: vf610: fix anadig register structMarcel Ziswiler2014-04-07-25/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The anadig_reg structure started at the wrong offset (fixed by adding reserved_0x000[4]), was missing some reserved field required for alignment purpose (reserved_0x094[3] between pll4_denom and pll6_ctrl) and further contained a too short reserved field causing further miss- alignment (reserved_0x0C4[7]). Also, rename all the reserved fields and using a memory offset based scheme for. Discovered and tested by temporarily putting the following debug instrumentation into board_init(): struct anadig_reg *anadig = (struct anadig_reg *)ANADIG_BASE_ADDR; printf("&anadig->pll3_ctrl=0x%p\n", &anadig->pll3_ctrl); printf("&anadig->pll5_ctrl=0x%p\n", &anadig->pll5_ctrl); Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com> [stefan@agner.ch: regrouped patch] Signed-off-by: Stefan Agner <stefan@agner.ch>
* | build:arm: Remove setting of CROSS_COMPILE environment variableŁukasz Majewski2014-04-07-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After Kbuild introduction, the CROSS_COMPILE environment variable has been set to some default value (prefix arm-linux-). This shall be removed since it breaks building u-boot for native arm target (like qemu ARM). Moreover not all compilers have arm-linux- prefix. Additionally the u-boot cross compiles with CROSS_COMPILE= set explicitly- e.g.: CROSS_COMPILE=/ .... /arm-v7a-linux-gnueabi- make Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Cc: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD2014-04-07-1/+10
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| * | MX6: Enable ARM errata workaround 794072 and 761320Nitin Garg2014-04-07-0/+2
| | | | | | | | | | | | | | | | | | | | | Since MX6 is Cortex-A9 r2p10, enable software workaround for errata 794072 and 761320. Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
| * | ARM: Add workaround for Cortex-A9 errata 761320Nitin Garg2014-04-07-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | Full cache line writes to the same memory region from at least two processors might deadlock the processor. Exists on r1, r2, r3 revisions. Signed-off-by: Nitin Garg <nitin.garg@freescale.com> Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | ARM: Add workaround for Cortex-A9 errata 794072Nitin Garg2014-04-07-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | A short loop including a DMB instruction might cause a denial of service on another processor which executes a CP15 broadcast operation. Exists on r1, r2, r3, r4 revisions. Signed-off-by: Nitin Garg <nitin.garg@freescale.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
* | | armv8/cache: Change cache invalidate and flush functionYork Sun2014-04-07-20/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When SoC first boots up, we should invalidate the cache but not flush it. We can use the same function for invalid and flush mostly, with a wrapper. Invalidating large cache can ben slow on emulator, so we postpone doing so until I-cache is enabled, and before enabling D-cache. Signed-off-by: York Sun <yorksun@freescale.com> CC: David Feng <fenghua@phytium.com.cn>
* | | armv8/cache: Flush D-cache, invalidate I-cache for relocationYork Sun2014-04-07-6/+19
| | | | | | | | | | | | | | | | | | | | | | | | If D-cache is enabled, we need to flush it, and invalidate i-cache before jumping to the new location. This should be done right after relocation. Signed-off-by: York Sun <yorksun@freescale.com> CC: David Feng <fenghua@phytium.com.cn>
* | | armv8/cache: Consolidate setting for MAIR and TCRYork Sun2014-04-07-25/+19
| | | | | | | | | | | | | | | | | | | | | | | | Move setting for MAIR and TCR to cache_v8.c, to avoid conflict with sub-architecture. Signed-off-by: York Sun <yorksun@freescale.com> CC: David Feng <fenghua@phytium.com.cn>
* | | arm: Handle .gnu.hash section in ldscriptsAndreas Färber2014-04-07-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Avoids "could not find output section .gnu.hash" ld.bfd errors on openSUSE. Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* | | socfpga: Adding Clock Manager driverChin Liang See2014-04-07-1/+776
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | Clock Manager driver will be called to reconfigure all the clocks setting based on user input. The input are passed to Preloader through handoff files Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> CC: Pavel Machek <pavel@denx.de> Cc: Dinh Nguyen <dinguyen@altera.com> Acked-by: Pavel Machek <pavel@denx.de>
* | arm: mxs: Add support for generating signed BootStreamMarek Vasut2014-04-04-0/+72
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the groundwork for generating signed BootStream, which can be used by the HAB library in i.MX28. We are adding a new target, u-boot-signed.sb , since the process for generating regular non-signed BootStream is much easier. Moreover, the signed bootstream depends on external _proprietary_ _binary-only_ tool from Freescale called 'cst', which is available only under NDA. To make things even uglier, the CST or HAB mandates a kind-of circular dependency. The problem is, unlike the regular IVT, which is generated by mxsimage, the IVT for signed boot must be generated by hand here due to special demands of the CST. The U-Boot binary (or SPL binary) and IVT are then signed by the CST as a one block. But here is the problem. The size of the entire image (U-Boot, IVT, CST blocks) must be appended at the end of IVT. But the size of the entire image is not known until the CST has finished signing the U-Boot and IVT. We solve this by expecting the CST block to be always 3904B (which it is in case two files, U-Boot and the hand-made IVT, are signed in the CST block). Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-arm into masterStefano Babic2014-04-04-12163/+16626
|\ \ | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/cpu/arm926ejs/mxs/mxsimage.mx23.cfg arch/arm/cpu/arm926ejs/mxs/mxsimage.mx28.cfg Signed-off-by: Stefano Babic <sbabic@denx.de>
| * | config:trats2: Change u-boot's TEXT_BASE from 0x78100000 to 0x43e00000Łukasz Majewski2014-04-02-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The u-boot's image TEXT_BASE needs to be changed to 0x43e00000 from 0x78100000. This change provides compatibility with other trats2 (RD_PQ) devices (http://download.tizen.org/releases/system/). Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'Albert ARIBAUD2014-04-02-1/+1
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| | * | board: enable 32kHz RTC OSC at B&R boardsHannes Petermaier2014-03-31-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Since RTC-Clock is needed on all B&R boards, the OSC will be enabled wihtin SPL-stage. Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
| * | | ARM: tegra: make all I2C ports open-drainStephen Warren2014-03-26-16/+16
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I2C protocol requires open-drain IOs. Fix the Dalmore and Venice2 pinmux tables to configure the IOs correctly. Without this, Tegra may actively drive the lines high while an external device is actively driving the lines low, which can only lead to bad things. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | Merge branch 'u-boot/master' into 'u-boot-arm/master'Albert ARIBAUD2014-03-25-905/+4208
| |\ \ | | |/ | | | | | | | | | | | | | | | | | | Trivial merge conflict, needed to manually remove local_info as per commit 41364f0f. Conflicts: board/samsung/common/board.c
| | * sandbox: config: Enable cros_ec emulation and related itemsSimon Glass2014-03-17-5/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | Enable the Chrome OS EC emulation for sandbox along with LCD, sound expanded GPIOs and a few other options to make this work correctly. Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| | * sandbox: Add implementation of spi_setup_slave_fdt()Simon Glass2014-03-17-0/+13
| | | | | | | | | | | | | | | | | | This function is needed when CONFIG_OF_SPI is defined. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * sandbox: Add options to clean up temporary filesSimon Glass2014-03-17-11/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When jumping from one sandbox U-Boot to another in sandbox, the RAM buffer is preserved in the jump by using a temporary file. Add an option to tell the receiving U-Boot to remove this file when it is no longer needed. Similarly the old U-Boot image is left behind in this case. We cannot delete it immediately since gdb cannot then find its debug symbols. Delete it just before exiting. Together these changes ensure that temporary files are removed both for memory and U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * sandbox: Allow Ctrl-C to work in sandboxSimon Glass2014-03-17-8/+69
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is useful for Cltl-C to be handled by U-Boot as it is on other boards. But it is also useful to be able to terminate U-Boot with Ctrl-C. Add an option to enable signals while in raw mode, and make this the default. Add an option to leave the terminal cooked, which is useful for redirecting output. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * sandbox: Deal with conflicting getenv() for SDLSimon Glass2014-03-17-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Unfortunately SDL requires getenv() to operate, since it wants to figure out the display type. U-Boot has its own getenv() and they conflict. As a work-around use #define to resolve the conflict. A better but more complex solution might be to rename some U-Boot symbols at link time. SDL audio is not functional at present, likely due to a related issue. Note: Vic Yank wrote a script for this, filed in crbug.com/271125. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| | * sound: Move Samsung-specific code into its own fileSimon Glass2014-03-17-221/+220
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The i2s code is in fact Samsung-specific, but there might be other implementation. Move this code into its own file. This makes it slightly more obviously how to adjust the code to support another SoC, when someone takes this task on. Also drop non-FDT support, since it isn't used on Exynos 5. Tested-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| | * sandbox: Add LCD driverSimon Glass2014-03-17-4/+150
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a simple LCD driver which uses SDL to display the image. We update the image regularly, while still providing for reasonable performance. Adjust the common lcd code to support sandbox. For command-line runs we do not want the LCD to be displayed, so add a --show_lcd option to enable it. Tested-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| | * sandbox: Add a simple sound driverSimon Glass2014-03-17-0/+39
| | | | | | | | | | | | | | | | | | | | | Add a sound driver for sandbox, which uses SDL. Tested-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| | * sandbox: Add SDL library for LCD, keyboard, audioSimon Glass2014-03-17-0/+467
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SDL (Simple DirectMedia Layer - see www.libsdl.org) is a library which provides simple graphics and sound features. It works under X11 and also with a simple frame buffer interface. It is ideally suited to sandbox U-Boot since it fits nicely with the low-level feature set required by U-Boot. For example, U-Boot has its own font drawing routines, its own keyboard processing and just needs raw sound output. We can use SDL to provide emulation of these basic functions for sandbox. This significantly expands the testing that is possible with sandbox. Add a basic SDL library which we will use in future commits. Tested-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| | * sandbox: Add -j option to indicate a jump from a previous U-BootSimon Glass2014-03-17-1/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In order to support the 'go' command we allow the jumping U-Boot to pass its filename to the new U-Boot image. This can then be used to delete that image if required. Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| | * sandbox: Add os_jump_to_image() to run another executableSimon Glass2014-03-17-0/+108
| | | | | | | | | | | | | | | | | | | | | | | | For some tests it is useful to be able to run U-Boot again but pass on the same memory contents. Add a function to achieve this. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| | * cros_ec: Implement I2C pass-throughSimon Glass2014-03-17-2/+282
| | | | | | | | | | | | | | | | | | | | | | | | | | | The Chrome EC has a feature where you can access its I2C buses through a pass-through arrangement. Add a command to support this, and export the function for it also. Reviewed-by: Vadim Bendebury <vbendeb@google.com> Signed-off-by: Simon Glass <sjg@chromium.org>
| | * sandbox: Plumb in Chrome OS EC emulationSimon Glass2014-03-17-0/+30
| | | | | | | | | | | | | | | | | | Add board code to set up the Chrome OS EC on startup. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * cros_ec: sandbox: Add Chrome OS EC emulationSimon Glass2014-03-17-0/+599
| | | | | | | | | | | | | | | | | | | | | | | | Add a simple emulation of the Chrome OS EC for sandbox, so that it can perform various EC tasks such as keyboard handling. Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| | * cros_ec: Correct comparison between signed and unsigned numbersSimon Glass2014-03-17-16/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Due to signed/unsigned comparison, '< sizeof(struct)' does not do the right thing, since if ec_command() returns a -ve number we will consider this be success. Adjust all comparisons to avoid this problem. This error was found with sandbox, which gives a segfault in this case. On ARM we may instead silently fail. We should also consider turning on -Wsign-compare to catch this sort of thing in future. Reviewed-by: Andrew Chew <achew@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Tested-by: Andrew Chew <achew@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Jimmy Zhang <jimmzhang@nvidia.com>
| | * cros_ec: spi: Add support for EC protocol version 3Randall Spangler2014-03-17-0/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | | Protocol version 3 will be attempted first; if the EC doesn't support it, u-boot will fall back to the old protocol version (2). Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| | * cros_ec: Add base support for protocol v3Simon Glass2014-03-17-1/+164
| | | | | | | | | | | | | | | | | | | | | Protocol v2 was shipped with snow, link and spring. Protocol v3 is for pit and is targetted at SPI operation. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * cros_ec: Clean up multiple EC protocol supportRandall Spangler2014-03-17-47/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Version 1 protocols (without command version) were already no longer supported in cros_ec.c. This removes some dead code from the cros_ec_i2c driver. Version 2 protcols (with command version) are now called protocol_version=2, instead of cmd_version_is_supported=1. A subsequent change will introduce protocol version 3 for SPI. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Randall Spangler <rspangler@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| | * cros_ec: Sync up with latest Chrome OS EC versionSimon Glass2014-03-17-62/+321
| | | | | | | | | | | | | | | | | | The EC messages have been expanded and some parts have been renamed. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * cros_ec: Move #ifdef to permit flash region accessSimon Glass2014-03-17-1/+2
| | | | | | | | | | | | | | | | | | | | | Flash region access is not tied to having commands, so adjust the #ifdef to reflect this. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * cros_ec: Support systems with no EC interruptSimon Glass2014-03-17-4/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some systems do not have an EC interrupt. Rather than assuming that the interrupt is always present, and hanging forever waiting for more input, handle the missing interrupt. This works by reading key scans only until we get an identical one. This means the EC keyscan FIFO is empty. Tested-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
| | * cros_ec: Drop old EC version support from EC driverVadim Bendebury2014-03-17-89/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no need to support old style EC moving forward. Ultimately we should get rid of the check_version() API. For now just return error in case the EC does not seem to support the new API. Reviewed-by: Vadim Bendebury <vbendeb@google.com> Tested-by: Vadim Bendebury <vbendeb@google.com> Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
generated by cgit v1.1 at 2024-11-20 13:31:43 +0000