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* pm9263 converted to at91 soc accessAsen Dimov2010-04-30-145/+152
| | | | Signed-off-by: Asen Dimov <dimov@ronetix.at>
* at91: define matrix registers bit fieldsAsen Dimov2010-04-30-0/+138
| | | | Signed-off-by: Asen Dimov <dimov@ronetix.at>
* MX31: Removed erroneous board name from QONGStefano Babic2010-04-30-1/+1
| | | | | | | QONG is a module that can be installed on several boards, not only on the QONG-EVB manufactured by Dave srl. Signed-off-by: Stefano Babic <sbabic@denx.de>
* MX31: Add UBI support to QONG moduleStefano Babic2010-04-30-4/+9
| | | | | | The UBI/UBIFS support is added to the QONG module. Signed-off-by: Stefano Babic <sbabic@denx.de>
* MX31: Support 128MB RAM on QONG moduleStefano Babic2010-04-30-33/+103
| | | | | | | | | The QONG module can be downsized and delivered with 128MB instead of 256MB. The patch adds run time support for the two different memory configurations. Signed-off-by: Stefano Babic <sbabic@denx.de>
* MX31: Add support for NAND to QONG boardStefano Babic2010-04-30-23/+101
| | | | | | | | The NAND device is connected to the FPGA of the QONG board and not to the NFC controller. For this reason, the FPGA must be set and initialized before accessing to the NAND itself. Signed-off-by: Stefano Babic <sbabic@denx.de>
* MX31: add pin definitions for NAND controllerStefano Babic2010-04-30-0/+9
| | | | | | | Add pin definitions ralted to the NAND controller to be used to set up the pin multiplexer. Signed-off-by: Stefano Babic <sbabic@denx.de>
* MX31: add accessor function to get a gpioStefano Babic2010-04-30-0/+20
| | | | | | The patch adds an accessor function to get the value of a gpio. Signed-off-by: Stefano Babic <sbabic@denx.de>
* mx51evk: correct list of possible BOOT_FROM valuesStefano Babic2010-04-30-1/+1
| | | | Signed-off-by: Stefano Babic <sbabic@denx.de>
* mkimage: correct spelling error in imximageStefano Babic2010-04-30-1/+1
| | | | Signed-off-by: Stefano Babic <sbabic@denx.de>
* MX25 print arm clock instead of mpllclk on bootJohn Rigby2010-04-30-1/+1
| | | | | | | | | Replace call to imx_get_mpllclk with imx_get_armclk to show frequency of ARM core instead of mpll internal bus in print_cpuinfo. Signed-off-by: John Rigby <jcrigby@gmail.com> CC: Stefano Babic <sbabic@denx.de>
* configs/openrd_base.h: reordered macrosFrans Meulenbroeks2010-04-30-2/+2
| | | | | | | moved CONFIG_CMD_FAT to filesystem section swapped CONFIG_CMD_NAND and CONFIG_CMD_MII so they are alpha correct Signed-off-by: Frans Meulenbroeks <fransmeulenbroeks@gmail.com>
* configs/sheevaplug: added a few additional commandsFrans Meulenbroeks2010-04-30-5/+22
| | | | | | | | | | | | | | | | | This patch includes a few additional commands in the sheevaplug version of u-boot: - support for LONGHELP so you can get help messages - auto completion and command editing - ubi and mii support - ext2 filesystem (convenient if you have an ext2 from which you want to boot) - jffs2 and ubifs filesystems (if you want to use these in NAND) This also makes it more similar to openrd client. Side effect of this patch is that the code now needs 3 sectors i.s.o. 2 so an existing env is overwritten Signed-off-by: Frans Meulenbroeks <fransmeulenbroeks@gmail.com>
* Marvell GuruPlug Board SupportSiddarth Gore2010-04-30-0/+652
| | | | | | | | | | | | | | GuruPlug Standard: 1 Gb Ethernet, 2 USB 2.0 GuruPlug Plus: 2 Gb Ethernet, 2 USB 2.0, 1 eSATA, 1 uSD slot References: http://www.globalscaletechnologies.com/t-guruplugdetails.aspx http://plugcomputer.org This patch is for GuruPlug Plus, but it supports Standard version as well. Signed-off-by: Siddarth Gore <gores@marvell.com>
* Moved board specific values in config fileStefano Babic2010-04-30-1/+7
| | | | | | | | The lowlevel_init file contained some hard-coded values to setup the RAM. These board related values are moved into the board configuration file. Signed-off-by: Stefano Babic <sbabic@denx.de>
* MX51EVK: Remove CPLD related codeFabio Estevam2010-04-30-68/+0
| | | | | | There is no CPLD on MX51EVK board, so remove CPLD related function. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* arm, i.mx27: add support for magnesium board from projectiondesignHeiko Schocher2010-04-30-197/+335
| | | | | | | | | | | This patch adds support for the magnesium board from projectiondesign. This board uses i.MX27 SoC and has 8MB NOR flash, 128MB NAND flash, FEC ethernet controller integrated into i.MX27. As this port is based on the imx27lite port, common config options are collected in include/configs/imx27lite-common.h Signed-off-by: Heiko Schocher <hs@denx.de>
* arm, mx27: add support for SDHC1 pin initHeiko Schocher2010-04-30-0/+18
| | | | Signed-off-by: Heiko Schocher <hs@denx.de>
* SAMSUNG: make s5p common gpio functionsMinkyu Kang2010-04-30-105/+105
| | | | | | | | Because of s5pc1xx gpio is same as s5p seires SoC, move gpio functions to drvier/gpio/ and modify structure's name from s5pc1xx_ to s5p_. Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* SAMSUNG: serial: modify name from s5pc1xx to s5pMinkyu Kang2010-04-30-29/+29
| | | | | | | Because of other s5p series SoC will use these serial functions, modify function's name and structure's name. Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* pm9263: remove CONFIG_CMD_AUTOSCRIPTAsen Dimov2010-04-30-1/+0
| | | | Signed-off-by: Asen Dimov <dimov@ronetix.at>
* at91: add defines for RTT and GPBRAlexander Holler2010-04-30-0/+7
| | | | Signed-off-by: Alexander Holler <holler@ahsoftware.de>
* pm9261: remove CONFIG_CMD_AUTOSCRIPTAsen Dimov2010-04-30-1/+0
| | | | Signed-off-by: Asen Dimov <dimov@ronetix.at>
* pm9261 converted to at91 soc accessAsen Dimov2010-04-30-108/+130
| | | | Signed-off-by: Asen Dimov <dimov@ronetix.at>
* ARM Update mach-typestrix2010-04-30-12/+974
| | | | | | | | | | Fetched from http://www.arm.linux.org.uk/developer/machines/download.php And built with repo http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm commit 85b3cce880a19e78286570d5fd004cc3cac06f57 Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
* Merge branch 'master' of git://git.denx.de/u-boot-videoWolfgang Denk2010-04-28-0/+28
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| * MX31: Added LCD support for QONG moduleStefano Babic2010-04-27-0/+28
| | | | | | | | | | | | | | Added support for LCD and splash image to the QONG module. The supported display is VBEST-VGG322403. Signed-off-by: Stefano Babic <sbabic@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc83xxWolfgang Denk2010-04-28-35/+67
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| * mpc83xx: turn on icache in core initialization to improve u-boot boot timeKim Phillips2010-04-22-26/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | before, MPC8349ITX boots u-boot in 4.3sec: column1 is elapsed time since first message column2 is elapsed time since previous message column3 is the message 0.000 0.000: U-Boot 2010.03-00126-gfd4e49c (Apr 11 2010 - 17:25:29) MPC83XX 0.000 0.000: 0.000 0.000: Reset Status: 0.000 0.000: 0.032 0.032: CPU: e300c1, MPC8349E, Rev: 1.1 at 533.333 MHz, CSB: 266.667 MHz 0.032 0.000: Board: Freescale MPC8349E-mITX 0.032 0.000: UPMA: Configured for compact flash 0.032 0.000: I2C: ready 0.061 0.028: DRAM: 256 MB (DDR1, 64-bit, ECC off, 266.667 MHz) 1.516 1.456: FLASH: 16 MB 2.641 1.125: PCI: Bus Dev VenId DevId Class Int 2.652 0.011: 00 10 1095 3114 0180 00 2.652 0.000: PCI: Bus Dev VenId DevId Class Int 2.652 0.000: In: serial 2.652 0.000: Out: serial 2.652 0.000: Err: serial 2.682 0.030: Board revision: 1.0 (PCF8475A) 3.080 0.398: Net: TSEC1: No support for PHY id ffffffff; assuming generic 3.080 0.000: TSEC0, TSEC1 4.300 1.219: IDE: Bus 0: .** Timeout ** after, MPC8349ITX boots u-boot in 3.0sec: 0.010 0.010: U-Boot 2010.03-00127-g4b468cc-dirty (Apr 11 2010 - 17:47:29) MPC83XX 0.010 0.000: 0.010 0.000: Reset Status: 0.010 0.000: 0.017 0.007: CPU: e300c1, MPC8349E, Rev: 1.1 at 533.333 MHz, CSB: 266.667 MHz 0.017 0.000: Board: Freescale MPC8349E-mITX 0.038 0.020: UPMA: Configured for compact flash 0.038 0.000: I2C: ready 0.038 0.000: DRAM: 256 MB (DDR1, 64-bit, ECC off, 266.667 MHz) 0.260 0.222: FLASH: 16 MB 1.390 1.130: PCI: Bus Dev VenId DevId Class Int 1.390 0.000: 00 10 1095 3114 0180 00 1.390 0.000: PCI: Bus Dev VenId DevId Class Int 1.400 0.010: In: serial 1.400 0.000: Out: serial 1.400 0.000: Err: serial 1.400 0.000: Board revision: 1.0 (PCF8475A) 1.832 0.432: Net: TSEC1: No support for PHY id ffffffff; assuming generic 1.832 0.000: TSEC0, TSEC1 3.038 1.205: IDE: Bus 0: .** Timeout ** also tested on these boards (albeit with a less accurate boottime measurement method): seconds: before after 8349MDS ~2.6 ~2.2 8360MDS ~2.8 ~2.6 8313RDB ~2.5 ~2.3 #nand boot 837xRDB ~3.1 ~2.3 also tested on an 8323ERDB. v2: also remove the delayed icache enablement assumption in arch ppc's board.c, and add a CONFIG_MPC83xx define in the ITX config file for consistency (even though it was already being defined in 83xx' config.mk). Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: enable command line autocompletionKim Phillips2010-04-22-3/+17
| | | | | | | | | | | | because it's convenient. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: use "A" nomenclature only on mpc834x and mpc836x familiesKim Phillips2010-04-22-1/+3
| | | | | | | | | | | | | | | | | | marketing didn't extend their postpend-with-an-A naming strategy on rev.2's and higher beyond the first two 83xx families. This patch stops us from misreporting we're running e.g., on an MPC8313EA, when such a name doesn't exist. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: Use CONFIG_FSL_ESDHC to enable sdhc clkRini van Zetten2010-04-22-5/+5
| | | | | | | | | | | | | | | | | | | | | | Enable eSDHC Clock based on generic CONFIG_FSL_ESDHC define instead of a platform define. This will enable all the 83xx platforms to use sdhc_clk based on CONFIG_FSL_ESDHC. It's the same patch as commit 6b9ea08c5010eab5ad1056bc9bf033afb672d9cc for the ppc/85xx. Signed-off-by: Rini <rini@arvoo.nl> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc5xxxWolfgang Denk2010-04-27-93/+1911
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| * | mpc5121: pdm360ng: add coprocessor POSTAnatolij Gustschin2010-04-24-0/+145
| | | | | | | | | | | | | | | | | | Adds coprocessor communication POST code Signed-off-by: Anatolij Gustschin <agust@denx.de>
| * | mpc5121: add common post_word_load/store codeAnatolij Gustschin2010-04-24-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | Add common post_word_load/post_word_store routines for all mpc5121 boards. pdm360ng board POST support added by subsequent patch needs them. Signed-off-by: Anatolij Gustschin <agust@denx.de>
| * | mpc5121: add support for PDM360NG boardAnatolij Gustschin2010-04-24-6/+1307
| | | | | | | | | | | | | | | | | | | | | | | | PDM360NG is a MPC5121E based board by ifm ecomatic gmbh. Signed-off-by: Michael Weiss <michael.weiss@ifm.com> Signed-off-by: Detlev Zundel <dzu@denx.de> Signed-off-by: Anatolij Gustschin <agust@denx.de>
| * | mpc5121: determine RAM size using get_ram_size()Anatolij Gustschin2010-04-24-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | Configure CONFIG_SYS_MAX_RAM_SIZE address range in DDR Local Access Window and determine the RAM size. Fix DDR LAW afterwards using detected RAM size. Signed-off-by: Anatolij Gustschin <agust@denx.de>
| * | mpc512x: make MEM IO Control configuration a board config optionAnatolij Gustschin2010-04-24-5/+7
| | | | | | | | | | | | Signed-off-by: Anatolij Gustschin <agust@denx.de>
| * | mpc5121: add PSC serial communication routinesAnatolij Gustschin2010-04-24-0/+94
| | | | | | | | | | | | Signed-off-by: Anatolij Gustschin <agust@denx.de>
| * | mpc512x: add multi serial PSC supportAnatolij Gustschin2010-04-24-81/+323
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Extend mpc512x serial driver to support multiple PSC ports. Subsequent patches for PDM360NG board support make use of this functionality by defining CONFIG_SERIAL_MULTI in the board config file. Additionally the used PSC devices are specified by defining e.g. CONFIG_SYS_PSC1, CONFIG_SYS_PSC4 and CONFIG_SYS_PSC6. Support for PSC devices other than 1, 3, 4 and 6 is not added by this patch because these aren't used currently. In the future it can be easily added using DECLARE_PSC_SERIAL_FUNCTIONS(N) and INIT_PSC_SERIAL_STRUCTURE(N) macros in cpu/mpc512x/serial.c. Additionally you have to add code for registering added devices in serial_initialize() in common/serial.c. Signed-off-by: Anatolij Gustschin <agust@denx.de>
* | | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2010-04-27-62/+201
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| * | | ppc: Split MPC83xx SERDES code from MPC85xx/MPC86xx/QorIQKumar Gala2010-04-26-4/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MPC83xx SERDES control is different from the other FSL PPC chips. For now lets split it out so we can standardize on interfaces for determining of a device on SERDES is configured. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Kim Phillips <kim.phillips@freescale.com>
| * | | mpc85xx: Add the ability to set LCRR[CLKDIV] to improve R/W speed of flashLan Chunhe2010-04-26-1/+20
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Lan Chunhe <b25806@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | | 85xx: clean up the io_sel for PCI express of P1022Dave Liu2010-04-26-7/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | clean up the wrong io_sel for PCI express according to latest manual. Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | | 85xx/socrates: Remove NFS support to fit image size.Detlev Zundel2010-04-26-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes an overflow during the link phase. Signed-off-by: Detlev Zundel <dzu@denx.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | | 85xx: Fix compile warningKumar Gala2010-04-26-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | cpu.c: In function 'checkcpu': cpu.c:47: warning: unused variable 'gur' Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | | 85xx: Convert cpu_init_f code to use out_be32 for LBC registersKumar Gala2010-04-26-18/+18
| | | | | | | | | | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | | fsl_sata: Move the snoop bit to another placeDave Liu2010-04-26-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For P1022 SATA host controller, the data snoop bit of DW3 in PRDT is moved to bit28. Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | | fsl_sata: Add the workaround for errata SATA-A001Dave Liu2010-04-26-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After power on, the SATA host controller of P1022 Rev1 is configured in legacy mode instead of the expected enterprise mode. Software needs to clear bit[28] of HControl register to change to enterprise mode after bringing the host offline. Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | | fsl-ddr: Add extra cycle to turnaround timesDave Liu2010-04-26-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add an extra cycle turnaround time to read->write to ensure stability at high DDR frequencies. Signed-off-by: Dave Liu <daveliu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
generated by cgit v1.1 at 2024-11-07 17:05:17 +0000