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* arm1136: Remove redundant relocate_code() returnBenoît Thébaudeau2013-04-12-2/+0
| | | | Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
* arm: relocate_code() is no longer noreturnBenoît Thébaudeau2013-04-12-40/+18
| | | | | | | | | | Commit e05e5de7fae5bec79617e113916dac6631251156 made ARM's relocate_code() return to its caller, but it did not update its declaration accordingly. Fixing this function declaration fixes dropped C code following calls to relocate_code(). Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
* arm: start.S: Fix _TEXT_BASE for SPLBenoît Thébaudeau2013-04-12-4/+52
| | | | | | | | _TEXT_BASE must be set to CONFIG_SPL_TEXT_BASE for generic SPL, and to CONFIG_SYS_TEXT_BASE for non-SPL builds. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Reviewed-by: Tom Rini <trini@ti.com>
* nand: mxc: Use appropriate page number in syndrome functionsBenoît Thébaudeau2013-04-12-3/+3
| | | | | | | | | | | The syndrome functions should use the page number passed as argument instead of the page number saved upon NAND_CMD_READ0. This does not make any difference if the NAND_NO_AUTOINCR option is set, but otherwise this fixes accesses to the wrong pages. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Acked-by: Scott Wood <scottwood@freescale.com>
* nand: mxc: Fix debug trace in mxc_nand_read_oob_syndrome()Benoît Thébaudeau2013-04-12-1/+1
| | | | | | | | | | The page number indicated in the debug trace of mxc_nand_read_oob_syndrome() did not match the page being worked on. By the way, replace the GCC-specific __FUNCTION__ with __func__. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Acked-by: Scott Wood <scottwood@freescale.com>
* imx: mx53ard: Add support for NAND FlashBenoît Thébaudeau2013-04-12-0/+76
| | | | | | | | | | | Add support for the Samsung K9LAG08U0M NAND Flash (2-GiB MLC NAND Flash, 2-kiB pages, 256-kiB blocks, 30-ns R/W cycles, 1 CS) on mx53ard. eNFC_CLK_ROOT is set up with a cycle time of 37.5 ns (400 MHz / 3 / 5) for this board, which satisfies the 30-ns NF R/W cycle requirement. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
* imx: mx5: lowlevel_init: Simplify codeBenoît Thébaudeau2013-04-12-6/+2
| | | | | | | Don't use several instructions to build constant values. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Acked-by: Stefano Babic <sbabic@denx.de>
* nand: mxc: Add support for i.MX5Benoît Thébaudeau2013-04-12-15/+250
| | | | | | Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Acked-by: Scott Wood <scottwood@freescale.com> Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
* nand: mxc: Prepare to add support for i.MX5Benoît Thébaudeau2013-04-12-114/+97
| | | | | | | | | | | Add some abstraction to NFC definitions so that some parts of the current code can also be used for future i.MX5 code. Clean up a few things by the way. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Acked-by: Scott Wood <scottwood@freescale.com> Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
* mtd: nand: mxc_nand: Fix is_16bit_nand()Fabio Estevam2013-04-12-35/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | Currently is_16bit_nand() is a per SoC function and it decides the bus nand width by reading some boot related registers. This method works when NAND is the boot medium, but does not work if another boot medium is used. For example: booting from a SD card and then using NAND to store the environment variables, would lead to the following error: NAND bus width 16 instead 8 bit No NAND device found!!! 0 MiB Use CONFIG_SYS_NAND_BUSWIDTH_16BIT symbol to decide the bus width. If it is defined in the board file, then consider 16-bit NAND bus-width, otherwise assume 8-bit NAND is used. This also aligns with Documentation/devicetree/bindings/mtd/nand.txt, which states: nand-bus-width : 8 or 16 bus width if not present 8 Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Scott Wood <scottwood@freescale.com> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
* mtd: nand: Introduce CONFIG_SYS_NAND_BUSWIDTH_16BITFabio Estevam2013-04-12-5/+8
| | | | | | | | | | | | Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT option so that other NAND controller drivers could use it when a 16-bit NAND is deployed. drivers/mtd/nand/ndfc has CONFIG_SYS_NDFC_16BIT, so just rename it, so that other NAND drivers could reuse the same symbol. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Scott Wood <scottwood@freescale.com> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
* omap5_common.h: Use fallback CONFIG_SYS_BAUDRATE_TABLETom Rini2013-04-08-2/+1
| | | | | Cc: Sricharan R <r.sricharan@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
* omap5_uevm.h: Move uEVM-specific choices to omap5_uevm.hTom Rini2013-04-08-8/+25
| | | | | | | | | | | | The omap5_uevm platform has eMMC, and it makes sense to say that our default env storage shall reside there. Other platforms may not, so move this choice to the EVM config. In addition, we should provide some way to partition the flash for later usage, so take advantage of the GPT partition table support code and allow that to be setup with some reasonable defaults. Cc: Sricharan R <r.sricharan@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
* OMAP3/4/5/AM33xx: Correct logic for checking FAT or RAW MMCTom Rini2013-04-08-3/+17
| | | | | | | | | | | | | | | In the case of booting from certain peripherals, such as UART, we must not see what the device descriptor says for RAW or FAT mode because in addition to being nonsensical, it leads to a hang. This is why we have a test currently for the boot mode being within range. The problem however is that on some platforms we get MMC2_2 as the boot mode and not the defined value for MMC2, and in others we get the value for MMC2_2. This is required to fix eMMC booting on omap5_uevm. Tested on am335x_evm (UART, NAND, SD), omap3_beagle (NAND, SD on classic, SD only on xM rev C5) and omap5_uevm (SD, eMMC). Signed-off-by: Tom Rini <trini@ti.com>
* arm: omap4: Fix SDRAM AUTO DETECTIONLokesh Vutla2013-04-08-18/+16
| | | | | | | | | | | | | | Commit "8602114 omap: emif: configure emif only when required" breaks SDRAM_AUTO_DETECTION. The issue is dmm_init() depends on emif_sizes[](SDRAM Auto detection) done in do_sdram_init(). The above commit moves dmm_init() above do_sdram_init() because of which dmm_init() uses uninitialized emif_sizes[]. So instead of using global emif_sizes[], get sdram details locally and calculate emif sizes. Reported-by: Michael Cashwell <mboards@prograde.net> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* OMAP: Fix copy-paste bug that did not enable UART4 clockLubomir Popov2013-04-08-2/+2
| | | | | | | | | | | V2 fixes line wrap issue of the patch itself. UART3 was enabled twice instead of UART4. One more cosmetic change in a comment on EMIF clock. Signed-off-by: Lubomir Popov <lpopov@mm-sol.com> Reviewed-by: R Sricharan <r.sricharan@ti.com>
* doc/feature-removal-schedule.txt: Add CONFIG_SYS_(CLOCKS|PADS)_ENABLE_ALLTom Rini2013-04-08-0/+16
| | | | | | | | We shall remove these OMAP4/5-specific options in v2013.07, barring insufficient progress on the kernel side. Cc: Sricharan R <r.sricharan@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
* ARM: OMAP4/5: Make bootz as the default boot commandSRICHARAN R2013-04-08-4/+4
| | | | | | | | | | | | So with OMAP added to multi platform kernel, the uImage no more contains a valid load address. With the uboot already supporting zImage, change the default boot command to bootz instead. Acked-by: Nishanth Menon <nm@ti.com> Signed-off-by: Sricharan R <r.sricharan@ti.com> Tested-by: Nishanth Menon <nm@ti.com>
* ARM: OMAP4/5: Change the default boot command to work with device treeSRICHARAN R2013-04-08-6/+36
| | | | | | | | | | | Now with kernel moving to all device tree, the default boot command is changed to pass the device tree blob. Also, adding the findfdt command to get the dt-blob based on the board. Thanks to Tom Rini <trini@ti.com> for suggesting this. Signed-off-by: Sricharan R <r.sricharan@ti.com>
* omap5: Allow use of a plain text env fileNishanth Menon2013-04-08-3/+13
| | | | | | | | | | | | | | | | | | | | | | | | | For production systems it is better to use script images since they are protected by checksums and carry valuable information like name and timestamp. Also, you can't validate the content passed to env import. But for development, it is easier to use the env import command and plain text files instead of script-images. Since both OMAP5evm/uevm boards are used primarily for development, we allow U-Boot to load env var from a text file in case that an boot.scr script-image is not present. The variable uenvcmd (if existent) will be executed (using run) after uEnv.txt was loaded. If uenvcmd doesn't exist the default boot sequence will be started. Inspired by commit: d70f54808dfa83b574e1239c3eccbcf3317343e1 (omap4: allow the use of a plain text env file instead boot scripts) Signed-off-by: Sricharan R <r.sricharan@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Tested-by: Sricharan R <r.sricharan@ti.com>
* ARM: OMAP5: Set fdt_high to enable booting with Device treeSRICHARAN R2013-04-08-0/+1
| | | | | | | | | | | | While booting with dt blob, if fdt_high is not set to 0xffffffff, the dt blob gets relocated to a high ram address, which the kernel is not able to use without HIGHMEM. So set it to 0xffffffff to avoid the issue. Acked-by: Nishanth Menon <nm@ti.com> Signed-off-by: Sricharan R <r.sricharan@ti.com> Tested-by: Nishanth Menon <nm@ti.com>
* ARM: OMAP5: Rename omap5_evm to omap5_uevmSRICHARAN R2013-04-08-1/+1
| | | | | | | | | The omap5-uevm is the reference board name for OMAP5 soc based platform. So rename it accordingly. Acked-by: Nishanth Menon <nm@ti.com> Signed-off-by: Sricharan R <r.sricharan@ti.com> Tested-by: Nishanth Menon <nm@ti.com>
* omap2420-h4: Fix get_timer() and CONFIG_SYS_HZHunter, Jon2013-04-08-3/+7
| | | | | | | The function get_timer() should return time in ms and CONFIG_SYS_HZ should be set to 1000 by default. Fix both of these items. Signed-off-by: Jon Hunter <jon-hunter@ti.com>
* omap2420-h4: Add device tree supportHunter, Jon2013-04-08-0/+1
| | | | | | Enable device-tree support for the omap2420-h4 board. Signed-off-by: Jon Hunter <jon-hunter@ti.com>
* omap2420-h4: Fix booting from NOR flashHunter, Jon2013-04-08-19/+6
| | | | | | | | | | | | | | | | The omap2420-h4 board is using a RAM based address as the linker location for code. This is causing several problems when attempting to run the latest u-boot code base on this board from flash. Update the default linker location for code to be in NOR flash. Please note that OMAP maps the NOR flash to address 0x08000000 by default and so use this as the default address for the NOR flash. Also remove legacy code that attempts to calculate where in flash the sdata structure, that holds the memory interface configuration data, is located. By changing the default linker location for code to flash this is no longer necessary. Signed-off-by: Jon Hunter <jon-hunter@ti.com>
* omap2420-h4: Fix DRAM initialisationHunter, Jon2013-04-08-6/+18
| | | | | | | | | | The size of the DRAM for the omap2420-h4 board is getting setup in the dram_init() function. However, for the current u-boot release this is too late and needs to be done in dram_init_banksize(). Therefore, add a dram_init_banksize() function for the omap2420-h4 board and setup the DRAM size there. Signed-off-by: Jon Hunter <jon-hunter@ti.com>
* tricorder: enable hw assisted BCH8 in SPL and u-bootAndreas Bießmann2013-04-08-4/+9
| | | | | | | | Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Tom Rini <trini@ti.com> Cc: Thomas Weber <weber@corscience.de> Cc: Ilya Yanok <ilya.yanok@cogentembedded.com> Cc: Scott Wood <scottwood@freescale.com>
* omap_gpmc: add support for hw assisted BCH8Andreas Bießmann2013-04-08-92/+305
| | | | | | | | | | | | | | | | | | | | | | The kernel states: ---8<--- The OMAP3 GPMC hardware BCH engine computes remainder polynomials, it does not provide automatic error location and correction: this step is implemented using the BCH library. --->8--- And we do so in u-boot. This implementation uses the same layout for BCH8 but it is fix. The current provided layout does only work with 64 Byte OOB. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Tom Rini <trini@ti.com> Cc: Ilya Yanok <ilya.yanok@cogentembedded.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Mansoor Ahamed <mansoor.ahamed@ti.com> Cc: Thomas Weber <thomas.weber.linux@googlemail.com>
* omap_gpmc: change nandecc commandAndreas Bießmann2013-04-08-36/+56
| | | | | | | | | | | | | With uppcoming BCH support on OMAP devices we need to decide between differnt algorithms when switching the ECC engine. Currently we support 1-bit hammign and 8-bit BCH on HW backend. In order to switch between differnet ECC algorithms we need to change the interface of omap_nand_switch_ecc() also. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Tom Rini <trini@ti.com> Cc: Thomas Weber <thomas.weber.linux@googlemail.com>
* omap3/omap_gpmc.h: add ooblayout for BCH8 as in kernelAndreas Bießmann2013-04-08-0/+17
| | | | | | | | | | | | This patch adds BCH8 ooblayout for NAND as provided by 0e618ef0a6a33cf7ef96c2c824402088dd8ef48c in linux kernel. This Layout is currently only provided for 64 byte OOB. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Tom Rini <trini@ti.com> Cc: Ilya Yanok <ilya.yanok@cogentembedded.com> Cc: Scott Wood <scottwood@freescale.com> Reviewed-by: Tom Rini <trini@ti.com>
* asm/omap_gpmc.h: consolidate common definesAndreas Bießmann2013-04-08-118/+92
| | | | | | | | | | | | | arch/arm/include/asm/arch-am33xx/omap_gpmc.h and arch/arm/include/asm/arch-omap3/omap_gpmc.h are almost the same, consolidate the common parts into a new header. Introduce a new asm/omap_gpmc.h which defines the command part and pulls in the architecture specific one. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Tom Rini <trini@ti.com> Reviewed-by: Tom Rini <trini@ti.com>
* omap3/cpu.h: add BCH supportAndreas Bießmann2013-04-08-0/+6
| | | | | | | | | | This patch adds the BCH result registers to register mapping for OMAP3 gpmc. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Tom Rini <trini@ti.com> Cc: Ilya Yanok <ilya.yanok@cogentembedded.com> Cc: Scott Wood <scottwood@freescale.com> Reviewed-by: Tom Rini <trini@ti.com>
* omap3_beagle: Flush UART3 xmit on enable if TEMT is brokenManfred Huber2013-04-08-13/+16
| | | | | | | | | | | | Flush UART3 xmit on enable if TEMT is broken On some OMAP3 devices when UART3 is configured for boot mode before SPL starts only THRE bit is set. We have to empty the transmitter before initialization starts. This patch avoids the use of CONFIG_SYS_NS16550_BROKEN_TEMT. Signed-off-by: Manfred Huber <man.huber@arcor.de> Tested-by: Javier Martinez Canillas <javier@dowhile0.org> Tested-by: Andreas Bießmann <andreas.devel@googlemail.com>
* am335x: Enable MMC1 clockTom Rini2013-04-08-0/+5
| | | | | | | | We must not assume ROM has enabled the clock for MMC1. Reported-by: Koen Kooi <koen@dominion.thruhere.net> Signed-off-by: Tom Rini <trini@ti.com> Acked-by: Peter Korsgaard <jacmet@sunsite.dk>
* pcm051: Enable DDR PHY dynamic power down bitLars Poeschel2013-04-08-1/+2
| | | | | | | | | | | This is done already for am335x in 59dcf970d11ebff5d9f4bbbde79fda584e9e7ad4 and also applies for pcm051. It powers down the IO receiver when not performing read which helps reducing the overall power consuption in low power states (suspend/standby). Signed-off-by: Lars Poeschel <poeschel@lemonage.de>
* musb: set MUSB speed based on CONFIGBin Liu2013-04-08-1/+3
| | | | | | | | Do not config MUSB to highspeed mode if CONFIG_USB_GADGET_DUALSPEED is not set, in which case Ether gadget only operates in fullspeed. Reviewed-by: Tom Rini <trini@ti.com> Signed-off-by: Bin Liu <b-liu@ti.com>
* musb: am335x: disable bulk split-combine featureBin Liu2013-04-08-0/+6
| | | | | | | | | | | | | | | | | | | On TI AM335x devices, MUSB has bulk split/combine feature enabled in the ConfigData register, but the current MUSB driver does not support it yet. Therefore, disable the feature for now, until the driver adds the support. One usecase which is broken because of this feature is that Ether gadget stops working in Fullspeed mode (by un-defining CONFIG_USB_GADGET_DUALSPEED) After desabled this feature, MUSB driver send packets in proper size (no more than 64 bytes) in Fullspeed mode. This has been validated with Ether gadget in Fullspeed mode on AM335x EVM. Signed-off-by: Bin Liu <b-liu@ti.com>
* logo: update to the new logo for ATMELJosh Wu2013-04-05-0/+0
| | | | | | | Atmel change to new logo since 2012. This patch update the logo to new one. Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'Albert ARIBAUD2013-04-04-241/+1449
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| * exynos: change indentation of defines in cpu.hMinkyu Kang2013-04-04-3/+3
| | | | | | | | | | | | Fix the indentation of some defines by tab. Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * Exynos: pwm: Remove dead code of function exynos5_get_pwm_clkAkshay Saraswat2013-04-01-21/+0
| | | | | | | | | | | | | | | | | | As we shall now be using clock_get_periph_rate function. We find no reason for keeping code in function exynos5_get_pwm_clk. Hence, removing it. Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * Exynos: pwm: Use generic api to get pwm clk freqPadmavathi Venna2013-04-01-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Use generic api to get the pwm clock frequency Test with command "sf probe 1:0; time sf read 40008000 0 1000". Try with different numbers of bytes and see that sane values are obtained Build and boot U-boot with this patch, backlight works properly. Signed-off-by: Padmavathi Venna <padma.v@samsung.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * Exynos: clock: Correct pwm source clk selectionPadmavathi Venna2013-04-01-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | MPLL is selected as the source clk of pwm by default Test with command "sf probe 1:0; time sf read 40008000 0 1000". Try with different numbers of bytes and see that sane values are obtained Build and boot U-boot with this patch, backlight works properly. Signed-off-by: Padmavathi Venna <padma.v@samsung.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * Exynos: clock: Add generic api to get the clk freqPadmavathi Venna2013-04-01-0/+159
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add generic api to get the frequency of the required peripherial. This API gets the source clock frequency and returns the required frequency by dividing with first and second dividers based on the requirement. Test with command "sf probe 1:0; time sf read 40008000 0 1000". Try with different numbers of bytes and see that sane values are obtained Build and boot U-boot with this patch, backlight works properly. Signed-off-by: Padmavathi Venna <padma.v@samsung.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * Exynos: Add peripherial id for pwmPadmavathi Venna2013-04-01-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add peripherial id for pwm inorder to support generic api to get the clk frequency Test with command "sf probe 1:0; time sf read 40008000 0 1000". Try with different numbers of bytes and see that sane values are obtained Build and boot U-boot with this patch, backlight works properly. Signed-off-by: Padmavathi Venna <padma.v@samsung.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * Exynos: Tidy up the pwm_config function in the exynos pwm driverGabe Black2013-04-01-16/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some small fixes in the exynos pwm driver: 1. NS_IN_HZ is non-sensical since these are not compatible units. This constant actually describes the number of nanoseconds in a second. Renamed it to NS_IN_SEC. Also dropped the unnecessary parenthesis. 2. The variable "period" is not used to hold a period, it's used to hold a frequency. Renamed it to "frequency". 3. tcmp is an unsigned value, so (tcmp < 0) will never be true and the if which checks that condition will never execute. Also, there should be no problem if the pwm never switches, so there's no reason to subtract one from tcmp and therefore no reason to compare it against zero. Removed both ifs. If they weren't removed, tcmp should be a signed value. 4. Add a check for a 0 period. Test with command "sf probe 1:0; time sf read 40008000 0 1000". Try with different numbers of bytes and see that sane values are obtained Build and boot U-boot with this patch, backlight works properly. Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * Exynos: Avoid a divide by zero by specifying a non-zero period for pwm 4Gabe Black2013-04-01-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The pwm_config function in the exynos pwm driver divides by its period period parameter. A function was calling pwm_config with a 0ns period and a 0ns duty cycle. That doesn't actually make any sense physically, and results in a divide by zero in the driver. This change changes the parameters to be a 100000ns period and duty cycle. Test with command "sf probe 1:0; time sf read 40008000 0 1000". Try with different numbers of bytes and see that sane values are obtained Build and boot U-boot with this patch, backlight works properly. Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * Exynos: pwm: Fix two bugs in the exynos pwm configuration codeGabe Black2013-04-01-10/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | First, the "div" value was being used incorrectly to compute the frequency of the PWM timer. The value passed in is a constant which reflects the value that would be found in a configuration register, 0 to 4. That should correspond to a scaling factor of 1, 2, 4, 8, or 16, 1 << div, but div + 1 was being used instead. Second, the reset value of the timers were being calculated to give an overall frequency, thrown out, and set to a maximum value. This was done so that PWM 4 could be used as the system clock by counting down from a high value, but it was applied indiscriminantly. It should at most be applied only to PWM 4. This change also takes the opportunity to tidy up the pwm_init function. Test with command "sf probe 1:0; time sf read 40008000 0 1000". Try with different numbers of bytes and see that sane values are obtained Build and boot U-boot with this patch, backlight works properly. Signed-off-by: Gabe Black <gabeblack@google.com> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * Exynos: Add timer_get_us functionChe-Liang Chiou2013-04-01-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | timer_get_us returns the time in microseconds since a certain reference point of history. However, it does not guarantee to return an accurate time after a long period; instead, it wraps around (that is, the reference point is reset to some other point of history) after some periods. The frequency of wrapping around is about an hour (or 2^32 microseconds). Test with command "sf probe 1:0; time sf read 40008000 0 1000". Try with different numbers of bytes and see that sane values are obtained Signed-off-by: Che-Liang Chiou <clchiou@chromium.org> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * Exynos: Change get_timer() to work correctlySimon Glass2013-04-01-62/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present get_timer() does not return sane values. It should count up smoothly in milliscond intervals. We can change the PWM to count down at 1MHz, providing a resolution of 1us and a range of about an hour between required get_timer() calls. Test with command "sf probe 1:0; time sf read 40008000 0 1000". Try with different numbers of bytes and see that sane values are obtained Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Akshay Saraswat <akshay.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
generated by cgit v1.1 at 2024-12-29 09:02:13 +0000