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* powerpc/85xx: Add support for 4th PCI controller on corenet_dsKumar Gala2010-10-07-1/+35
| | | | | | | We configure the controller but dont have virtual address space thus any devices on the 4th controller are not accessible in u-boot. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/corenet_ds: Various updates to initial env cfgEmil Medve2010-10-07-6/+9
| | | | | | | | | | | * Make the U-Boot update command sequence conditional. Helps prevent accidental erasing if an upload or previous step fails * Make it easier to update other FLASH banks * Enable DDR controller cache line interleaving and bank cs0/cs1 by default Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com> Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fsl: verify writes to the MAC address EEPROMTimur Tabi2010-10-07-1/+17
| | | | | | | | | | | | Update the code which writes to the on-board EEPROM so that it can detect if the write failed because the EEPROM is write-protected. Most of the 8xxx-class Freescale reference boards use an AT24C02 EEPROM to store MAC addresses and similar information. With this patch, if the EEPROM is protected, the "mac save" command will display an error message indicating that the write has not succeeded. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* p1022ds: add audclk hwconfig setting to enable codec reference clockTimur Tabi2010-10-07-9/+80
| | | | | | | | | | | | | | | | The Freescale P1022DS can use either a 12.288MHz or a 11.2896MHz reference clock for the audio codec, but by default both are disabled. Add a 'audclk' hwconfig option that allows the user to choose which clock he wants. The 12.288MHz clock allows the codec to use sampling rates of 16, 24, 32, 48, 64, and 96KHz. The 11.2896 clock allows 14700, 22050, 29400, 44100, 58800, and 88200Hz. Also configure a pin muxing to select some SSI signals, which will disable I2C1. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* mpc8569mds: fix some ddr settingsHaiying Wang2010-10-07-3/+13
| | | | | | | Enable half drive strength, set RTT to 60Ohm and set write leveling override. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* mpc8569mds: fix consuming long time while relocating code.Haiying Wang2010-10-07-6/+38
| | | | | | | | | | | | The original code maps boot flash as non-cacheable region. When calling relocate_code in flash to copy u-boot from flash to ddr, every loop copy command is read from flash. The flash read speed will be the bottleneck, which consuming long time to do this operation. To resovle this, map the boot flash as write-through cache via tlb. And set tlb to remap the flash after code executing in ddr, to confirm flash erase operation properly done. Signed-off-by: Kai.Jiang <Kai.Jiang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* mpc8569mds: fix CONFIG_ENV_SIZEHaiying Wang2010-10-07-2/+2
| | | | | | | | | | | CONFIG_ENV_SIZE of MPC8569MDS was wrongly set to CONFIG_ENV_SECT_SIZE which is 128KB, so it took longer time to do crc32 calculation for ENV than it should do. It causes the bootup for MPC8569MDS significantly slow. This patch fixs it to 0x2000(8KB), also fix the comment for CONFIG_ENV_SECT_SIZE to correct size. Signed-off-by: Kai.Jiang <Kai.Jiang@freescale.com Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Merge branch 'master' of git://git.denx.de/u-boot-blackfinWolfgang Denk2010-10-05-23567/+11281
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| * Blackfin: otp: fix build after constification of args[]Mike Frysinger2010-10-02-6/+7
| | | | | | | | | | | | | | | | The OTP code does a little shuffling of arguments that aren't really necessary, so use a local variable instead to fix build errors now that the args[] parameter is const. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: bf537-pnav: increase monitor lenMike Frysinger2010-10-02-1/+1
| | | | | | | | | | | | | | Building this board for parallel flash fills up the bss section and thus fails to link, so bump up the monitor size a bit. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: bf527-ad7160-eval: fix GPIO CS defineMike Frysinger2010-10-02-1/+1
| | | | | | | | | | | | Rather than use a hardcoded "7", use the new Blackfin global define. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: bf548-ezkit: bump SPI flash size upMike Frysinger2010-10-02-1/+5
| | | | | | | | | | | | | | | | The current size used (256KiB) is smaller than the LDR created for the bf548-ezkit, so 'run update' doesn't work correctly. So bump up the size a bit by making this flexible per-board config. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: fix MMC init output alignmentMike Frysinger2010-10-02-1/+1
| | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: blackvme: new board portWojtek Skulski2010-10-02-1/+368
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The board includes: * ADSP-BF561 rev. 0.5 * 32-bit SDRAM (2 * MT48LC16M16A2TG or MT48LC32M16A2TG) * Gigabit Ether AX88180 (ASIX) + 88E1111 rev. B2 (Marvell) * SPI boot flash on PF2 (M25P64 8MB, or M25P128 16 MB) * FPGA boot flash on PF3 (M25P64 8MB, or M25P128 16 MB) * Spartan6-LX150 (memory-mapped; both PPIs also connected) * See http://www.skutek.com/ Signed-off-by: Wojtek Skulski <skulski@pas.rochester.edu> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: propagate target cpu defines when building embedded envMike Frysinger2010-10-02-0/+3
| | | | | | | | | | | | | | | | | | | | | | Since we're no longer extracting the env from the target ELF file (since upstream wouldn't take that change), we're back to the problem of cpu defines not properly propagating to the env setup stage. So the embedded env built by the host compiler doesn't match the one that is linked into the u-boot env. Reported-by: Vivi Li <vivi.li@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: cmd_gpio: accept upper case pin namesMike Frysinger2010-10-02-2/+3
| | | | | | | | | | | | | | The intention all along was to accept pin names irrelevant of their case. But I guess I forgot to test/implement support for that. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: bf526-ezbrd: enable BootROM-OOB layout when booting from NANDMike Frysinger2010-10-02-2/+3
| | | | | | | | | | | | | | | | | | | | We need to use the Blackfin BootROM-specific OOB layout when we boot out of NAND as that is what the on-chip ROM expects. Also need to increase the monitor size a little to accommodate the extra NAND code overhead. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: adi config: enable nand lock/unlock supportMike Frysinger2010-10-02-0/+1
| | | | | | | | | | | | | | | | We use the lock/unlock options in our default nand code, so enabl support for the options. Reported-by: Vivi Li <vivi.li@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: bct-brettl2: new board portPeter Meerwald2010-10-02-0/+590
| | | | | | | | | | Signed-off-by: Peter Meerwald <pmeerw@pmeerw.net> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: adi config: allow boards to tweak a little moreMike Frysinger2010-10-02-8/+14
| | | | | | | | | | | | Let people easily override bootdelay and network settings. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: cmd_gpio: return gpio value to callerMike Frysinger2010-10-02-1/+1
| | | | | | | | | | | | | | Make the GPIO command usable in a scripting environment by returning the GPIO value rather than always 0. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: bf527-sdp: new board portMike Frysinger2010-10-02-0/+245
| | | | | | | | | | | | Support for the Blackfin System Development Platform (SDP) base module. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: adi config: add a hook for boards to append the envMike Frysinger2010-10-02-1/+5
| | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: adi config: add an "all spi flashes" option to unify board listsMike Frysinger2010-10-02-12/+15
| | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: support a 3rd gpio cfi pinPeter Meerwald2010-10-02-1/+14
| | | | | | | | | | Signed-off-by: Peter Meerwald <pmeerw@pmeerw.net> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: cmd_gpio: document/extend input sub-optionMike Frysinger2010-10-02-14/+13
| | | | | | | | | | | | | | | | The input sub command was missing from the help text, and it didn't show the actual value currently read on the GPIO. This allows people to read the value of input pins. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: move CONFIG_BFIN_CPU to board config.mkMike Frysinger2010-10-02-34/+52
| | | | | | | | | | | | | | | | | | The CONFIG_BFIN_CPU option is largely used in the build system, so move it out of the board config.h and into the board config.mk. It'd be nice to keep everything in the config.h, but the patch to extract that value early was rejected. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: bf561: merge headersMike Frysinger2010-10-02-1930/+1906
| | | | | | | | | | | | | | Only the BF561 port was using the common dual core headers, so merge them into the BF561 specific headers. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: bf533: merge headersMike Frysinger2010-10-02-1342/+1293
| | | | | | | | | | | | | | Only the BF533 port was using the common extended headers, so merge them into the BF533 specific headers. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: unify core MMRsMike Frysinger2010-10-02-3456/+350
| | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: bf52x: unify arch header duplicationMike Frysinger2010-10-02-2316/+6
| | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: bf537: unify arch header duplicationMike Frysinger2010-10-02-295/+6
| | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: punt old *p style volatile MMR definesMike Frysinger2010-10-02-13223/+0
| | | | | | | | | | | | These are unused now, so punt them to clean things up. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: bf527-ad7160-eval: convert from old style MMR macrosMike Frysinger2010-10-02-1/+1
| | | | | | | | | | | | | | The old MMR defines are being scrubbed, so convert the driver to use the new standard helper macros. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: cm-bf548: video: convert from old style MMR macrosMike Frysinger2010-10-02-11/+12
| | | | | | | | | | | | | | The old MMR defines are being scrubbed, so convert the driver to use the new standard helper macros. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: bf548-ezkit: video: convert from old style MMR macrosMike Frysinger2010-10-02-10/+11
| | | | | | | | | | | | | | The old MMR defines are being scrubbed, so convert the driver to use the new standard helper macros. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: bf527-ezkit: video: convert from old style MMR macrosMike Frysinger2010-10-02-36/+40
| | | | | | | | | | | | | | The old MMR defines are being scrubbed, so convert the driver to use the new standard helper macros. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: bf537-stamp: post: update old MMR style macrosMike Frysinger2010-10-02-131/+75
| | | | | | | | | | | | | | | | | | The old MMR defines are being scrubbed, so convert the driver to use the new standard helper macros. For the GPIO MMR usage, convert to the new GPIO framework. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: bfin_mac: convert from old style MMR macrosMike Frysinger2010-10-02-32/+36
| | | | | | | | | | | | | | The old MMR defines are being scrubbed, so convert the driver to use the new standard helper macros. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: punt headers for non-existent BF541Mike Frysinger2010-10-02-448/+0
| | | | | | | | | | | | There is no BF541 processor variant, so punt headers for it. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: unify gpio cfi implementationsMike Frysinger2010-10-02-216/+26
| | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: bfin_sdh: clean up send_cmdMike Frysinger2010-10-02-10/+15
| | | | | | | | | | | | | | Simplify the command setup and status checking steps, and add a proper timeout to the status polling code to avoid possible infinite hangs. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: bfin_spi: add optional DMA supportMike Frysinger2010-10-02-27/+203
| | | | | | | | | | | | | | | | This moves the last piece from the old spi_flash driver to the new SPI framework -- optional DMA RX support. This typically cuts speeds by ~40% at the cost of additional ~300 bytes. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: add support for BF51x partsMike Frysinger2010-10-02-0/+2498
| | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: add support for BF538/BF539 processorsMike Frysinger2010-10-02-0/+3464
| | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-ppc4xxWolfgang Denk2010-10-05-708/+1804
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| * | ppc44x: config GPIOs for USB on canyonlands boardRupjyoti Sarmah2010-10-04-10/+13
| | | | | | | | | | | | | | | | | | | | | | | | The GPIO 16 and 19 reconfiguration should be done once USB is initialized. So moved the reconfiguration to the USB init function. Signed-off-by: Rupjyoti Sarmah <rsarmah@apm.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * | ppc4xx: Remove some testing hacks from ppc4xx.hStefan Roese2010-10-04-17/+0
| | | | | | | | | | | | | | | | | | | | | I accidentally left these hacks in the code while doing the big header cleanup. Let's remove it now. Signed-off-by: Stefan Roese <sr@denx.de>
| * | ppc4xx: Use common ns16550 functions in 4xx UART POST driverStefan Roese2010-10-04-287/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch changes the PPC4xx POST UART driver to use the common NS16550 functions for receiving and sending. Additionally the local function for SoC divisor setup are removed. Instead the functions from arch/powerpc/cpu/ppc4xx/4xx_uart.c are used. This removes code duplication. Also the common CONFIG_SYS_NS16550_COMx defines are now used to describe the POST UART's. And a compile breakage is fixed, introduced by a git merge of the ppc4xx/next branch into master. Now "ppc4xx.h" is moved to "asm/ppc4xx.h". Fixed as well with this patch. Signed-off-by: Stefan Roese <sr@denx.de>
| * | ppc4xx: Small whitespace cleanup in canyonlands.cStefan Roese2010-10-04-10/+10
| | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>